RISC, CISC, and Assemblers

HakimWeatherspoonCS3410,Spring2012ComputerScienceCornellUniversity

SeeP&HAppendixB.12, andChapters2.8and2.12;als 2.16and2.17

2

WriteBackMemory

InstructionFetch Execute

InstructionDecode

extend

registerfile

control

Big Picture: Understanding Tradeoffs

alu

memory

din dout

addrPC

memory

newpc

inst

IF/ID ID/EX EX/MEM MEM/WB

imm

BA

ctrl

ctrl

ctrl

BD D

M

computejump/branch

targets

+4

forwardunit

detecthazard

3

WriteBackMemory

InstructionFetch Execute

InstructionDecode

extend

registerfile

control

Big Picture: How do I Program?

alu

memory

din dout

addrPC

memory

newpc

inst

IF/ID ID/EX EX/MEM MEM/WB

imm

BA

ctrl

ctrl

ctrl

BD D

M

computejump/branch

targets

+4

forwardunit

detecthazard

4

Goals for TodayInstructionSetArchitectures ISAVariations Complexity:CISC,RISC

AssemblersTranslatesymbolicinstructionstobinarymachinecode instructions psuedoinstructions dataandlayoutdirectives executableprograms

NextTime ProgramStructureandCallingConventions

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What is not a valid hazard resolution?a)Stallb)Forward/Bypassc)Reorderinstructionsinhardwarec)NewHardwareInstructione)None(i.e.allarevalidhazardresolution)

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Recall: Control Hazards

beq r1,r2,L IF ID Ex M WB

add r3, r0,r3

subr5,r4,r6

L:orr3,r2, r4 IF ID Ex M WB

datamem

instmem D

B

A

PC

+4

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ISA Variations: Conditional Instructions while(i !=j){ if(i >j) i =j; else j=i; }LOOP:CMPRi,Rj //setcondition"NE"if(i !=j)

//"GT"if(i >j),//or"LT"if(i

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MIPS instruction formatsAllMIPSinstructionsare32bitslong,has3formats

Rtype

Itype

Jtype

op rs rt rd shamt func6bits 5bits 5bits 5bits 5bits 6bits

op rs rt immediate6bits 5bits 5bits 16bits

op immediate(targetaddress)6bits 26bits

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ARM instruction formatsAllMIPSinstructionsare32bitslong,has3formats

Rtype

Itype

Jtype

opx op rs rd opx rt4bits 8bits 4bits 4bits 8bits 4bits

opx op rs rd immediate4bits 8bits 4bits 4bits 16bits

opx op immediate(targetaddress)

4bits 8bits 26bits

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Instruction Set ArchitectureISAdefinesthepermissibleinstructions

MIPS:load/store,arithmetic,controlflow, ARM:similartoMIPS,butmoreshift,memory,&conditionalops VAX:arithmeticonmemoryorregisters,strings,polynomialevaluation,stacks/queues,

Cray:vectoroperations, x86:alittleofeverything

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Complex Instruction Set ComputersPeopleprogrammedinassemblyandmachinecode! Neededasmanyaddressingmodesaspossible Memorywas(andstillis)slow

CPUshadrelativelyfewregisters Registersweremoreexpensivethanexternalmem Largenumberofregistersrequiresmanybitstoindex

Memoriesweresmall Encoraged highlyencodedmicrocodes asinstructions Variablelengthinstructions,load/store,conditions,etc

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Reduced Instruction Set ComputerDavePatterson RISCProject,1982 UCBerkeley RISCI:transtisters &3x

faster Influences:SunSPARC,

namesakeofindustry

JohnL.Hennessy MIPS,1981 Stanford Simplepipelining,keepfull Influences:MIPScomputer

system,PlayStation,Nintendo

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ComplexityMIPS=ReducedInstructionSetComputer(RlSC) 200instructions,32bitseach,3formats alloperandsinregisters

almostallare32bitseach 1addressingmode:Mem[reg +imm]

x86=ComplexInstructionSetComputer(ClSC) >1000instructions,1to15byteseach operandsindedicatedregisters,generalpurposeregisters,memory,onstack, canbe1,2,4,8bytes,signedorunsigned

10sofaddressingmodes e.g.Mem[segment+reg +reg*scale+offset]

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RISC vs CISCRISCPhilosophyRegularity&simplicityLeanermeansfasterOptimizethecommoncase

CISCRebuttalCompilers canbesmartTransistorsareplentifulLegacy isimportantCode sizecountsMicrocode!

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ARMDroid vs WinTel AndroidOSon

ARMprocessor WindowsOSon

Intel(x86)processor

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AdministriviaProject1(PA1)duenextMonday,March5th

Continueworkingdiligently.Usedesigndocmomentum

Saveyourwork! Saveoften.Verifyfileisnonzero.PeriodicallysavetoDropbox,email.

BewareofMacOSX 10.5(leopard)and10.6(snowleopard)

Useyourresources LabSection,Piazza.com,OfficeHours,HomeworkHelpSession, Classnotes,book,Sections,CSUGLab

17

AdministriviaPrelim1results Mean80(withoutbonus78),standarddeviation15

PrelimsavailableinUpson360aftertoday Regrade requireswrittenrequest

Wholetestisregraded

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Goals for TodayInstructionSetArchitectures ISAVariations Complexity:CISC,RISC

AssemblersTranslatesymbolicinstructionstobinarymachinecode instructions psuedoinstructions dataandlayoutdirectives executableprograms

NextTime ProgramStructureandCallingConventions

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How do I program a MIPS processor?

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int x=10;x=2*x+15;

Ccompiler

addi r5,r0,10muli r5,r5,2addi r5,r5,15

MIPSassembly

001000000000010100000000000010100000000000000101001010000100000000100000101001010000000000001111

machinecode

assembler

CPU

Circuits

Gates

Transistors

Silicon

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AssemblerTranslatestextassemblylanguagetobinarymachinecode

Input:atextfilecontainingMIPSinstructionsinhumanreadableform

Output:anobjectfile(.ofileinUnix,.obj inWindows)containingMIPSinstructionsinexecutableform

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Assembly LanguageAssemblylanguageisusedtospecifyprogramsatalowlevel

Whatdoesaprogramconsistof? MIPSinstructions Programdata(strings,variables,etc)

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MIPS Instruction TypesArithmetic/Logical

ADD,ADDU,SUB,SUBU,AND,OR,XOR,NOR,SLT,SLTU ADDI,ADDIU,ANDI,ORI,XORI,LUI,SLL,SRL,SLLV,SRLV,SRAV,SLTI,SLTIU

MULT,DIV,MFLO,MTLO,MFHI,MTHIMemoryAccess

LW,LH,LB,LHU,LBU,LWL,LWR SW,SH,SB,SWL,SWR

Controlflow BEQ,BNE,BLEZ,BLTZ,BGEZ,BGTZ J,JR,JAL,JALR,BEQL,BNEL,BLEZL,BGTZL

Special LL,SC,SYSCALL,BREAK,SYNC,COPROC

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Assembling ProgramsAssemblyfilesconsistofamixof+instructions+pseudoinstructions+assembler(data/layout)directives(Assemblerlaysoutbinaryvaluesinmemorybasedondirectives)

AssembledtoanObjectFile Header TextSegment DataSegment RelocationInformation SymbolTable DebuggingInformation

.text

.ent mainmain: la $4, Larray

li $5, 15...li $4, 0jal exit.end main.data

Larray: .long 51, 491, 3991

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Example 1...

T:ADDIr4,r0,1BEQr3,r0,BADDIr4,r4,1LWr3,0(r3)JTNOP

B:...

...001000

000100

001000

100011

000010

00000000000000000000000000000000

...

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ReferencesQ:Howtoresolvelabelsintooffsetsandaddresses?

A:Twopassassembly 1st pass:layoutinstructionsanddata,andbuildasymboltable (mappinglabelstoaddresses)asyougo

2nd pass:encodeinstructionsanddatainbinary,usingsymboltabletoresolvereferences

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Example 2...JALLnopnop

L: LWr5,0(r31)ADDIr5,r5,1SWr5,0(r31)...

...00100000000100000000000000000100

00000000000000000000000000000000

00000000000000000000000000000000

10001111111001010000000000000000

00100000101001010000000000000001

00000000000000000000000000000000

...

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Example 2 (better).text0x00400000#codesegment

...ORIr4,r0,counterLWr5,0(r4)ADDIr5,r5,1SWr5,0(r4)...

.data0x10000000#datasegmentcounter:

.word0

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Pseudo-InstructionsPseudoInstructionsNOP#donothingMOVEreg,reg #copybetweenregsLIreg,imm #loadimmediate(upto32bits)LAreg,label#loadaddress(32bits)Blabel#unconditionalbranchBLTreg,reg,label#branchlessthan

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AssemblerLessons: VonNeumannarchitecturemixesdataandinstructions butbestkeptinseparatesegments Specifylayoutanddatausingassemblerdirectives Usepseudoinstructions

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AssemblerAssembler:assemblyinstructions+psuedoinstructions+dataandlayoutdirectives=executableprogram

Slightlyhigherlevelthanplainassemblye.g:takescareofdelayslots

(willreorderinstructionsorinsertnops)

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Will I program in assembly?A:Ido... ForCS3410(andsomeCS4410/4411) Forkernelhacking,devicedrivers,GPU,etc. Forperformance(butcompilersaregettingbetter) Forhighlytimecriticalsections Forhardwarewithouthighlevellanguages Fornew&advancedinstructions:rdtsc,debugregisters,performancecounters,synchronization,...

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How do I program a MIPS processor?

32

int x=10;x=2*x+15;

Ccompiler

addi r5,r0,10muli r5,r5,2addi r5,r5,15

MIPSassembly

001000000000010100000000000010100000000000000101001010000100000000100000101001010000000000001111

machinecode

assembler

CPU

Circuits

Gates

Transistors

Silicon

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Example programvectorv=malloc(8);v>x=prompt(enterx);v>y=prompt(entery);int c=pi+tnorm(v);print(result,c);

calc.c

int tnorm(vectorv){returnabs(v>x)+abs(v>y);

}

math.c

globalvariable:pientrypoint:promptentrypoint:printentrypoint:malloc

lib3410.o

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Stagescalc.c

math.c

io.s

libc.o

libm.o

calc.s

math.s

io.o

calc.o

math.ocalc.exe

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Anatomy of an executing program0xfffffffc

0x00000000

top

bottom

0x7ffffffc0x80000000

0x10000000

0x00400000

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math.s

int abs(x){returnxx)+abs(v>y);}

math.c

tnorm:#arg inr4,returnaddressinr31#leavesresultinr4

abs:#arg inr3,returnaddressinr31#leavesresultinr3

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calc.svectorv=malloc(8);v>x=prompt(enterx);v>y=prompt(entery);int c=pi+tnorm(v);print(result,c);

calc.c dostuff:#noargs,noreturnvalue,returnaddr inr31MOVEr30,r31LIr3,8 #callmalloc:arg inr3,retinr3JALmallocMOVEr6,r3#r6holdsvLAr3,str1 #callprompt:arg inr3,retinr3JALpromptSWr3,0(r6)LAr3,str2 #callprompt:arg inr3,retinr3JALpromptSWr3,4(r6)MOVEr4,r6#calltnorm:arg inr4,retinr4JALtnormLAr5,piLWr5,0(r5)ADDr5,r4,r5LAr3,str3 #callprint:args inr3andr4MOVEr4,r5JALprintJR r30

.datastr1:.asciiz enterxstr2:.asciiz enterystr3:.asciiz result.text.externprompt.externprint.externmalloc.externtnorm.globaldostuff

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Next timeHowdowecoordinateuseofregisters?CallingConventions!

PA1dueMonday