new movable plate for efficient millimeter wave vertical on-chip antenna

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1608 IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, VOL. 61, NO. 4, APRIL 2013 New Movable Plate for Ef cient Millimeter Wave Vertical on-Chip Antenna Loïc Marnat, Armando A. A. Carreno, D. Conchouso, Miguel G. Mart´ ınez, Ian G. Foulds, and Atif Shamim Abstract—A new movable plate concept is presented in this paper to realize mm-wave vertical on-chip antennas through MEMS based post-processing steps in a CMOS compatible process. By virtue of its vertical position, the antenna is isolated from the lossy Si substrate and hence performs with a better efciency as compared to the horizontal position. In addition, the movable plate concept enables polarization diversity by providing both horizontal and vertical polarizations on the same chip. Through a rst iteration fractal bowtie antenna design, dual band (60 and 77 GHz) operation is demonstrated in both horizontal and vertical positions without any change in dimensions or use of switches for two different mediums (Si and air). To support the movable plate concept, the transmission line and antenna are designed on a exible polyamide, where the former has been optimized to operate in the bent position. The design is highly suitable for compact, low cost and efcient SoC solutions. Index Terms—On-chip antenna, polarization recongurability, multi-resonances, vertical on-chip antenna, MEMS. I. INTRODUCTION T HE progress of Radio Frequency (RF) Complementary Metal-Oxide Semiconductor (CMOS) technology has motivated System-on-Chip (SoC) designs for compact, portable and low cost devices [1]. However, on-chip antenna integration is a bottleneck for true SoC solutions due to the large size of antennas as compared to the integrated circuits. Moreover, these antennas suffer from low efciency due to the lossy silicon typically used (conductivity about 10 cm) [1], [2]. Nonethe- less, on-chip antenna negates the requirements of bond wires and off-chip components, which in turn reduces the cost and enhances the robustness of the system [3]. Emerging wireless applications such as wireless video transmission, high reso- lution imaging for medical diagnostic and automotive radars, are now operating in millimeter-wave (mm-wave) bands (at or above 60 GHz), which eases on-chip antenna implementations as the sizes get smaller with increasing frequencies. The use of these bands, does resolve the size problem to some extent, however the low efciency of on-chip antennas in conventional CMOS (low resistivity Si) still remains an unresolved issue. Manuscript received June 22, 2012; revised December 09, 2012; accepted December 16, 2012. Date of publication January 21, 2013; date of current ver- sion April 03, 2013. The authors are with the Department of Electrical Engineering, King Ab- dullah University of Science and Technology (KAUST), Thuwal, Saudi Arabia (e-mail: [email protected]). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TAP.2013.2241720 Few efforts have been made to improve the efciency of the systems with on-chip antennas. Coupling the on-chip an- tenna to an efcient package antenna [4] and employing off- chip lens [5], [6] have signicantly improved the efciencies but add complexity and cost. However, the improvement of on-chip antenna efciency without the help of off-chip compo- nents is challenging as it requires isolation of the antenna elds from the lossy Si substrate. The easiest solution could be to em- ploy a ground plane between the antenna and the Si substrate. However, the distance between the metal layers for antenna and ground plane in conventional CMOS processes is very short ( m). The limitation with this approach is that the ground plane is electrically close to the antenna and this results in low antenna efciency due to tightly bounded elds [7]. The con- ventional ground plane can be replaced by an electromagnetic bandgap (EBG) ground plane to get better efciency and sup- press surface-waves [8]. Some designs have demonstrated inter- esting behavior with this approach to get gains of about 0 dBi or higher [7], [9]–[11], which is difcult to achieve with conven- tional on-chip antenna design on a lossy substrate. Neverthe- less, an EBG structure is complex to realize and typically pro- vides this enhancement in antenna efciency for a very narrow bandwidth. Another solution is to use chemical or mechanical etching to reduce the lossy substrate thickness around or below [12]–[14]. However, it is a non-standard fabrication step and not suitable for very small chip. To isolate the antenna from the lossy silicon, an interesting approach can be to consider vertical on-chip antennas. Such ver- tical antenna can provide higher efciency as compared to the conventional planar approach by reducing the energy dissipated in the substrate. Two vertical on-chip antenna designs have been reported before [15], [16]. The rst design employs a vertical monopole fabricated on top of a metallic ground plane [15]. The metallization is deposited on top of a patterned SU-8 epoxy coated on the substrate. The drawback of this design is that the height of the monopole is restricted to the photoresist thick- ness and thus the operating frequency is limited to 80 GHz and above. The second design is a self-assembled vertical monopole on-chip antenna placed on top of a metallic ground plane [16]. It consists of a multi-layer structure using materials with different thermal expansion coefcients. The structure is lifted through the residual stresses which help to tilt the monopole. The ef- ciency is improved but the radiation is restricted to the end-re direction. Both of these vertical antennas use a monopole with an underlying ground plane to enhance the efciency. In a typ- ical CMOS process, the top metal layer is reserved to realize inductors and is also restrictive in term of metal density. Thus, these designs are not suitable for the modern CMOS processes. 0018-926X/$31.00 © 2013 IEEE

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1608 IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, VOL. 61, NO. 4, APRIL 2013

New Movable Plate for Efficient Millimeter WaveVertical on-Chip Antenna

Loïc Marnat, Armando A. A. Carreno, D. Conchouso, Miguel G. Martı́nez, Ian G. Foulds, and Atif Shamim

Abstract—A new movable plate concept is presented in thispaper to realize mm-wave vertical on-chip antennas throughMEMS based post-processing steps in a CMOS compatibleprocess. By virtue of its vertical position, the antenna is isolatedfrom the lossy Si substrate and hence performs with a betterefficiency as compared to the horizontal position. In addition, themovable plate concept enables polarization diversity by providingboth horizontal and vertical polarizations on the same chip.Through a first iteration fractal bowtie antenna design, dual band(60 and 77 GHz) operation is demonstrated in both horizontaland vertical positions without any change in dimensions or useof switches for two different mediums (Si and air). To supportthe movable plate concept, the transmission line and antennaare designed on a flexible polyamide, where the former has beenoptimized to operate in the bent position. The design is highlysuitable for compact, low cost and efficient SoC solutions.

Index Terms—On-chip antenna, polarization reconfigurability,multi-resonances, vertical on-chip antenna, MEMS.

I. INTRODUCTION

T HE progress of Radio Frequency (RF) ComplementaryMetal-Oxide Semiconductor (CMOS) technology has

motivated System-on-Chip (SoC) designs for compact, portableand low cost devices [1]. However, on-chip antenna integrationis a bottleneck for true SoC solutions due to the large size ofantennas as compared to the integrated circuits. Moreover, theseantennas suffer from low efficiency due to the lossy silicontypically used (conductivity about 10 cm) [1], [2]. Nonethe-less, on-chip antenna negates the requirements of bond wiresand off-chip components, which in turn reduces the cost andenhances the robustness of the system [3]. Emerging wirelessapplications such as wireless video transmission, high reso-lution imaging for medical diagnostic and automotive radars,are now operating in millimeter-wave (mm-wave) bands (at orabove 60 GHz), which eases on-chip antenna implementationsas the sizes get smaller with increasing frequencies. The useof these bands, does resolve the size problem to some extent,however the low efficiency of on-chip antennas in conventionalCMOS (low resistivity Si) still remains an unresolved issue.

Manuscript received June 22, 2012; revised December 09, 2012; acceptedDecember 16, 2012. Date of publication January 21, 2013; date of current ver-sion April 03, 2013.The authors are with the Department of Electrical Engineering, King Ab-

dullah University of Science and Technology (KAUST), Thuwal, Saudi Arabia(e-mail: [email protected]).Color versions of one or more of the figures in this paper are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TAP.2013.2241720

Few efforts have been made to improve the efficiency ofthe systems with on-chip antennas. Coupling the on-chip an-tenna to an efficient package antenna [4] and employing off-chip lens [5], [6] have significantly improved the efficienciesbut add complexity and cost. However, the improvement ofon-chip antenna efficiency without the help of off-chip compo-nents is challenging as it requires isolation of the antenna fieldsfrom the lossy Si substrate. The easiest solution could be to em-ploy a ground plane between the antenna and the Si substrate.However, the distance between the metal layers for antenna andground plane in conventional CMOS processes is very short( m). The limitation with this approach is that the groundplane is electrically close to the antenna and this results in lowantenna efficiency due to tightly bounded fields [7]. The con-ventional ground plane can be replaced by an electromagneticbandgap (EBG) ground plane to get better efficiency and sup-press surface-waves [8]. Some designs have demonstrated inter-esting behavior with this approach to get gains of about 0 dBi orhigher [7], [9]–[11], which is difficult to achieve with conven-tional on-chip antenna design on a lossy substrate. Neverthe-less, an EBG structure is complex to realize and typically pro-vides this enhancement in antenna efficiency for a very narrowbandwidth. Another solution is to use chemical or mechanicaletching to reduce the lossy substrate thickness around or below[12]–[14]. However, it is a non-standard fabrication step and notsuitable for very small chip.To isolate the antenna from the lossy silicon, an interesting

approach can be to consider vertical on-chip antennas. Such ver-tical antenna can provide higher efficiency as compared to theconventional planar approach by reducing the energy dissipatedin the substrate. Two vertical on-chip antenna designs have beenreported before [15], [16]. The first design employs a verticalmonopole fabricated on top of a metallic ground plane [15].The metallization is deposited on top of a patterned SU-8 epoxycoated on the substrate. The drawback of this design is that theheight of the monopole is restricted to the photoresist thick-ness and thus the operating frequency is limited to 80 GHz andabove. The second design is a self-assembled vertical monopoleon-chip antenna placed on top of a metallic ground plane [16]. Itconsists of a multi-layer structure using materials with differentthermal expansion coefficients. The structure is lifted throughthe residual stresses which help to tilt the monopole. The effi-ciency is improved but the radiation is restricted to the end-firedirection. Both of these vertical antennas use a monopole withan underlying ground plane to enhance the efficiency. In a typ-ical CMOS process, the top metal layer is reserved to realizeinductors and is also restrictive in term of metal density. Thus,these designs are not suitable for the modern CMOS processes.

0018-926X/$31.00 © 2013 IEEE

MARNAT et al.: NEW MOVABLE PLATE FOR EFFICIENT MILLIMETER 1609

Fig. 1. Movable plate based antenna concept in (a) Horizontal position (b)Vertical position (c) 3-D radiation pattern (d) 3-D radiation pattern

.

Moreover, the strategy employed for these antennas makes itvery hard to design antennas other than the monopoles.In this work, a new Micro-Electro-Mechanical Systems

(MEMS) movable plate concept suitable for vertical on-chipantennas is introduced. It offers enhanced efficiency as ex-pected from a vertical on-chip antenna, with an easy integrationprocess. In contrast to [15] and [16], this method is completelycompatible with CMOS processes and is neither restrictive ofoperating frequency nor antenna type. In addition, the proposeddesign has the capability of polarization diversity (horizontalor vertical polarization) with respect to the substrate plane.

II. CONCEPT

Typically, on-chip antennas are in-plane and suffer from lowefficiency. The proposed antenna has been designed to operatein a vertical position. Fig. 1 presents the concept of this newmovable plate based antenna in both the horizontal (Fig. 1(a))and vertical positions (Fig. 1(b)). The antenna consists of ametallic radiator printed on a moveable polyamide plate. Thematerial of the plate must be flexible enough to permit itsmovement and stiff enough to maintain its shape as a straightradiator. The plate can be moved and stopped at arbitraryangles. This means that the antenna can either be horizontallyor vertically oriented with respect to the substrate. The radiatoris connected to a feeding point located on a non-movable parton the substrate. No metallic ground plane is used to isolate theradiator from the substrate.The horizontal (in plane) and vertical (out of plane) positions

will be referred as and respectively. It can be noticedthat in the position, the plate is laid down on the substrate,putting the radiator close to the substrate.While in the posi-tion, the radiator is orthogonal to the substrate plane and radiatesinherently away from the substrate. The design of the radiatorplaced on the moveable plate must be optimized to operate onthe targeted frequency bands (60 and 77 GHz) for two differentmediums (Si or air) depending on the orientation of the plate.

The movement of the plate changes the orientation of the ra-diator and in turn changes the polarization of the antenna. Thetypical 3-D radiation patterns obtained from both andpositions are presented in Fig. 1(c) and (d). This antenna can beused in horizontal and vertical positions either as a single ele-ment or as part of a dual-polarized array (by mixing both hori-zontally and vertically polarized elements).

III. DESIGN CHALLENGES

The challenges and design considerations associated with thisnew movable plate based antenna are described in this section.

A. Movable Plate Issue

The proposed antenna concept is based on a moveablebuckled cantilever plate (BCP) anchored to the substratethrough flexible arms as shown in Fig. 2. The lifting mecha-nism required to move the antenna in and positionsis also depicted in Fig. 2(a)–(d). The plate is fabricated inposition (Fig. 2(a)) and can be lifted to the position byapplying a horizontal force in front of the plate (Fig. 2(b)). Thearms (fixed to the substrate at the back anchor) bend and theplate is lifted in vertical position. The BCP keeps itsposition due to the anchors specifically located to achieve 90between the substrate and the plate (Fig. 2(c)). However, theplate can be moved back to its position by applying forceon the top of the plate (Fig. 2(d)). In this work, a displacementof about 600 m is needed to move the plate from toposition. As a proof of concept, the plate is manually liftedby applying the required horizontal force through DC microprobes. However, this movement can be automated throughvoltage or current actuation to achieve antennas with reconfig-urable polarization. A suitable automated mechanism to lift theplate can be through the integration of a set of gears on the chipas depicted in [17].The width of the arms on the sides of the plate affects the

stability of the BCP and the force applied to the fixed anchorswhen the plate is moved in position. It must also take intoaccount the feed line placed on top of one of the arm whichbends when the plate is in the position. A too large bend cancause discontinuity on the metallic feed lines as the metal on thepolyamide is not as flexible as the polyamide itself. The choiceof the plate material and arm width has been made keeping inview the tradeoff between the required mechanical strength tohold the radiator and the flexibility essential to lift the platewithout breaking the flexible arms or the anchors. A non-planarplate can potentially generate large cross-polarization in antennacharacteristics.

B. Impedance Matching and Feeding Issue

A custom feed is designed to connect the movable differen-tial antenna to a fixed single ended source (Fig. 2). The feedcomprises a ground-signal-ground (GSG) pad arrangement tofacilitate antenna testing through RF probes and transmissionline on flexible substrate. The propagation is transformed froma coplanar waveguide (CPW) to coplanar stripline (CPS) mode.For this antenna, the CPS lines are bent and must operate in twodifferent mediums (air and Si) depending on the orientation of

1610 IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, VOL. 61, NO. 4, APRIL 2013

Fig. 2. Lifting mechanism for the BCP: (a) position, (b) being moved inposition, (c) position, (d) being moved in position.

the antenna. The length, gap and width of the CPS line are opti-mized so that it remains matched in both and positionsfor the two targeted frequencies. The bending of the arm is ap-proximated in the electromagnetic simulator by a spline curveto avoid the complexity in the simulation model. However, it isensured that the length of the spline curve is the same as that ofthe straight line.

C. Silicon Substrate Thickness Issue

At the targeted millimeter wave frequencies, the thickness oftypical substrates are non negligible as compared to the wave-length. A typical 500 m thick silicon substrate corresponds toabout at 77 GHz (where is the guided wavelength in asilicon medium with ). This thickness is electricallylarge and can easily support surface waves propagation and af-fect the radiation of the antenna [17].The effect of the silicon thickness on the radiation pattern

of both the and on-chip antennas is not the same,as it is presented in Fig. 3. A simple bowtie antenna, shownin Fig. 1(a), (b), is simulated on top of a silicon wafer with athickness ranging from 500 m to 20 m. The typical omnidi-rectional radiation pattern of a bowtie antenna is expected. Asshown in Fig. 3(a), (c) and (e), the radiation pattern is severelydisturbed by the silicon substrate. Surface waves considerablyaffect the radiation pattern for a thick substrate but their ef-fect is significantly reduced for a thinner substrate (for instance,20 m). On the other hand, the radiation pattern of a verticalon-chip antenna is only affected by a silicon substrate thickerthan 400 m. Typical silicon thicknesses for CMOS processrange from 300 to 700 m. At millimeter wave frequencies, thethickness of the silicon substrate must be reduced. Polishing thebackside of the chip can reduce the thickness but this processis generally restricted to thicknesses above 200 m. Moreover,a very thin wafer is difficult to handle, especially for probingpurposes. Keeping in mind the mechanical requirements, thein-house fabrication and post-processing facilities, a thicknessof 200 m is selected for this work.

IV. ANTENNA DESIGN

The new antenna concept is realized by post-processing ofa polyamide layer on top of a Si wafer with a thin oxide ontop of it (CMOS compatible process). The stackup, shown inFig. 4, comprises a 200 m thick silicon wafer (conductivity of10 cm and ), a 2 m thick oxide layer , a 2m air gap, a 10 m thick layer of polyamide, and a 2 m layerof gold. The polyamide layer chosen for this work is a PI2610 re-sist because of its good mechanical properties and low dielectriclosses [19]. Furthermore, it is highly flexibleand resistant to bending stresses, which is very suitable for themovable plate concept. Gold is used due to its good adhesionto the polyamide layer and its ductility for the realization of theflexible feed lines. The 2 m gold layer thickness is chosen to beat least three times thicker than the skin depth at 60 GHz and 77GHz which corresponds to 0.32 m and 0.28 m respectively.The design is a first iteration of a Sierpinski triangular fractal

antenna and is shown in Fig. 5. The main element (characterizedwith L1 and W1) and the first iteration elements (characterizedwith L2 and W2) provide multi-resonances and the flexibilityto achieve impedance match at multiple frequencies [20]. Theantenna must be matched at 60 and 77 GHz in both and

positions. It is worth mentioning here that the substrate,and the for the position (antenna on top of Si, oxide andpolyamide stackup) are different from the position (antennaon top of polyamide only), so having the same antenna dimen-sions work for dual bands in both positions is quite challenging.

MARNAT et al.: NEW MOVABLE PLATE FOR EFFICIENT MILLIMETER 1611

Fig. 3. Simulated 3-D radiation patterns of a and bowtie antenna at77 GHz for different silicon thicknesses. (a) 20 um thick silicon (b) 20 umthick silicon (c) 50 um thick silicon (d) 50 um thick silicon (e)500 um thick silicon (f) 500 um thick silicon .

Fig. 4. Stackup used for the antenna on movable polyamide plate.

The length defines the first resonance of the antennaand the ratio between L1 and L2 controls the next resonances.These features have been utilized to optimize the antenna matchat 60 and 77 GHz in both positions and .The antenna is modeled in the electromagnetic simulator

Ansys HFSS. The dimensions take into account the fabricationrequirements such as etched holes in the plate to ease its releaseand the bending of the side arms in the position. The sim-ulated 2-D radiation patterns in the substrate plane are shownin Fig. 6 for the antenna in both the and positions at60 GHz. The benefit of a vertical on-chip antenna is obvious

Fig. 5. Antenna geometry and design parameters ( m,m, m, m, m, m,

m).

Fig. 6. 2-D cuts of the radiation patterns in the substrate plane for the antennain and positions at 60 GHz.

with the gain increased from dBi to dBi, whichcorresponds to a 5.6 dB of gain improvement in positionas compared to the position. A maximum simulated gainof 1.1 dBi is obtained for the antenna in the position at 77GHz.

V. FABRICATION

Several MEMS devices such as gyroscopes, accelerometersand antennas, benefit from having a reliable mechanism to dis-place them out-of-plane without losing direct connection to thesubstrate [21]. These active devices need to be electrically con-nected to a power supply or a sensing circuit, which will allowtheir interaction and integration with the driving electronics.The buckled cantilever design provides accurate out-of-planeassembly while maintaining the direct connection to the sub-strate for the routing of conductive feeding lines [21], [22].The dimensions of the BCP structure are shown in Fig. 7.

The overall size is 2 2.3 mm which consists of a 2 1.5 mmmoveable plate attached to two 2 0.25 mm cantilever arms.Two anchors, located at the back of the BCP, force the armsto bend and convert a horizontal force into rotation of the plate.

1612 IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, VOL. 61, NO. 4, APRIL 2013

Fig. 7. Polyamide buckled cantilever plate (BCP) dimensions.

Two anchors located in the front are used to keep the plate in theposition (Fig. 2). The antenna is patterned over the plate.

The steps needed to fabricate this BCP are depicted in Fig. 8and described as follows. It is fabricated on a 500 m Si waferwith a 500 nm SiO layer employed for a good anchor adhe-sion. A 2 m sacrificial layer of amorphous silicon ( -Si) isthen deposited on the SiO , (Fig. 8(a)). This sacrificial layer isremoved at a later stage to release the plate and arms from theSi substrate. Dimple features (small bumps) are added all overthe structure to avoid stiction problems by reducing the contactarea between the substrate and the BCP as shown in Fig. 8(b).The structural layer of the BCP is made of PI2610 polyamide.A thickness of about 10 m with a single spun layer is achieved[19]. After curing the resist, a 2 m layer of Au is deposited andpatterned with dry etch (Fig. 8(e)). The BCP is then patternedusing a reactive ion etching technique. To reduce the originalsilicon wafer thickness, the wafer is back etched with deep re-active ion etching to a final thickness of about 200 m. Finally,the freestanding BCP is released from Si wafer by etching the-Si sacrificial layer as shown in Fig. 8(h).The picture of the two fabricated on-chip antennas, in bothand positions, is shown in Fig. 9. The wafer is diced

for impedance and gain measurements. The antenna inposition is manually lifted using DC probes as explained inSection III.A and shown in Fig. 2.

VI. MEASURED RESULTS AND ANALYSIS

The impedance and the gain measurements of the fabricatedon-chip antennas are presented in this section. Measurementsare performed on a probe station from Cascade Microtech usingGSG RF probes.

A. Impedance

A short open load through (SOLT) calibration is performedfor impedance measurements. An absorber is placed below thechip to avoid the ground plane effect from the metal chuck.Fig. 10 shows the comparison between the measured and the

Fig. 8. BCP fabrication process.

Fig. 9. Fabricated antennas in both and positions.

simulated versus the frequency for the antenna in theposition. The antenna is matched for both 60 and 77 GHz. It canbe seen that, generally, the measured results follow the sametrend as the simulated curve, except for a small shift towardsthe higher frequencies. This can be explained as follows. TheBCP once released from the Si wafer is a freestanding structurewith a 2 m air gap. This air gap thickness is highly depen-dent on the release process and can be a little non-uniform. Itcan be responsible for the slight shift of resonances in measure-ments, as can be clearly seen at 60 GHz. Another issue with thefabricated modules is the non-uniform Si substrate thickness.This non-uniformity is because of the deep reactive ion etching(DRIE) of the silicon wafer to reduce its thickness from 500 mto 200 m. The DRIE technique enabled to reduce this large Sithickness from the backside of the wafer but at the cost of largenon-uniformity of the backside surface. It is hard to model thislarge non-uniformity in simulations, however trying differentsubstrate thicknesses indicates that the silicon thickness affects

MARNAT et al.: NEW MOVABLE PLATE FOR EFFICIENT MILLIMETER 1613

Fig. 10. Simulated and measured versus frequency for the antenna.

Fig. 11. Simulated and measured versus frequency for the antenna.

the spacing between the resonances and in particular has a largerimpact on the higher resonance.The comparison between the measured and the simulated

versus the frequency is shown in Fig. 11 for the antenna inposition. It can be seen that the simulations and measurementsfollow similar trends and the antenna is matched for both fre-quencies. The small discrepancies for this antenna position canbe attributed to the difference between the bending of the sidearms of the fabricated antenna and the simulated one. In ad-dition, the plate may not be perfectly vertical as compared tothe silicon substrate. However, the large shift of the higher fre-quency resonance in measurements, as was in the case of hori-zontal antenna, is not observed here. This further confirms thebenefits of the proposed vertical on-chip antenna which is un-fazed by the silicon substrate thickness non-uniformity, as canbe seen in Fig. 11 where the higher frequency resonance is al-most aligned with the one in simulations.

B. On-Chip Antenna Gain

On-chip antenna gain and radiation pattern measurements areaffected by parasitic radiations of probe tips and scattered en-ergy from the metallic parts on the probe station. In addition, asit has been shown in Section III(c), the thickness of the substratebelow the antenna is critical for gain and radiation performance.Typically, the chip is glued on a glass slice which would resultin surface waves excitation. These elements affect the gain mea-surement and must be taken into consideration in the test setup.

Fig. 12. Top view of the setups for radiation pattern and gain measurement ofon-chip antennas. (a) Horizontal (b) Vertical.

Fig. 13. Gain measurement setup for the horizontal antenna at 45 .

TABLE IMEASURED GAIN (IN DBI) AT 60 AND 77 GHZ IN HORIZONTAL AND VERTICAL

POSITION

For these reasons, the chip is directly placed on top of an ab-sorber as shown in Fig. 13.The gain of the antenna is measured with the absolute gain

method. This technique requires two identical antennas facingeach other with the same orientation and separated by acertain distance . From the measurement of the transmissionobtained with a vector network analyzer , the antenna gaincan be estimated using Friis equation, given in

(1)

where is the gain of a single antenna in the directionand is the wavelength at the frequency of interest. The

gain in the maximum radiation is measured using the methoddescribed above. Table I summarizes the measured gains at 60and 77 GHz for both and antenna positions. The in-creased on-chip antenna efficiency in vertical position can stillbe clearly observed with about 6.5 dB measured gain improve-ment between and positions, irrespective of the fre-quency. The measured gain is higher than the simulated one andthis can be attributed to in phase reflections from the metallicchuck.

C. Radiation Pattern

Typically, radiation pattern is measured in anechoic chamberwith connectors and probe feeding is not common practice.On-chip antennas are small in size and mostly fed through RF

1614 IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, VOL. 61, NO. 4, APRIL 2013

Fig. 14. Normalized simulated radiation patterns in E-/H-plane with measuredgain at selective points in both and positions at 60 and 77 GHz. (a)

position at 60 GHz, (b) position at 77 GHz, (c) position at 60GHz, (d) position at 77 GHz.

probes adding challenges to these measurements. A specificand precise test fixture is required for accurate antenna mea-surements. Alternately, the radiation pattern can be estimatedby the measurements between two antennas on wafer asshown in Figs. 12 and 13. Practically, two identical antennas areplaced on the metallic chuck with different angles (Fig. 12(a)and (b)). The transmission between them can only be measuredin the plane of the chuck (Fig. 6), thus making this techniquesuitable to characterize these BCP mounted andantennas. The two diced chips are fed through GSG RF probesand directly placed on top of an absorber, as shown in Fig. 13.Fig. 14 shows the simulated normalized radiation patterns in

E-/H-planes and the measured gain of the on-chip antenna inboth and positions at 60 and 77 GHz. As can be seen,the radiation pattern for vertical antenna is stable and quasi-om-nidirectional in comparison to that of the horizontal antenna.This is consistent with the analysis presented in Section III(c),where the surface waves affect the horizontal antenna’s radia-tion pattern more than the vertical one. It is worth mentioninghere that not all the angles and cuts for the complete E andH-plane radiation characterization are possible in this setup. Anacceptable agreement between the simulated radiation patternand the measured points exist. The discrepancies can be at-tributed to the error in manual placement and alignment of thetwo antennas in these challenging on-wafer mm-wave measure-ments.

VII. CONCLUSION

A newBCP based on-chip antenna using a CMOS compatibleMEMS process has been designed, fabricated and measured forefficient mm-wave applications. By virtue of its vertical posi-tion (with respect to the silicon substrate), the antenna is isolatedfrom the lossy Si substrate and hence performs with a better effi-ciency as compared to the horizontal position. An improvementof 6 dB of gain has been observed in simulation and measure-ment. Through a first iteration fractal bowtie antenna design,dual band (60 and 77 GHz) operation is demonstrated in both

horizontal and vertical positions without any change in dimen-sions for two different mediums (Si and air). The design of afeed mechanism suitable for RF probe-fed antenna on a mov-able plate has successfully been done for the targeted millimeterwave applications. With a total size of 2 2.3 mm , this designis highly suitable for compact, low cost and efficient SoC solu-tions.

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[3] A. Shamim, L. Roy, N. Fong, and N. G. Tarr, “24 GHz on-chip an-tennas and balun on bulk Si for air transmission,” IEEE Trans. An-tennas Propag., vol. 56, no. 2, pp. 303–311, Feb. 2008.

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Loïc Marnat was born in Poitiers, France, in 1982.He received the M.A.Sc. and Ph.D. degrees in elec-trical engineering at Institut National des SciencesAppliqués (INSA) de Rennes, France, in 2006 and2009 respectively.He was a Lecturer and Research Fellow at INSA

de Rennes in 2010 and is currently a postdoctoralfellow since 2011 at King Abdullah University ofScience and Technology (KAUST), Thuwal, SaudiArabia. His research interests are in integratedon-chip antennas, antennas on flexible substrate

and antenna reconfigurability through micro-fluidic network and advancedsystem-on-package (SoP) designs.

Armando A. A. Carreno (M’11) was born inCuernavaca, Mexico, in 1986. He received theB.S. degree in mechatronics engineering from theTecnologico de Monterrey, Cuernavaca, in 2008 andthe M.S. degree in mechanical engineering fromthe King Abdullah University of Science and Tech-nology (KAUST), Thuwal, Saudi Arabia, in 2010,where he is currently pursuing the Ph.D. degree.In summer 2006 he completed a course in Funda-

mentals of Aeronautics based on the Pilot Training atthe Moscow Aviation Institute in Moscow, Russia. In

2009 he studied a semester in Nottingham University, U.K., as an enrichmentsemester before enrolling as a founding class student at KAUST. From 2011to 2012 he has been a Teaching Assistant in the Electrical Engineering Depart-ment, KAUST. He is author of a couple of papers in Finite Element Analysis forMicro Electro Mechanical Systems (MEMS) simulation. His research interestincludes sensors and actuators design, micro fabrication processes, acoustics,microsystems device simulation and aerospace.Mr. Carreno was a recipient of the Discovery Scholarship Award for his

achievements and professional development at Tecnologico de Monterrey Uni-versity, Mexico, in 2008. He was also recipient of the Borrego de Oro for lead-earship in student groups at Tecnologico de Monterrey Univeristy, Mexico, in2008. He is a founding class graduate student of KAUST, co-founder of theKAUST IEEE Student Branch, and currently the vice-chair.

David Conchouso received the M.A.Sc. degrees inmechanical engineering at King Abdullah Universityof Science and Technology (KAUST), Thuwal, SaudiArabia.His research interests are in Microsys-

tems, micro-technology and microfluidics forlab-on-a-chip (LOC) applications.

Miguel Galicia Martı́nez received the B.Sc. degreein telecommunications, and industrial engineeringfrom the National Autonomous University ofMexico (UNAM), Mexico City, and the Universityof Technology Sydney (UTS), Australia, in 2007and 2009, respectively. He received the M.Sc.degree at King Abdullah University of Science andTechnology (KAUST), Thuwal, Saudi Arabia, in2010.He worked as System’s Engineer at Eric-

sson, shifting to sales solution engineering atNokia-Siemens networks. In 2010, he collaborated on a research study onenergy efficient routing protocols for Wireless Sensor Networks at the Univer-sity of California San-Diego, UCSD, CA, USA. He is currently working asWireless Product Manager at Huawei-Technologies.

Ian Foulds received the Ph.D. degree in 2007 fromSimon Fraser University, Burnaby, BC, Canada, re-ceiving the Governor General’s Gold Medal.He then took up an NSERC Postdoctoral Fel-

lowship at the University of Victoria, after which,he joined King Abdullah University of Scienceand Technology (KAUST), Thuwal, Saudi Arabia,in 2009 as an Assistant Professor of electricalengineering. His research interests are in the area ofmicrosystems design and fabrication with special in-terest in the use of polymer materials, having worked

extensively with different polymer resists and polymer specific patterningtechniques.

Atif Shamim received his M.A.Sc. and Ph.D.degrees in electrical engineering at Carleton Uni-versity, Canada in 2004 and 2009 respectively. Hewas an NSERC Alexander Graham Bell Graduatescholar at Carleton University from 2007 till 2009and an NSERC postdoctoral Fellow from 2009–2010at King Abdullah University of Science and Tech-nology (KAUST), KSA. In August 2010, he joinedthe Electrical Engineering Program at KAUST,where he is currently an Assistant Professor. He wasan invited researcher at the VTT Micro-modules

Research Center (Oulu, Finland) in 2006.Dr. Shamim was the recipient of the best paper prize at the EuWiT Confer-

ence in the EuMA week (2008). He was given the Ottawa Centre of ResearchInnovation (OCRI) Researcher of the Year Award (2008). His work on WirelessDosimeter won the ITAC SMC Award at Canadian Microelectronics Corpora-tion TEXPO (2007). He received the best student paper finalist prize at IEEEAPS conference in 2005. His research interests are in integrated on-chip an-tennas, low power CMOS RFICs for system-on-chip (SoC) applications and ad-vanced system-on-package (SoP) designs in multilayer LTCC, LCP, and papersubstrates through screen and inkjet printing techniques.