Topic for presentation RISC vs CISCGroup Members: Manzoor Ahmed Wazir Mohammad Kashif Manzoor

ISAy

ISA stands for Instruction Set Architecture. The term Instruction Set Architecture is used in many different ways. It is the actual set of instructions that programmers can see, the glue that ties the hardware and software together. ISA determines the way the machine language programs are constructed. There are many different ISA's; most fall into two categories, RISC and CISC.

y

y

CISC Processorsy y y

CISC - Complex Instruction Set Computer The idea: a high level machine language Characteristic Many instruction types, with many addressing modes Some of the instructions are complex: x Perform complex tasks x Require many cycles ALU operations directly on memory x Usually uses limited number of registers Variable length instructions

RISC ProcessorsRISC - Reduced Instruction Set Computer y The idea: simple instructions enable fast hardware y Characteristic A small instruction set, with only a few instructions formats Simple instructions x execute simple tasks x require a single cycle (with pipeline) A few indexing methods ALU operations on registers only x Memory is accessed using Load and Store instructions only. Fixed length instructionsy

CISC DrawbacksCompilers do not take advantage of the complex instructions and the complex indexing methods y Implement complex instructions and complex addressing modesy

=> complicate the processor => slow down the simple, common instructions => complex instructions are often of different lengths, i.e., each instruction could consist of any number of operands and takes any number of cycles to execute

RISC vs. CISCy

The believe that better performance would be obtained by reducing the number of instruction required to implement a program, lead to design of processors with very complex instructions (CISC) CISC Complex Instruction Set Computers As compiler technologies improved, researchers started to wonder if CISC architectures really delivered better performances than architectures with simpler instruction set RISC Reduced Instruction Set Computers

y

RISC vs. CISCy

CISCFewer instructions to execute a given task than RISC Programs for CISC take less storage space than programs for RISC Arithmetic or other instructions may read their operand from memory and could write the result in memory

y

RISCSimpler instructions, faster execution speeds per instruction, more instructions executed in same amount of time than CISC Cheaper to implement (simple instruction set results in simple implementation internal microarchitecture) Load/Store architecture only load and store are used to access the external memory

So, what is better, RISC or CISCy

Today CISC architectures (X86) are running as fast as RISC (or even faster)

y The

main reasons are:

Translates CISC instructions into RISC instructions (ucode) CISC architecture are using RISC like engine

MIPS vs. Intel 80x86y

MIPS: Three-address architecture Arithmetic-logic specify all 3 operands add $s0,$s1,$s2 # s0=s1+s2 Benefit: fewer instructions performance

y

x86: Two-address architecture Only 2 operands, so the destination is also one of the sources add $s1, $s0 # s1=s1+s0 Benefit: smaller instructions smaller code

MIPS vs. Intel 80x86y

MIPS: fixed-length instructions All instructions same size, e.g., 4 bytes simple hardware performance branches can be multiples of 4 bytes x86: variable-length instructions Instructions are multiple of bytes: 1 to 16; small code size (30% smaller?) More Recent Performance Benefit: better instruction cache hit rates Instructions can include 8- or 32-bit immediates

y

RISC vs CISC: characteristicsRISC CISC1. simple instns taking 1 cycle 1. complex instns taking multiple cycles 2. only LOADs, STOREs memory 3. designed around pipeline 4. instns. executed by h/w 5. Fixed format instns 6. Few instns and modes 7. Complexity in the compiler 8. Multiple register sets 2. any instn. may access memory access

3. designed around instn. set 4. instns interpreted by microprogram 5. variable format instns 6. Many instns and modes 7. Complexity in the microprogram 8. Single register set

Example:Role of Compiler: RISC vs. CISCy

CISC instruction: MUL , RISC instructions: LOAD A, LOAD B, MUL A, B STORE

y

12

complex instruction set computers (CISC)a variety of instructions that may perform very complex tasks

reduced instruction set computers (RISC)fewer and simpler instructions

Thank You.