microprocessor design - ?· contents 1. designing a microprocessor .....2

Download Microprocessor Design -  ?· Contents 1. Designing a Microprocessor .....2

Post on 25-Sep-2018

213 views

Category:

Documents

0 download

Embed Size (px)

TRANSCRIPT

  • Microprocessor Design Principles and Practices

    With VHDL

    Enoch O. Hwang Brooks / Cole 2004

  • To my wife and children Windy, Jonathan and Michelle

  • Contents 1. Designing a Microprocessor ................................................................................................................................. 2

    1.1 Overview of a Microprocessor ....................................................................................................................... 2 1.2 Design Abstraction Levels.............................................................................................................................. 4 1.3 Examples for a 2-input Multiplexer................................................................................................................ 4

    1.3.1 Behavioral Level.................................................................................................................................... 5 1.3.2 Gate Level.............................................................................................................................................. 6 1.3.3 Transistor Level ..................................................................................................................................... 6

    1.4 VHDL ............................................................................................................................................................. 7 1.5 Synthesis......................................................................................................................................................... 8 1.6 Going Forward................................................................................................................................................ 9 1.7 Summary Checklist......................................................................................................................................... 9 Index ...................................................................................................................................................................... 11

    2 Digital Circuits...................................................................................................................................................... 2 2.1 Binary Numbers............................................................................................................................................. 2 2.2 Binary Switch ................................................................................................................................................. 4 2.3 Basic Logic Operators and Logic Expressions ............................................................................................... 5 2.4 Truth Tables.................................................................................................................................................... 6 2.5 Boolean Algebra and Boolean Function ......................................................................................................... 6

    2.5.1 Boolean Algebra .................................................................................................................................... 6 2.5.2 Duality Principle .................................................................................................................................... 8 2.5.3 Boolean Function and the Inverse.......................................................................................................... 9

    2.6 Minterms and Maxterms............................................................................................................................... 12 2.6.1 Minterms.............................................................................................................................................. 12 2.6.2 Maxterms ............................................................................................................................................. 13

    2.7 Canonical, Standard, and non-Standard Forms............................................................................................. 15 2.8 Logic Gates and Circuit Diagrams................................................................................................................ 15 2.9 Example: Designing a Car Security System ................................................................................................. 17 2.10 Introduction to VHDL .................................................................................................................................. 19

    2.10.1 VHDL code for a 2-input NAND gate................................................................................................. 19 2.10.2 VHDL code for a 3-input NOR gate.................................................................................................... 20 2.10.3 VHDL code for a function ................................................................................................................... 20

    2.11 Summary Checklist....................................................................................................................................... 21 2.12 Exercises....................................................................................................................................................... 23 Index ...................................................................................................................................................................... 26

    3 Combinational Circuits ......................................................................................................................................... 2 3.1 Analysis of Combinational Circuits................................................................................................................ 2

    3.1.1 With a Truth Table................................................................................................................................. 2 3.1.2 With a Boolean Function ....................................................................................................................... 4

    3.2 Synthesis of Combinational Circuits .............................................................................................................. 5 3.3 Technology Mapping...................................................................................................................................... 6 3.4 Minimization of Combinational Circuits ........................................................................................................ 9

    3.4.1 Karnaugh (K) Maps ............................................................................................................................... 9 3.4.2 Dont-cares .......................................................................................................................................... 13 3.4.3 * Quine-McCluskey (Tabulation) Method........................................................................................... 14

    3.5 * Timing Hazards and Glitches .................................................................................................................... 15 3.6 7-Segment Decoder Example ....................................................................................................................... 16 3.7 VHDL Code for Combinational Circuits ...................................................................................................... 19

    3.7.1 Structural BCD to 7-Segment Decoder................................................................................................ 19 3.7.2 Dataflow BCD to 7-Segment Decoder ................................................................................................ 22 3.7.3 Behavioral BCD to 7-Segment Decoder.............................................................................................. 22

  • 3.8 Summary Checklist....................................................................................................................................... 23 3.9 Exercises....................................................................................................................................................... 24 Index ...................................................................................................................................................................... 26

    4 Combinational Components.................................................................................................................................. 2 4.1 Signal Naming Conventions ........................................................................................................................... 2 4.2 Adder .............................................................................................................................................................. 2

    4.2.1 Full Adder.............................................................................................................................................. 2 4.2.2 Ripple-Carry Adder ............................................................................................................................... 3 4.2.3 Carry-Lookahead Adder ........................................................................................................................ 4

    4.3 Twos-Complement Representation for Negative Numbers........................................................................... 6 4.4 Subtractor........................................................................................................................................................ 8

    4.4.1 Adder / Subtractor Combination.........................................

Recommended

View more >