soft start circuit for buck converters

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Ramp-Based Soſt-Start Circuit with Soſt-Recovery for DC-DC Buck Converters AN Bingl.2, LA! Xinquanl.2, YE Qiangl.2, WANG Hongy/, LI Yajun1,2 i Institute of Electronic CAD, Xidian University, Xi'an, Shaanxi, China 2 Key Lab of High-Speed Circuit Design and EMC, Ministry of Education 3 Institute of Microelectronics, Xi'an Jiaotong University, Xi'an, Shaanxi, China [email protected], [email protected]n.edu.cn Abstract-A soſt-start circuit with soft-recovery function for DC-DC converters is presented in this paper. The soſt-start strategy is based on a linearly ramped-up reference and an error amplifier with minimum selector implemented with a three-limb differential pair skillfully. The soſt-recovery strategy is based on a compact clamp circuit. The ramp voltage would be clamped once the feedback voltage is detected lower than a threshold, which could control the output to be recovered slowly and linearly. A monolithic DC-DC buck converter with proposed circuit has been fabricated with a O.5m CMOS process for validation. The measurement result shows that the ramp-based soſt-start and soſt-recovery circuit have good performance and agree well with the theoretical analysis. Keywords-DC-DC buck converter; soſt-start; soſt-recovery; inrush current; overshoot voltage I. INTRODUCTION In recent years, battery-operated portable devices are increasingly in great demand. Power management ICs, especially DC-DC buck converters are critical building blocks in state-of-the-art portable applications [1]. Soſt-start is a feature commonly used in PWM control ICs to limit inrush current and avoid output voltage overshoot during start-up transient. This guarantees the duty cycle is progressively increased, which is employed on first powering of the chip. Many soſt-start methods have been reported in the literature [2- 5]. Unfortunately, soſt-recovery techniques have not received much attention. Besides first enabling of the chip, the power-up transient should also be reduced while the system is immediately recovered following the correction of a fault. A soſt-start circuit with soſt-recovery function is presented in this paper. The soſt-start strategy is based on a linearly ramped-up reference and an error amplifier with minimum selector implemented with a three-limb differential pair skilllly. The soſt-recovery strategy is based on a compact clamp circuit. Once the feedback voltage is detected lower than a threshold, the ramp voltage would be pulled low and clamped, which could controls the output to be recovered slowly and linearly. A monolithic current-mode DC-DC buck converter with proposed circuit has been fabricated with a O.51lm CMOS process for validation. The measurement result shows that the ramp-based soſt-start and soſt-recovery circuit have good performance and agree well with the theoretical analysis. 978-1-4673-2523-3/13/$31.00 ©2013 IEEE II. OPERATlON PRlNCIPLE Generally speaking, DC-DC converter includes a PWM switching regulator that works in a control loop converting the error signal into a variable duty cycle of the driving signal for the switching element. During startup transient, the feedback voltage is zero and the sudden appearance of a large reference voltage can result in a large error signal, which could cause massive inrush current and voltage overshoot. Fig. 1 shows the proposed ramp-based soſt-start circuit with soſt-recovery function. Capacitor Cl is charged linearly by a bias current. The minimum selector would select the minimum value between the reference voltage VRI and the linearly ramped-up voltage SS. The steady state of COMP is defined by VRl, whereas the start-up transient is defined by SS. Thus the voltages of FB and COMP would rise gradually with the increase of SS. And SS would be pulled to the highest potential when start-up is ended. When a fault occurs such as over temperature or short circuit operation, soſt-recovery is necessary, which is focused in this paper. In traditional circuit the EA is unbalanced again when the feedback is pulled low. In our design, SS is clamped with FB by amplifier AI. The clamp circuit is active once FB is detected lower than reference VR2 (VR2<VRl). An offset is introduced in the differential pair to define COMP value. With the proposed circuit, the system recovery is smooth and quite similar to the soſt-start. III. PROPOSED SOFT-START AND SOFT-RECOVERY CIRCUIT The circuit implementation and design considerations of the proposed soſt-start and soſt-recovery circuit are described ........................................................... . ............................................... i Proposed clamp circuit wh Ramp-bused I "f'�"w" f"""i"" wiWim.;' ! i FB ! l.. ............. �:=�.�..................... .................................................. : Fig. I. Block diagram of proposed circuit in DC-DC converter.

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Soft Start for Buck Converters

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  • Ramp-Based Soft-Start Circuit with Soft-Recovery for DC-DC Buck Converters

    YUAN Bingl.2, LA! Xinquanl.2, YE Qiangl.2, WANG Hongy/, LI Yajun1,2 iInstitute of Electronic CAD, Xidian University, Xi'an, Shaanxi, China

    2Key Lab of High-Speed Circuit Design and EMC, Ministry of Education 3Institute of Microelectronics, Xi'an Jiaotong University, Xi'an, Shaanxi, China

    [email protected], [email protected]

    Abstract-A soft-start circuit with soft-recovery function for DC-DC converters is presented in this paper. The soft-start strategy is based on a linearly ramped-up reference and an error amplifier with minimum selector implemented with a three-limb differential pair skillfully. The soft-recovery strategy is based on a compact clamp circuit. The ramp voltage would be clamped once the feedback voltage is detected lower than a threshold, which could control the output to be recovered slowly and linearly. A monolithic DC-DC buck converter with proposed circuit has been fabricated with a O.5Jlm CMOS process for validation. The measurement result shows that the ramp-based soft-start and soft-recovery circuit have good performance and agree well with the theoretical analysis.

    Keywords-DC-DC buck converter; soft-start; soft-recovery; inrush current; overshoot voltage

    I. INTRODUCTION

    In recent years, battery-operated portable devices are increasingly in great demand. Power management ICs, especially DC-DC buck converters are critical building blocks in state-of-the-art portable applications [1]. Soft-start is a feature commonly used in PWM control ICs to limit inrush current and avoid output voltage overshoot during start-up transient. This guarantees the duty cycle is progressively increased, which is employed on first powering of the chip. Many soft-start methods have been reported in the literature [2-5]. Unfortunately, soft-recovery techniques have not received much attention. Besides first enabling of the chip, the power-up transient should also be reduced while the system is immediately recovered following the correction of a fault.

    A soft-start circuit with soft-recovery function is presented in this paper. The soft-start strategy is based on a linearly ramped-up reference and an error amplifier with minimum selector implemented with a three-limb differential pair skillfully. The soft-recovery strategy is based on a compact clamp circuit. Once the feedback voltage is detected lower than a threshold, the ramp voltage would be pulled low and clamped, which could controls the output to be recovered slowly and linearly. A monolithic current-mode DC-DC buck converter with proposed circuit has been fabricated with a O.51lm CMOS process for validation. The measurement result shows that the ramp-based soft-start and soft-recovery circuit have good performance and agree well with the theoretical analysis.

    978-1-4673-2523-3/13/$31.00 20 13 IEEE

    II. OPERA TlON PRlNCIPLE

    Generally speaking, DC-DC converter includes a PWM switching regulator that works in a control loop converting the error signal into a variable duty cycle of the driving signal for the switching element. During startup transient, the feedback voltage is zero and the sudden appearance of a large reference voltage can result in a large error signal, which could cause massive inrush current and voltage overshoot.

    Fig. 1 shows the proposed ramp-based soft-start circuit with soft-recovery function. Capacitor Cl is charged linearly by a bias current. The minimum selector would select the minimum value between the reference voltage VRI and the linearly ramped-up voltage SS. The steady state of COMP is defined by VRl, whereas the start-up transient is defined by SS. Thus the voltages of FB and COMP would rise gradually with the increase of SS. And SS would be pulled to the highest potential when start-up is ended. When a fault occurs such as over temperature or short circuit operation, soft-recovery is necessary, which is focused in this paper. In traditional circuit the EA is unbalanced again when the feedback is pulled low. In our design, SS is clamped with FB by amplifier AI. The clamp circuit is active once FB is detected lower than reference VR2 (VR2

  • below.

    A. Clamp Circuit with Soft-Recovery Fig. 2 shows the schematic of the proposed clamp circuit

    with soft-recovery. The amplifier is formed by MI, M3, M4-M7. The input differential pair is unbalanced for-purpose in order to introduce an offset voltage Vos. The aspect ratio of (W/L)M6:(W/L)M7=n: 1, (W/L)M4:(W IL)Ms=I:I, (W/L)Ml:(W/L)M3=IO:1. When FB is pulled lower than VR2, the current flowing through MI pulls down SS, which would be clamped to VFB+VOS. The clamp circuit plays no role in the normal operation. The offset voltage can be obtained as:

    where /lp, Cox, W, L and I stands for effective channel mobility, gate oxide capacitance per unit area, channel width and length of a MOSFET transistor and the bias current, respectively.

    B. Error Amplifier with Soft-Start Fig. 3 shows the schematic of error amplifier with soft-start.

    The minimum selector function is chosen to be implemented as part of the pMOS differential input stage [S]. A three-limb differential pair is employed skillfully. The amplifier selects the positive input between SS and VRI automatically, which does not increase quiescent current consumption.

    IV. EXPERIMENTAL RESULTS

    A monolithic DC-DC buck converter using the proposed soft-start and soft-recovery circuit has been implemented with a O.S/lm IP3M CMOS process. The die size is I600/lmx2400/lm. The chip supports up to SA load current. The synchronous switch increases efficiency and eliminates the

    ss FB

    Fig. 2. Schematic of the proposed clamp circuit with soft-recovery.

    Fig. 3. Schematic of the error amplifier with minimum selector

    (Ill (b) Fig. 4. Measured waveforms (a)soft-start (b )short circuit recovery

    need for an external Schottky diode. The high side and low side switch on-resistance are only SOmQ and 30mQ, respectively. The measured waveform of soft-start with input voltage of SV, output voltage of 3.3V and load current of SA is shown in Fig. 4(a). The reference voltages of VRI and VR2 are O.SV and O.4V, respectively. SS ramps up linearly after EN is high. The inductor current IL and output voltage VOUT rises from zero to the normal operation in about Sms. No inrush current and voltage overshoot is found. Fig. 4(b) shows the soft-recovery operation with short circuit fault. It can be seen that SS is clamped to about 100m V when output is shorted to GND. The circuit recovers softly once the fault is removed. The measurement result shows that the proposed circuit work and agree well with the theoretical analysis. The soft-start and softrecovery circuit has no effect on normal operation.

    V. CONCLUSION

    An optimized soft-start circuit with soft-recovery function is presented in this paper. The soft-start strategy is based on a linearly ramped-up reference and the soft-recovery is implemented with a clamp circuit. The structure is compact and simple to implement. The circuit would be useful in various DC-DC converters.

    ACKNOWLEDGMENT

    This work was supported in part by the National Natural Science Foundation of China under Grant 61106026 and the Fundamental Research Funds for the Central Universities of China under Grant KSOSII 02002S.

    REFERENCES [I] B. Yuan. X.Q. Lai, Q. Ye, and x.z. Jia, "A novel compact soft-start

    circuit with internal circuitry for DC-DC converters," ASICON 2007 7''' Int. Can! on ASIC Froc, 2007, pp.450-453.

    [2] X.Q. Lai, J.P. Guo, W.X. Yu, and Y. Cao, "A novel digital soft-start circuit for DC-DC switching regulator," ASICON 2005 6,h Int. Can! on ASIC Proc, 2005, pp.564-567.

    [3] X.c. Jing, and P.K.T. Mok, "Soft-start circuit with duty ratio controlled voltage clamping and adaptive sizing technique for integrated DC-DC converters," IEEE Int. Can! Electron Devices Solid-State Circuits, EDSSC 2010, pp. 1-4.

    [4] M. AI-Shyoukh and H. Lee, "A compact ramp-based soft-start circuit for voltage regulators," IEEE Tran. Circuits Syst. II, vol. 56, no. 7, pp.535-539,2009.

    [5] M. AI-Shyoukh and H. Lee, "A compact fully-integrated extremumselector-based soft-start circuit for voltage regulators in bulk CMOS technologies," IEEE Tran. Circuits Syst. II, vol. 57, no. 10, pp.818-822, 2010.