scheme dell inspiron n5110 m5110 dq15 wistron queen 15 intel discrete uma sandy bridge

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Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.

QUEEN 15 A00Cover Page

A3

1 108Tuesday, January 04, 2011

<Core Design>

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<Core Design>

Intel PCH2011-01-04REV : A00

Discrete/UMA Schematics DocumentSandy Bridge

DY :None InstalledUMA:UMA ONLY installedDN15: ONLY FOR DN15 installed.DQ15:ONLY FOR DQ15 installed.PSL: KBC795 PSL circuit for 10mW solution installed.10mW: External circuit for 10mW solution installed.MUXLESS:MUXLESS solution installed.OPTIMUS:OPTIMUS solution installed.

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QUEEN 15 A00

Block Diagram


<Core Design>

A3

Title


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QUEEN 15 A00

Block Diagram


<Core Design>

A3

Title


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QUEEN 15 A00

Block Diagram


<Core Design>

A3

INPUTS

VGA

DCBATOUT

OUTPUTS

26

RT8208B

VGA_CORE

0D75V_S0

3D3V_AUX_S5

ISL95831HRTZINPUTS

VCC_CORE

OUTPUTS

SYSTEM DC/DCTPS51216RUKR

DDR_VREF_S3

OUTPUTS

CPU DC/DC

DCBATOUT

1D5V_S3

INPUTS

TPS51123RGER

DCBATOUT 5V_S5

OUTPUTS

3D3V_S5

TPS51218OUTPUTS

SYSTEM DC/DC

INPUTS

DCBATOUT

INPUTS

SYSTEM DC/DC

DCBATOUT

1D5V_S0

OUTPUTS

OUTPUTS

SYSTEM DC/DC

INPUTS

BQ24745INPUTS

TI CHARGER

DCBATOUT+PBATT

5V_AUX_S5

+DC_IN_S5

INPUTS

SYSTEM DC/DC

5V_S0

OUTPUTS

26

5V_S5

TPS51311

3D3V_S5

3D3V_S03D3V_S5

1D8V_S0

DCBATOUT

PCB LAYER

L1:TopL2:VCCL3:Signal

VCC_GFXCORE

1D5V_S3

ISL95831HRTZ

SYSTEM DC/DC

Switches

INPUTS OUTPUTS

1D05V_VTT

15V_S5

42~43

45

41

46

44

92

47

93

Project code : 91.4IE01.001PCB P/N : 10260-1Revision : A00

P2800

IDT92HD87

DMIx4

10/100/1000 NICRealtek

RJ45CONN

I/O Board

Connector

SPI

Flash ROM4MB

51

HDMIHDMI

88,89,90,91

83.84,85,86,87

RTL8111E/8105E

KBC

ThermalInt. KB

LPC Bus

DDRIII1066/1333

Intel CPUDDRIII 1066/1333 Channel A Slot 0

14

15

4,5,6,7,8,9,10,11,12,13

Slot 1

Block Diagram(Discrete/UMA co-lay)

Bluetooth 63

CRT Board

PCIE x 4

Left Side:USB x 1

CAMERA 54

Mini-Card

USB 2.0 x 3

802.11a/b/g

LVDS(Sigal Channel)

CRT

LCDRGB CRT

Intel

SATA x 2

14 USB 2.0/1.1 ports

High Definition AudioSATA ports (6)

ACPI 1.1LPC I/F

USB2.0 x 5

AzaliaCODEC

29

2CH SPEAKER

Internal Digital MIC

NPCE795P

ETHERNET (10/100/1000Mb)

NUVOTON

28

PCIE ports (8)

DDR3800MHz

55

1GB

Fan Control

4

VRAM

27

49

69 25

17,18,19,20,21,22,23,24,25,26

PCIe x 16

TouchPAD

69

FDIx4x2(UMA only)Discreet/UMA Co-lay

(Discrete only)

1.N12P-GE-A1-GP(64Mx16b*8) WKS P/N:72.51G63.H0U HYNIX WKS P/N:72.41164.I0U SAMSUNG

##OnMainBoard

D/A

USB 2.0 x 1

PCIE x 1

PCIE x 1USB2.0 x 1

LPC debug port

8282

60 71

40

G9731

INPUTS OUTPUTS

1D5V_S3 1V_VGA_S0

Robson-XT&Seymour-XT&Whistler-LP&N12P-GE

Sandy Bridge

DDRIII1066/1333

DDRIII 1066/1333 Channel B

PCHCougar Point

AZALIA64Finger Print

L4:SignalL5:GNDL6:Bottom

APL5916INPUTS

0D85V_S0

OUTPUTS

SYSTEM LDO

1D05V_VTT

48

VOSTRO

USB 2.0 x 1¡BPCIE X 1

56

ODD

56

HDD

RealtekRTS5138

CardReader

32

SD/MMC+/MS/MS Pro/xD

Express Card(On daughter board)

VOSTRO75

P2793

NEC USB3.0UPD720200FA

USB3.0 X2CONN

PCIE x 1

ESATA/USB/Powershare Combo

SATAx1 / USB2.0x1

SIMMini-Card

WWANPCIE x 1,USB x 1

MIC IN

HP1

57

A/D

58

74

DCIN

15~25W

ATI : Co-layout HDMI coming from UMA(default) & dGPU by reserving Resistor(0ohm) for optional selection.

NVidia : Co-layout HDMI coming from dGPU(Default) & UMA by reserving Resistor(0ohm) for optional selection.

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Title


Date: Sheet of


QUEEN 15 A00Table of Content

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

PCIE Routing

LANE2

LANE3

Card Reader

Onboard LANLANE4

Mini Card1(WLAN)SATA Table

Pair

SATA

Device

0

5

4

3

2

1

HDD1

ODD

N/A

HDD2

N/A

ESATA

LANE1

Mini Card2(WWAN)

LANE5

LANE6

LANE7

LANE8 Express Card

Intel GBE LAN

CFG[6:5]

CFG[7]

Processor Strapping

CFG[2]

Disabled - No Physical Display Port attached toEmbedded DisplayPort.CFG[4]

Pin Name Strap Description Configuration (Default value for each bit is 1 unless specified otherwise)

1:

Huron River Schematic Checklist Rev.0_7

0:PCI-Express StaticLane Reversal

Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

DefaultValue

PCI-ExpressPort BifurcationStraps

11 : x16 - Device 1 functions 1 and 2 disabled10 : x8, x8 - Device 1 function 1 enabled ;function 2 disabled01 : Reserved - (Device 1 function 1 disabled ;function 2 enabled)00 : x8, x4, x4 - Device 1 functions 1 and 2enabled

PEG DEFER TRAINING

1

0

1

1:

0:Enabled - An external Display Port device isconnectd to the EMBEDDED display Port

11

1:

0: PEG Train immediately following xxRESETB de assertion PEG Wait for BIOS for training

SPKR

Name Schematics Notes

HAD_DOCK_EN#/GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

HDA_SYNC

Huron River Schematic Checklist Rev.0_7

INIT3_3V# Weak internal pull-up. Leave as "No Connect".

GNT3#/GPIO55GNT2#/GPIO53GNT1#/GPIO51

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-downusing a 1k +/- 5% resistor. When this signal is sampled high at the rising edge ofRSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode isenabled.

PCH Strapping

SPI_MOSI

Internal weak Pull-down. Connect to Vcc3_3 with 8.2-k£[- 10-k£[ weak pull-up resistor.

NV_ALE

Enable Danbury:

Disable Danbury:

NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.

GPIO15

GPIO8

Reboot option at power-upDefault Mode:No Reboot Mode with TCO Disabled:

Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.

Left floating, no pull-down required.

Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor]

Leave floating (internal pull-down)

Low (0) - Flash Descriptor Security will be overridden. Also,when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features.High (1) - Security measure defined in the Flash Descriptor will be enabled.Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND asrequired by the functional strap, the signal should be pulled low through a weakpull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. Note: CRB recommends 1-kohm pull-down for FD Override. There is an internalpull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset forstrapping functions.

GPIO27

Default = Do not connect (floating)High(1) = Enables the internal VccVRM to have a clean supply foranalog rails. No need to use on-board filter circuit.Low (0) = Disables the VccVRM. Need to use on-board filtercircuits for analog rails.

Voltage RailsVOLTAGE DESCRIPTION

ACTIVE INPOWER PLANE

CPU Core RailGraphics Core Rail

AC Brick Mode only

Legacy WOL

Powered by Li Coin Cell in G3 and +V3ALW in Sx

3D3V_AUX_KBC

3.3V

DSW, Sx ON for supporting Deep Sleep states

S0

S3

All S states

WOL_EN

G3, Sx

5V_S03D3V_S01D8V_S01D5V_S01D05V_VTT0D85V_S00D75V_S0VCC_COREVCC_GFXCORE1D8V_VGA_S03D3V_VGA_S01V_VGA_S0

5V3.3V1.8V1.5V1.05V0.95 - 0.85V0.75V0.35V to 1.5V0.4 to 1.25V1.8V3.3V1V

5V1.5V0.75V

5V_USBX_S31D5V_S3DDR_VREF_S3

BT+DCBATOUT5V_S55V_AUX_S53D3V_S53D3V_AUX_S5

6V-14.1V6V-14.1V5V5V3.3V3.3V

3.3V3D3V_LAN_S5

3.3V

3D3V_AUX_S5

GNT[3:0]# functionality is not available on Mobile.Mobile: Used as GPIO onlyPull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail.

Enable Danbury:

Disable Danbury:

Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with noconfidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentialityNote : This is an un-muxed signal.This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. Sampled at rising edge of RSMRST#.CRB has a 1-kohm pull-up on this signal to +3.3VA rail.

SML1_CLK/SML1_DATA

PCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLK

Device

I C / SMBus Addresses2

EC SMBus 1BatteryCHARGER

EC SMBus 2PCHeDP

PCH SMBusSO-DIMMA (SPD)SO-DIMMB (SPD)Digital PotG-SensorMINI

BAT_SCL/BAT_SDA

SMBus ADDRESSES

HURON RIVER ORBAddress Hex Bus Ref Des

USB3.0

Dock

USB Table

13

USB Ext. port 3

12

X

Mini Card1 (WLAN)

Fingerprint

X

Express Card

USB Ext. port 2

10

0

11

USB Ext. port 1 (HS)

Pair

4

5

2

3

1

Device

6

7

8

9

BLUETOOTH

Touch Panel / 3G SIM

CARD READER

USB Ext. port 4 / E-SATA /USB CHARGER

CAMERA

Mini Card2 (WWAN) BAT_SCL/BAT_SDABAT_SCL/BAT_SDA

SML1_CLK/SML1_DATASML1_CLK/SML1_DATA

PCH_SMBDATA/PCH_SMBCLK

PCH_SMBDATA/PCH_SMBCLK

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_TXP[0..15]

PEG_TXN[0..15]

PEG_C_TXN3

PEG_C_TXN15

PEG_C_TXN10

PEG_C_TXN5

PEG_C_TXN0

PEG_C_TXN12

PEG_C_TXN7

PEG_C_TXN2

PEG_C_TXN14

PEG_C_TXN9

PEG_C_TXN4

PEG_C_TXN11

PEG_C_TXN6

PEG_C_TXN1

PEG_C_TXN13

PEG_C_TXN8

PEG_IRCOMP_R

PEG_RXN5PEG_RXN4PEG_RXN3PEG_RXN2PEG_RXN1

PEG_RXP5

PEG_RXN0

PEG_RXP4PEG_RXP3PEG_RXP2PEG_RXP1

PEG_RXN[0..15]

PEG_RXP0

PEG_RXP15

PEG_RXN15PEG_RXN14

PEG_RXP14PEG_RXP13PEG_RXP12

PEG_RXN13PEG_RXN12

PEG_RXP11

PEG_RXN11

PEG_RXP10

PEG_RXN10

PEG_RXP9

PEG_RXN9

PEG_RXP8

PEG_RXN8

PEG_RXP7

PEG_RXP[0..15]

PEG_RXP6

PEG_RXN7PEG_RXN6

PEG_C_TXP3

PEG_C_TXP15

PEG_C_TXP10

PEG_C_TXP5

PEG_C_TXP0

PEG_C_TXP12

PEG_C_TXP7

PEG_C_TXP2

PEG_C_TXP14

PEG_C_TXP9

PEG_C_TXP4

PEG_C_TXP11

PEG_C_TXP6

PEG_C_TXP1

PEG_C_TXP13

PEG_C_TXP8

PEG_TXN0PEG_TXN1PEG_TXN2PEG_TXN3PEG_TXN4PEG_TXN5PEG_TXN6PEG_TXN7PEG_TXN8PEG_TXN9PEG_TXN10PEG_TXN11PEG_TXN12PEG_TXN13PEG_TXN14PEG_TXN15

PEG_TXP15PEG_TXP14PEG_TXP13PEG_TXP12PEG_TXP11PEG_TXP10PEG_TXP9PEG_TXP8PEG_TXP7PEG_TXP6PEG_TXP5PEG_TXP4PEG_TXP3PEG_TXP2PEG_TXP1PEG_TXP0

DP_COMP

eDP_HPD

FDI_TXP4FDI_TXP5

DMI_TXN0DMI_TXN1DMI_TXN2DMI_TXN3

DMI_TXP0DMI_TXP1DMI_TXP2DMI_TXP3

DMI_RXN0DMI_RXN1DMI_RXN2DMI_RXN3

DMI_RXP0DMI_RXP1DMI_RXP2DMI_RXP3

FDI_TXP6FDI_TXP7

FDI_TXN0FDI_TXN1

FDI_TXN3FDI_TXN4FDI_TXN5FDI_TXN6FDI_TXN7

FDI_TXN2

FDI_TXP0FDI_TXP1FDI_TXP2FDI_TXP3

1D05V_VTT

1D05V_VTT PEG_TXP[0..15] 83

PEG_TXN[0..15] 83

PEG_RXP[0..15] 83

PEG_RXN[0..15] 83

DMI_RXN[3:0]19

DMI_RXP[3:0]19

DMI_TXN[3:0]19

DMI_TXP[3:0]19

FDI_TXN[7:0]19

FDI_TXP[7:0]19

FDI_FSYNC019FDI_FSYNC119

FDI_INT19

FDI_LSYNC019FDI_LSYNC119

Title


Date: Sheet of


QUEEN 15 A00CPU (PCIE/DMI/FDI)

A3


<Variant Name>

Title


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A3


<Variant Name>

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A3


<Variant Name>

SSID = CPU

Stuff to disable internal graphicsfunction for power saving.

NOTE:Select a Fast FET similar to 2N7002E whose rise/fall time is less than 6 ns. If HPD on eDP interface is disabled, connect it to CPU VCCIO via a 10-k£[ pull-Up resistor on the motherboard.

NOTE.If PEG is not implemented, the RX&TX pairs can be left as No Connect

NOTE.Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.

PEG Static Lane Reversal

Signal Routing Guideline:PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

Note:Intel DMI supports both LaneReversal and polarity inversionbut only at PCH side. This isenabled via a soft strap.

Note:Lane reversal does not apply toFDI sideband signals.

Note:Intel FDI supports both LaneReversal and polarity inversionbut only at PCH side. This isenabled via a soft strap.

Signal Routing Guideline:EDP_ICOMPO keep W/S=12/15 mils and routinglength less than 500 mils.EDP_COMPIO keep W/S=4/15 mils and routinglength less than 500 mils.

0719 Modify:un-stuff R403 base on Intel James feedback list.

A00 0103 add 3rd foxcon CPU1 at XBuild batch run

1 2C404 SCD22U10V2KX-1GPMUXLESSC404 SCD22U10V2KX-1GPMUXLESS


1 2R40310KR2J-3-GPDY

R40310KR2J-3-GPDY

1 2C426 SCD22U10V2KX-1GPMUXLESSC426 SCD22U10V2KX-1GPMUXLESS1 2C425 SCD22U10V2KX-1GPMUXLESSC425 SCD22U10V2KX-1GPMUXLESS


1 2R401 24D9R2F-L-GPR401 24D9R2F-L-GP



DMI_RX#0B27DMI_RX#1B25DMI_RX#2A25DMI_RX#3B24

DMI_RX0B28DMI_RX1B26DMI_RX2A24DMI_RX3B23

DMI_TX#0G21DMI_TX#1E22DMI_TX#2F21DMI_TX#3D21

DMI_TX0G22DMI_TX1D22

DMI_TX3C21 DMI_TX2F20

FDI0_TX#0A21FDI0_TX#1H19FDI0_TX#2E19FDI0_TX#3F18FDI1_TX#0B21FDI1_TX#1C20FDI1_TX#2D18FDI1_TX#3E17

FDI0_TX0A22FDI0_TX1G19FDI0_TX2E20FDI0_TX3G18FDI1_TX0B20FDI1_TX1C19FDI1_TX2D19FDI1_TX3F17

FDI0_FSYNCJ18FDI1_FSYNCJ17

FDI_INTH20

FDI0_LSYNCJ19FDI1_LSYNCH17

PEG_ICOMPI J22PEG_ICOMPO J21

PEG_RCOMPO H22

PEG_RX#0 K33PEG_RX#1 M35PEG_RX#2 L34PEG_RX#3 J35PEG_RX#4 J32PEG_RX#5 H34PEG_RX#6 H31PEG_RX#7 G33PEG_RX#8 G30PEG_RX#9 F35

PEG_RX#10 E34PEG_RX#11 E32PEG_RX#12 D33PEG_RX#13 D31PEG_RX#14 B33PEG_RX#15 C32

PEG_RX0 J33PEG_RX1 L35PEG_RX2 K34PEG_RX3 H35PEG_RX4 H32PEG_RX5 G34PEG_RX6 G31PEG_RX7 F33PEG_RX8 F30PEG_RX9 E35

PEG_RX10 E33PEG_RX11 F32PEG_RX12 D34PEG_RX13 E31PEG_RX14 C33PEG_RX15 B32

PEG_TX#0 M29PEG_TX#1 M32PEG_TX#2 M31PEG_TX#3 L32PEG_TX#4 L29PEG_TX#5 K31PEG_TX#6 K28PEG_TX#7 J30PEG_TX#8 J28PEG_TX#9 H29

PEG_TX#10 G27PEG_TX#11 E29PEG_TX#12 F27PEG_TX#13 D28PEG_TX#14 F26PEG_TX#15 E25

PEG_TX0 M28PEG_TX1 M33PEG_TX2 M30PEG_TX3 L31PEG_TX4 L28PEG_TX5 K30PEG_TX6 K27PEG_TX7 J29PEG_TX8 J27PEG_TX9 H28

PEG_TX10 G28PEG_TX11 E28PEG_TX12 F28PEG_TX13 D27PEG_TX14 E26PEG_TX15 D25

EDP_AUXC15EDP_AUX#D15

EDP_TX0C17EDP_TX1F16EDP_TX2C16EDP_TX3G15

EDP_TX#0C18EDP_TX#1E16EDP_TX#2D16EDP_TX#3F15

EDP_COMPIOA18

EDP_HPDB16 EDP_ICOMPOA17

PCI EXPRESS* - GRAPHICS

DMI

Intel(R) FDI

eDP

1 OF 9

SANDY

CPU1A

SANDY

62.10055.421SKT-BGA989C470395-1H180

2nd = 62.10040.7713rd = 62.10055.321

PCI EXPRESS* - GRAPHICS

DMI

Intel(R) FDI

eDP

1 OF 9

SANDY

CPU1A

SANDY

62.10055.421SKT-BGA989C470395-1H180

2nd = 62.10040.7713rd = 62.10055.321



1 2C414 SCD22U10V2KX-1GPMUXLESSC414 SCD22U10V2KX-1GPMUXLESS1 2C416 SCD22U10V2KX-1GPMUXLESSC416 SCD22U10V2KX-1GPMUXLESS















1 2R402 24D9R2F-L-GPR402 24D9R2F-L-GP








5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SKTOCC#_R

H_CATERR#

SM_RCOMP_0SM_RCOMP_1SM_RCOMP_2

XDP_TRST#

XDP_TCLK

XDP_PRDY#XDP_PREQ#

H_PROCHOT#_R

BUF_CPU_RST#

XDP_BPM1XDP_BPM2XDP_BPM3

XDP_BPM0

XDP_BPM4XDP_BPM5XDP_BPM6XDP_BPM7

VDDPWRGOOD

XDP_DBRESET#

CLK_DP_P_RCLK_DP_N_R

H_PROCHOT#

H_CPUPWRGD_R

XDP_TMSXDP_TCLK

XDP_TRST#

XDP_TDIXDP_TDO

XDP_DBRESET#

BUF_CPU_RST#BUFO_CPU_RST#

XDP_TDO

XDP_TDIXDP_TMS

XDP_TRST#

XDP_DBRESET#

1D05V_VTT

3D3V_S0

1D05V_VTT

1D05V_VTT

1D05V_VTT

3D3V_S0

H_PM_SYNC19

PM_DRAM_PWRGD19,37

H_PECI22,27

H_CPUPWRGD22,36

H_THERMTRIP#22,36

H_PROCHOT#27,40,42

CLK_EXP_P 20CLK_EXP_N 20H_SNB_IVB#18

PLT_RST#18,27,71,75,82,83

VDDPWRGOOD37

SM_DRAMRST# 37

XDP_DBRESET#19

PLT_RST#18,27,71,75,82,83

Title


Date: Sheet of


QUEEN 15 A00

CPU (THERMAL/CLOCK/PM )A3


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00



<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00



<Variant Name>

SSID = CPU Disabling Guidelines:If motherboard only supports external graphics:Connect DPLL_REF_SSCLK on Processor to GND through1K +/- 5% resistor.Connect DPLL_REF_SSCLK# on Processor to VCCPthrough 1K +/- 5% resistorpower (~15 mW) may bewasted.

Signal Routing Guideline:SM_RCOMP keep routing length less than 500 mils.

0617 Modify:Joseph change RN501 to R512,R514 1K 0402 Resistor.

0617 Modify:Joseph Removed U501 Buffer reset to CPU circuit.

0623 Modify:Reserved C501 220pF 0402 on BUF_CPU_RST#.

20100622 V1.2

CRB : 47pfCEKLT:43pf

Connect EC to PROCHOT# through inverting OD buffer.

0625 Modify:Add C502 47p 0402 on H_PROCHOT#.

0630 Modify:Removed XDP1101 connector related circuit by layout limitation.

0707 Modify:Change R516 10K from 1K

0719 Modify: Add buffer for PLT_RST# based on Intel review.

Buffered reset to CPU

0721 Modify:SWAP RN501 pin1,2,3 base on swap report.

A00 1229 EMI

A00 1229 EMI

A00 1230 EMI


12

EC50

4

SC1K

P50V

2KX-

1GP

EC50

4

SC1K

P50V

2KX-

1GP

1 2R5040R0402-PADR5040R0402-PAD

1 2R501

62R2J-GP

R501

62R2J-GP

1 2R5024K99R2F-L-GP

R5024K99R2F-L-GP

1 2R510

1K5R2F-2-GP

R510

1K5R2F-2-GP

1 TP503 TPAD14-GPTP503 TPAD14-GP

12

C501SC220P50V2KX-3GPDY C501SC220P50V2KX-3GPDY

1234 5

678

RN501

SRN51J-1-GP

RN501

SRN51J-1-GP

1 2 R51610KR2J-3-GPR51610KR2J-3-GP

12

C502SC47P50V2JN-3GPC502SC47P50V2JN-3GP

12

EC50

6

MS0

4A03

T2V2

-GP-

U

DY

EC50

6

MS0

4A03

T2V2

-GP-

U

DY

1 TP504 TPAD14-GPTP504 TPAD14-GP1 TP505 TPAD14-GPTP505 TPAD14-GP

1TP501TPAD14-GP TP501TPAD14-GP

12

R5150R2J-2-GPDYR5150R2J-2-GPDY


1 2R506 140R2F-GPR506 140R2F-GP

12EC505

MS04A03T2V2-GP-UDYEC505

MS04A03T2V2-GP-UDY

1 2R517 43R2J-GPDYR517 43R2J-GPDY


1 2R50310KR2J-3-GP

R50310KR2J-3-GP

1 2R5050R2J-2-GPDYR5050R2J-2-GPDY

1 TP508 TPAD14-GPTP508 TPAD14-GP1

2

C503SCD1U10V2KX-5GPDYC503SCD1U10V2KX-5GPDY


12

R509750R2F-GPR509750R2F-GP

1 2R511 51R2J-2-GPR511 51R2J-2-GP1 TP509 TPAD14-GPTP509 TPAD14-GP


SM_RCOMP1 A5SM_RCOMP2 A4

SM_DRAMRST# R8

SM_RCOMP0 AK1

BCLK# A27BCLK A28

DPLL_REF_SSCLK# A15DPLL_REF_SSCLK A16

CATERR#AL33

PECIAN33

PROCHOT#AL32

THERMTRIP#AN32

SM_DRAMPWROKV8

RESET#AR33

PRDY# AP29PREQ# AP27

TCK AR26TMS AR27

TRST# AP30

TDI AR28TDO AP26

DBR# AL35

BPM#0 AT28BPM#1 AR29BPM#2 AR30BPM#3 AT30BPM#4 AP32BPM#5 AR31BPM#6 AT31BPM#7 AR32

PM_SYNCAM34

SKTOCC#AN34

SNB_IVB#C26

UNCOREPWRGOODAP33

CLOCKS

MISC

THERMAL

PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

2 OF 9

SANDY

CPU1B

SANDY

62.10055.421SKT-BGA989C470395-1H180

2nd = 62.10040.7713rd = 62.10055.321

CLOCKS

MISC

THERMAL

PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

2 OF 9

SANDY

CPU1B

SANDY

62.10055.421SKT-BGA989C470395-1H180

2nd = 62.10040.7713rd = 62.10055.321

1 2R5141KR2J-1-GP

R5141KR2J-1-GP


1 2R507 25D5R2F-GPR507 25D5R2F-GP


12

EC50

2

SC1K

P50V

2KX-

1GP

EC50

2

SC1K

P50V

2KX-

1GP

12

R51875R2J-1-GPDY R51875R2J-1-GPDY

1 2R513

56R2J-4-GP

R513

56R2J-4-GP 1 2R508 200R2F-L-GPR508 200R2F-L-GP

IN B1

IN A2

GND3 OUT Y 4

VCC 5U501

74VHC1G09DFT2G-GP

73.01G09.AAH

DY

U501

74VHC1G09DFT2G-GP

73.01G09.AAH

DY

1 2R5121KR2J-1-GP

R5121KR2J-1-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_A_DQ44

M_A_DQ36

M_A_DQ47

M_A_DQ40M_A_DQ39

M_A_DQ37

M_A_DQ35M_A_DQ34

M_A_DQ59

M_A_DQ54M_A_DQ53

M_A_DQ63

M_A_DQ60M_A_DQ61

M_A_DQ58

M_A_DQ51

M_A_DQ48

M_A_DQ57

M_A_DQ55

M_A_DQ49M_A_DQ50

M_A_DQ62

M_A_DQ52

M_A_DQ56

M_A_DQ[63:0]M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3

M_A_DQ7

M_A_DQ5M_A_DQ4

M_A_DQ6

M_A_DQ12

M_A_DQ10

M_A_DQ13

M_A_DQ9M_A_DQ8

M_A_DQ11

M_A_DQ15M_A_DQ14

M_A_DQ27

M_A_DQ25

M_A_DQ20M_A_DQ19

M_A_DQ30

M_A_DQ18

M_A_DQ16

M_A_DQ28

M_A_DQ17

M_A_DQ26

M_A_DQ31

M_A_DQ29

M_A_DQ22M_A_DQ23M_A_DQ24

M_A_DQ21

M_A_DQ46

M_A_DQ42

M_A_DQ38

M_A_DQ32

M_A_DQ45

M_A_DQ33

M_A_DQ43

M_A_DQ41

M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11

M_B_DQ15

M_B_DQ13M_B_DQ12

M_B_DQ14

M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19

M_B_DQ23

M_B_DQ21M_B_DQ20

M_B_DQ22

M_B_DQ28

M_B_DQ26

M_B_DQ29

M_B_DQ25

M_B_DQ31

M_B_DQ24

M_B_DQ27

M_B_DQ30


M_B_DQ39

M_B_DQ37M_B_DQ36

M_B_DQ38

M_B_DQ44

M_B_DQ42

M_B_DQ45

M_B_DQ41

M_B_DQ47

M_B_DQ40

M_B_DQ43

M_B_DQ46


M_B_DQ55

M_B_DQ53M_B_DQ52

M_B_DQ54

M_B_DQ60

M_B_DQ58

M_B_DQ61

M_B_DQ57

M_B_DQ63

M_B_DQ56

M_B_DQ59

M_B_DQ62

M_B_DQ[63:0]

M_A_DQS4M_A_DQS3

M_A_DQS5M_A_DQS6M_A_DQS7

M_A_DQS2M_A_DQS1M_A_DQS0

M_A_A7

M_A_A12

M_A_A14M_A_A13

M_A_A9

M_A_A15

M_A_A10

M_A_A0

M_A_A6

M_A_A8

M_A_A1M_A_A2M_A_A3M_A_A4M_A_A5

M_A_A11

M_A_DQS#4M_A_DQS#5M_A_DQS#6M_A_DQS#7

M_A_DQS#3M_A_DQS#2M_A_DQS#1M_A_DQS#0

M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7

M_B_DQS#3M_B_DQS#2M_B_DQS#1M_B_DQS#0

M_B_DQS#7M_B_DQS#6M_B_DQS#5M_B_DQS#4

M_B_A5M_B_A6M_B_A7M_B_A8M_B_A9M_B_A10M_B_A11M_B_A12M_B_A13M_B_A14M_B_A15

M_B_A4M_B_A3M_B_A2M_B_A1M_B_A0

M_A_DQ[63:0]15 M_B_DQ[63:0]14

M_A_BS015M_A_BS115M_A_BS215

M_A_CAS#15M_A_RAS#15M_A_WE#15

M_B_BS014M_B_BS114M_B_BS214

M_B_CAS#14M_B_RAS#14M_B_WE#14

M_A_DQS#[7:0] 15

M_A_A[15:0] 15

M_A_DQS[7:0] 15

M_A_DIM0_CKE0 15

M_A_DIM0_CKE1 15

M_A_DIM0_CS#0 15M_A_DIM0_CS#1 15

M_A_DIM0_ODT0 15M_A_DIM0_ODT1 15

M_A_DIM0_CLK_DDR0 15M_A_DIM0_CLK_DDR#0 15


M_B_A[15:0] 14

M_B_DQS[7:0] 14

M_B_DQS#[7:0] 14

M_B_DIM0_CKE0 14

M_B_DIM0_CKE1 14

M_B_DIM0_CS#0 14M_B_DIM0_CS#1 14

M_B_DIM0_ODT0 14M_B_DIM0_ODT1 14

M_B_DIM0_CLK_DDR0 14M_B_DIM0_CLK_DDR#0 14


Title


Date: Sheet of


QUEEN 15 A00CPU (DDR)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = CPU

A00 0103 add 3rd foxcon CPU1 at XBuild batch run A00 0103 add 3rd foxcon CPU1 at XBuild batch run

SB_BS0AA9SB_BS1AA7SB_BS2R6

SB_CAS#AA10SB_RAS#AB8SB_WE#AB9

SB_CLK0 AE2

SB_CLK1 AE1

SB_CLK#0 AD2

SB_CLK#1 AD1

SB_CKE0 R9

SB_CKE1 R10

SB_ODT0 AE4SB_ODT1 AD4

SB_DQS4 AN6

SB_DQS#4 AN5

SB_DQS5 AP8

SB_DQS#5 AP9

SB_DQS6 AK11

SB_DQS#6 AK12

SB_DQS7 AP14

SB_DQS#7 AP15

SB_DQS0 C7

SB_DQS#0 D7

SB_DQS1 G3

SB_DQS#1 F3

SB_DQS2 J6

SB_DQS#2 K6

SB_DQS3 M3

SB_DQS#3 N3

SB_MA0 AA8SB_MA1 T7SB_MA2 R7SB_MA3 T6SB_MA4 T2SB_MA5 T4SB_MA6 T3SB_MA7 R2SB_MA8 T5SB_MA9 R3

SB_MA10 AB7SB_MA11 R1SB_MA12 T1SB_MA13 AB10SB_MA14 R5SB_MA15 R4

SB_DQ0C9SB_DQ1A7SB_DQ2D10SB_DQ3C8SB_DQ4A9SB_DQ5A8SB_DQ6D9SB_DQ7D8SB_DQ8G4SB_DQ9F4SB_DQ10F1SB_DQ11G1SB_DQ12G5SB_DQ13F5SB_DQ14F2SB_DQ15G2SB_DQ16J7SB_DQ17J8SB_DQ18K10SB_DQ19K9SB_DQ20J9SB_DQ21J10SB_DQ22K8SB_DQ23K7SB_DQ24M5SB_DQ25N4SB_DQ26N2SB_DQ27N1SB_DQ28M4SB_DQ29N5SB_DQ30M2SB_DQ31M1SB_DQ32AM5SB_DQ33AM6SB_DQ34AR3SB_DQ35AP3SB_DQ36AN3SB_DQ37AN2SB_DQ38AN1SB_DQ39AP2SB_DQ40AP5SB_DQ41AN9SB_DQ42AT5SB_DQ43AT6SB_DQ44AP6SB_DQ45AN8SB_DQ46AR6SB_DQ47AR5SB_DQ48AR9SB_DQ49AJ11SB_DQ50AT8SB_DQ51AT9SB_DQ52AH11SB_DQ53AR8SB_DQ54AJ12SB_DQ55AH12SB_DQ56AT11SB_DQ57AN14SB_DQ58AR14SB_DQ59AT14SB_DQ60AT12SB_DQ61AN15SB_DQ62AR15SB_DQ63AT15

SB_CLK2 AB2SB_CLK#2 AA2SB_CKE2 T9

SB_CLK3 AA1SB_CLK#3 AB1SB_CKE3 T10

SB_CS#0 AD3SB_CS#1 AE3SB_CS#2 AD6SB_CS#3 AE6

SB_ODT2 AD5SB_ODT3 AE5

DDR SYSTEM MEMORY B

4 OF 9

SANDY

CPU1D

SANDY

2nd = 62.10040.77162.10055.421

3rd = 62.10055.321

DDR SYSTEM MEMORY B

4 OF 9

SANDY

CPU1D

SANDY

2nd = 62.10040.77162.10055.421

3rd = 62.10055.321

SA_BS0AE10SA_BS1AF10SA_BS2V6

SA_CAS#AE8SA_RAS#AD9SA_WE#AF9

SA_CLK0 AB6

SA_CLK1 AA5

SA_CLK#0 AA6

SA_CLK#1 AB5

SA_CKE0 V9

SA_CKE1 V10

SA_CS#0 AK3SA_CS#1 AL3

SA_ODT0 AH3SA_ODT1 AG3

SA_DQS0 D4

SA_DQS#0 C4

SA_DQS1 F6

SA_DQS#1 G6

SA_DQS2 K3

SA_DQS#2 J3

SA_DQS3 N6

SA_DQS#3 M6

SA_DQS4 AL5

SA_DQS#4 AL6

SA_DQS5 AM9

SA_DQS#5 AM8

SA_DQS6 AR11

SA_DQS#6 AR12

SA_DQS7 AM14

SA_DQS#7 AM15

SA_MA0 AD10SA_MA1 W1SA_MA2 W2SA_MA3 W7SA_MA4 V3SA_MA5 V2SA_MA6 W3SA_MA7 W6SA_MA8 V1SA_MA9 W5

SA_MA10 AD8SA_MA11 V4SA_MA12 W4SA_MA13 AF8SA_MA14 V5SA_MA15 V7

SA_DQ0C5SA_DQ1D5SA_DQ2D3SA_DQ3D2SA_DQ4D6SA_DQ5C6SA_DQ6C2SA_DQ7C3SA_DQ8F10SA_DQ9F8SA_DQ10G10SA_DQ11G9SA_DQ12F9SA_DQ13F7SA_DQ14G8SA_DQ15G7SA_DQ16K4SA_DQ17K5SA_DQ18K1SA_DQ19J1SA_DQ20J5SA_DQ21J4SA_DQ22J2SA_DQ23K2SA_DQ24M8SA_DQ25N10SA_DQ26N8SA_DQ27N7SA_DQ28M10SA_DQ29M9SA_DQ30N9SA_DQ31M7SA_DQ32AG6SA_DQ33AG5SA_DQ34AK6SA_DQ35AK5SA_DQ36AH5SA_DQ37AH6SA_DQ38AJ5SA_DQ39AJ6SA_DQ40AJ8SA_DQ41AK8SA_DQ42AJ9SA_DQ43AK9SA_DQ44AH8SA_DQ45AH9SA_DQ46AL9SA_DQ47AL8SA_DQ48AP11SA_DQ49AN11SA_DQ50AL12SA_DQ51AM12SA_DQ52AM11SA_DQ53AL11SA_DQ54AP12SA_DQ55AN12SA_DQ56AJ14SA_DQ57AH14SA_DQ58AL15SA_DQ59AK15SA_DQ60AL14SA_DQ61AK14SA_DQ62AJ15SA_DQ63AH15

SA_CLK2 AB4SA_CLK#2 AA4

SA_CLK3 AB3SA_CLK#3 AA3

SA_CKE2 W9

SA_CKE3 W10

SA_CS#2 AG1SA_CS#3 AH1

SA_ODT2 AG2SA_ODT3 AH2

DDR SYSTEM MEMORY A

3 OF 9

SANDY

CPU1C

SANDY

2nd = 62.10040.77162.10055.421

3rd = 62.10055.321

DDR SYSTEM MEMORY A

3 OF 9

SANDY

CPU1C

SANDY

2nd = 62.10040.77162.10055.421

3rd = 62.10055.321

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CFG0

CFG4

CFG2

CFG5CFG6CFG7

CFG2

CFG6

CFG5

CFG7

M_VREF_DQ_DIMM0_C

CFG4

M_VREF_DQ_DIMM1_C

H_VCCP_SEL

TP713TP714

M_VREF_DQ_DIMM0

M_VREF_CA_DIMM0

M_VREF_CA_DIMM1

M_VREF_DQ_DIMM1

1D05V_VTT

Title


Date: Sheet of


QUEEN 15 A00CPU (RESERVED)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = CPUPEG Static Lane Reversal

1: Normal Operation; Lane # definition matches socket pin map definitionCFG2

CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled

PCIE Port Bifurcation Straps

1: PEG Train immediately following xxRESETB de assertionCFG7

PEG DEFER TRAINING

0:Lane Reversed

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

0: PEG Wait for BIOS for training

B4:VREF_DQ CHA

D1:VREF_DQ CHB

M3 - Processor Generated SO-DIMM VREF_DQ

20 mils

0: Enabled; An external Display Port device is connected to the Embedded Display Port

Display Port Presence Strap

1: Disabled; No Physical Display Port attached to Embedded Display Port

CFG4

0617 Modify:Joseph Change M_VREF_DQ_DIMM0,M_VREF_DQ_DIMM1,M_VREF_CA_DIMM0,M_VREF_CA_DIMM1 from net to power.

0629 Modify:Reserved R710 0ohm to GND to follow EV board schematic.

0630 Modify:Removed CLK_XDP_ITP_P&N and reserved TP713,TP714.

0630 Modify:Reserved TP715 on CFG0.

0702 Modify

0707 Modify:Removed CFG1,CFG3,CFG8~17 TP.

0719 Modify:Reserved EC701 0.1uF near R711(BOTTOM) for EMC NEO suggestion. A00 0103 add 3rd foxcon CPU1 at XBuild batch run

12

R701

1KR

2J-1

-GP

DYR701

1KR

2J-1

-GP

DY

CFG0AK28CFG1AK29CFG2AL26CFG3AL27CFG4AK26CFG5AL29CFG6AL30CFG7AM31CFG8AM32CFG9AM30CFG10AM28CFG11AM26CFG12AN28CFG13AN31CFG14AN26CFG15AM27CFG16AK31CFG17AN29

RSVD#AM33 AM33RSVD#AJ27 AJ27

RSVD#J16 J16

RSVD#AT34 AT34

RSVD#H16 H16RSVD#G16 G16

RSVD#AR35 AR35

RSVD#AT33 AT33

RSVD#AR34 AR34

RSVD#AT2 AT2RSVD#AT1 AT1RSVD#AR1 AR1

RSVD#B34 B34RSVD#A33 A33RSVD#A34 A34RSVD#B35 B35RSVD#C35 C35

RSVD#AJ32 AJ32RSVD#AK32 AK32

RSVD#AE7 AE7RSVD#AK2 AK2

RSVD#L7 L7RSVD#AG7 AG7

RSVD#J15J15

RSVD#C30C30 RSVD#D23D23

RSVD#A31A31RSVD#B30B30

RSVD#D30D30 RSVD#B29B29

RSVD#A30A30 RSVD#B31B31

RSVD#C29C29

RSVD#J20J20

RSVD#T8 T8

RSVD#B4B4RSVD#D1D1

RSVD#F25F25RSVD#F24F24

RSVD#D24D24RSVD#G25G25RSVD#G24G24RSVD#E23E23

RSVD#W8 W8

RSVD#AT26 AT26

RSVD#B18B18

RSVD#AP35 AP35

RSVD#F23F23

RSVD#AJ26AJ26

RSVD#AJ31AJ31RSVD#AH31AH31RSVD#AJ33AJ33RSVD#AH33AH33

RSVD#AH27 AH27

RSVD#A19A19

RSVD#AN35 AN35RSVD#AM35 AM35

RESERVED

5 OF 9

SANDY

CPU1E

SANDY

62.10055.421SKT-BGA989C470395-1H180

2nd = 62.10040.7713rd = 62.10055.321

RESERVED

5 OF 9

SANDY

CPU1E

SANDY

62.10055.421SKT-BGA989C470395-1H180

2nd = 62.10040.7713rd = 62.10055.321

12

R711

1KR2F-3-GP

R711

1KR2F-3-GP

1 2R708 0R2J-2-GPDY

R708 0R2J-2-GPDY

12

R7051KR2J-1-GPDYR7051KR2J-1-GPDY

12

R704

1KR

2J-1

-GP

DYR704

1KR

2J-1

-GP

DY

1TP713 TPAD14-GPTP713 TPAD14-GP

12

EC70

1SC

D1U

50V3

KX-G

PDY

EC70

1SC

D1U

50V3

KX-G

PDY

1 2R706 0R2J-2-GPDYR706 0R2J-2-GPDY

12

R7021KR2J-1-GPMUXLESSR7021KR2J-1-GPMUXLESS


12

R7033K3R2F-2-GPDY R7033K3R2F-2-GPDY



1 2R709 0R2J-2-GPDY

R709 0R2J-2-GPDY


12

R712

1KR2F-3-GP

R712

1KR2F-3-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_CPU_SVIDCLKH_CPU_SVIDALRT#

H_CPU_SVIDDAT

H_CPU_SVIDDAT

VCC_CORE

1D05V_VTT

VCC_CORE

VCC_CORE

1D05V_VTT

1D05V_VTT

VCCSENSE 42VSSSENSE 42

VCCIO_SENSE 45

H_CPU_SVIDDAT 42

VR_SVID_ALERT# 42H_CPU_SVIDCLK 42

VSSIO_SENSE 45

Title


Date: Sheet of


QUEEN 15 A00CPU (VCC_CORE)

Custom


<Core Design>

Title


Date: Sheet of



Custom


<Core Design>

Title


Date: Sheet of



Custom


<Core Design>

PROCESSOR CORE POWER

53A

SSID = CPU

No-stuff sites outside the socket may be removed.No-stuff sites inside the socket cavity need to remain.

VCC Output Decoupling Recommendation:4 x 470 uF at Bottom Socket Edge8 x 22 uF at Top Socket Cavity8 x 22 uF at Top Socket Edge8 x 22 uF at Bottom Socket Cavity

VCCIO Output Decoupling Recommendation:2 x 330 uF (3 x 330 uF for 2012 capable designs)5 x 22 uF & 5 x 0805 no-stuff at Bottom7 x 22 uF & 2 x 0805 no-stuff at Top

0617 Modify:Joseph Removed C812,C813,C814

0705 Modify:Removed R805,R806, already PH closed PWM side.

20100610 V1.0

For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7For CRB VIDALERT# need to pull high 75 ohm close to CPU

PROCESSOR VCCIO: 8.5A

0713 Modify:Removed C818 10uf 0603 cap base on layout limitation.

0713 Modify:Removed C810,C806,C807 10uf 0603 cap base on layout limitation.

0713 Modify:Removed C802,C811 10uf 0603 cap base on layout limitation.

0721 Modify:Removed C836.

0721 Modify:Removed C822,C823,C824

0819 De-cap

0726 Modify:un-stuff C826.


0819 De-cap

0819 De-cap

X02 1115

1115 X02 Modify:Reserved C802~C804,C806,C807 10uF 0603for power team fine tune Vcore quality.


12

C84

5SC

10U

6D3V

5KX-

1GP

C84

5SC

10U

6D3V

5KX-

1GP

12

C84

4SC

10U

6D3V

5KX-

1GP

C84

4SC

10U

6D3V

5KX-

1GP

VCC_SENSE AJ35VSS_SENSE AJ34

VIDALERT# AJ29VIDSCLK AJ30VIDSOUT AJ28

VSSIO_SENSE A10

VCCAG35VCCAG34VCCAG33VCCAG32VCCAG31VCCAG30VCCAG29VCCAG28VCCAG27VCCAG26VCCAF35VCCAF34VCCAF33VCCAF32VCCAF31VCCAF30VCCAF29VCCAF28VCCAF27VCCAF26VCCAD35VCCAD34VCCAD33VCCAD32VCCAD31VCCAD30VCCAD29VCCAD28VCCAD27VCCAD26VCCAC35VCCAC34VCCAC33VCCAC32VCCAC31VCCAC30VCCAC29VCCAC28VCCAC27VCCAC26VCCAA35VCCAA34VCCAA33VCCAA32VCCAA31VCCAA30VCCAA29VCCAA28VCCAA27VCCAA26VCCY35VCCY34VCCY33VCCY32VCCY31VCCY30VCCY29VCCY28VCCY27VCCY26VCCV35VCCV34VCCV33VCCV32VCCV31VCCV30VCCV29VCCV28VCCV27VCCV26VCCU35VCCU34VCCU33VCCU32VCCU31VCCU30VCCU29VCCU28VCCU27VCCU26VCCR35VCCR34VCCR33VCCR32VCCR31VCCR30VCCR29VCCR28VCCR27VCCR26VCCP35VCCP34VCCP33VCCP32VCCP31VCCP30VCCP29VCCP28VCCP27VCCP26

VCCIO AH13

VCCIO J11

VCCIO G12VCCIO F14VCCIO F13VCCIO F12VCCIO F11VCCIO E14VCCIO E12

VCCIO AH10VCCIO AG10VCCIO AC10VCCIO Y10VCCIO U10VCCIO P10VCCIO L10VCCIO J14VCCIO J13VCCIO J12

VCCIO H14VCCIO H12VCCIO H11VCCIO G14VCCIO G13

VCCIO E11

VCCIO C12VCCIO C11VCCIO B14VCCIO B12VCCIO A14VCCIO A13VCCIO A12VCCIO A11

VCCIO D14VCCIO D13VCCIO D12VCCIO D11VCCIO C14VCCIO C13

VCCIO_SENSE B10

VCCIO J23

POWER

CORE SUPPLY

PEG AND DDR

SENSE LINES

SVID

6 OF 9

SANDY

CPU1F

SANDY

2nd = 62.10040.77162.10055.421 3rd = 62.10055.321

POWER

CORE SUPPLY

PEG AND DDR

SENSE LINES

SVID

6 OF 9

SANDY

CPU1F

SANDY

2nd = 62.10040.77162.10055.421 3rd = 62.10055.321

12

C80

4SC

10U

6D3V

3MX-

GP

QC

C80

4SC

10U

6D3V

3MX-

GP

QC

1 2R804 130R2F-1-GPR804 130R2F-1-GP

12

C82

0SC

10U

6D3V

3MX-

GP

DY

C82

0SC

10U

6D3V

3MX-

GP

DY

12

C84

3SC

10U

6D3V

5KX-

1GP

C84

3SC

10U

6D3V

5KX-

1GP

12

C80

9SC

10U

6D3V

5KX-

1GP

C80

9SC

10U

6D3V

5KX-

1GP

12

C83

0SC

10U

6D3V

5KX-

1GP

C83

0SC

10U

6D3V

5KX-

1GP

12

C83

3SC

10U

6D3V

5KX-

1GP

C83

3SC

10U

6D3V

5KX-

1GP

12

C84

1SC

10U

6D3V

5KX-

1GP

C84

1SC

10U

6D3V

5KX-

1GP

12

C80

6SC

10U

6D3V

3MX-

GP

QC

C80

6SC

10U

6D3V

3MX-

GP

QC

12

C81

9SC

10U

6D3V

3MX-

GP

DY

C81

9SC

10U

6D3V

3MX-

GP

DY

12

R802100R2F-L1-GP-UR802100R2F-L1-GP-U

12 C

831

SC22

U6D

3V5M

X-2G

PC

831

SC22

U6D

3V5M

X-2G

P

12

C82

6SC

22U

6D3V

5MX-

L2G

PC

826

SC22

U6D

3V5M

X-L2

GP

12

C83

2SC

10U

6D3V

5KX-

1GP

C83

2SC

10U

6D3V

5KX-

1GP

12

C83

9SC

10U

6D3V

5KX-

1GP

C83

9SC

10U

6D3V

5KX-

1GP

12

C84

2SC

10U

6D3V

5KX-

1GP

C84

2SC

10U

6D3V

5KX-

1GP1

2C

807

SC10

U6D

3V3M

X-G

PQC

C80

7SC

10U

6D3V

3MX-

GP

QC

12 C

827

SC22

U6D

3V5M

X-2G

PC

827

SC22

U6D

3V5M

X-2G

P

12

C81

7SC

10U

6D3V

3MX-

GP

QC

C81

7SC

10U

6D3V

3MX-

GP

QC

12

C84

0SC

10U

6D3V

5KX-

1GP

C84

0SC

10U

6D3V

5KX-

1GP

12

C80

5SC

10U

6D3V

3MX-

GP

QC

C80

5SC

10U

6D3V

3MX-

GP

QC

12

R801100R2F-L1-GP-UR801100R2F-L1-GP-U

12

C83

5SC

10U

6D3V

5KX-

1GP

C83

5SC

10U

6D3V

5KX-

1GP

12

C83

7SC

22U

6D3V

5MX-

L2G

PC

837

SC22

U6D

3V5M

X-L2

GP

12

C80

2SC

10U

6D3V

3MX-

GP

QC

C80

2SC

10U

6D3V

3MX-

GP

QC

1 2R803 43R2J-GPR803 43R2J-GP

12

C80

1SC

10U

6D3V

3MX-

GP

QC

C80

1SC

10U

6D3V

3MX-

GP

QC

12

C83

8SC

10U

6D3V

5KX-

1GP

C83

8SC

10U

6D3V

5KX-

1GP

12

C82

1SC

10U

6D3V

5KX-

1GP

C82

1SC

10U

6D3V

5KX-

1GP

12

C80

3SC

10U

6D3V

3MX-

GP

QC

C80

3SC

10U

6D3V

3MX-

GP

QC

12

C83

4SC

10U

6D3V

5KX-

1GP

C83

4SC

10U

6D3V

5KX-

1GP

12

C82

9SC

10U

6D3V

5KX-

1GP

C82

9SC

10U

6D3V

5KX-

1GP

12

C81

6SC

10U

6D3V

5KX-

1GP

C81

6SC

10U

6D3V

5KX-

1GP

12

C80

8SC

10U

6D3V

3MX-

GP

DY

C80

8SC

10U

6D3V

3MX-

GP

DY

12

C82

5SC

10U

6D3V

5KX-

1GP

C82

5SC

10U

6D3V

5KX-

1GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSA_SELH_FC_C22

+V_SM_VREF_CNT

VSS_AXG_SENSEVCC_AXG_SENSE

VCCUSA_SENSE

1D5V_S0

VCC_GFXCORE

1D8V_S0

0D85V_S0

VCC_GFXCORE

1D5V_S3

DCBATOUT

VCC_AXG_SENSE 42VSS_AXG_SENSE 42

VCCSA_SEL 48H_FC_C22 48

+V_SM_VREF_CNT 37

VCCUSA_SENSE 48

Title


Date: Sheet of


QUEEN 15 A00CPU (VCC_GFXCORE)

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

SSID = CPU VAXG Output Decoupling Recommendation:2 x 470 uF at Bottom Socket Edge2 x 22 uF at Top Socket Cavity4 x 22 uF at Top Socket Edge2 x 22 uF at Bottom Socket Cavity4 x 22 uF at Bottom Socket Edge

PROCESSOR VAXG: 33A

VCCPLL Output Decoupling Recommendation:1 x 330 uF2 x 1 uF1 x 10 uF

Disabling Guidelines for External Graphics Designs:Can connect to GND if motherboard only supports externalgraphics and if GFX VR is not stuffed.Can be left floating (Gfx VR keeps VAXG rail from floating)if the VR is stuffed

PROCESSOR VCCPLL: 1.2A

PROCESSOR VCCSA: 6A

VDDQ Output Decoupling Recommendation:1 x 330 uF6 x 10 uF

PROCESSOR VDDQ: 10A

VCCSA Output Decoupling Recommendation:1 x 330 uF2 x 10 uF at Bottom Socket Cavity1 x 10 uF at Bottom Socket Edge

Routing Guideline:Power from DDR_VREF_S3 and +V_SM_VREF_CNTshould have 10 mils trace width.

Refer to the latest Huron River Mainstream PDG (Doc# 436735) for more details on S3 power reduction implementation.

+V_SM_VREF_CNT should have 10 mil trace width

Removed DIS_ONLY Disable Resistor.R904,R905,R901,R903

20100609 V1.0

0617 Modify:Joseph Removed TC902,TC903 330uF cap.

0617 Modify:Joseph Removed TC902,TC903 330uF cap.0719 Modify:Reserved EC902 0.1uF near C917 for EMC NEO suggestion.

0624 Modify:Removed C918,C919 10uF 0603 for VCC_GFXCORE.

0624 Modify:Removed R902 10ohm closed CPU side.0713 Modify:Add R908 100ohm PH to 0D85V_S0.0714 Modify:Removed R908 PH.

0713 Modify:Removed C907 10uf 0603 cap.0726 Modify:stuff C908 10uF.

0714 Modify:RN901 change to 1K PL from 10K base on Intel PDDG updated.

0719 Modify: Add C907,C918,C919,C925 0402 0.1 uF stitching capacitors between 1D5V_S3 & 1D5V_S0 based on Intel's review

0721 Modify:Removed C903


0818De-cap

1122 X02 Modify:stuff EC901 0.1uF fromEMC Neo suggestion.


12

C92

1

SC10

U6D

3V3M

X-G

P

DY

C92

1

SC10

U6D

3V3M

X-G

P

DY

12

R907100R2F-L1-GP-UR907100R2F-L1-GP-U

12

C90

5SC

10U

6D3V

5KX-

1GP

C90

5SC

10U

6D3V

5KX-

1GP

12

C90

9

SC10

U6D

3V3M

X-G

P

DY

C90

9

SC10

U6D

3V3M

X-G

P

DY

12

C92

4SC

1U10

V2KX

-1G

PC

924

SC1U

10V2

KX-1

GP

12

C91

7SC

10U

6D3V

5KX-

1GP

C91

7SC

10U

6D3V

5KX-

1GP

12

C90

4SC

10U

6D3V

5KX-

1GP

C90

4SC

10U

6D3V

5KX-

1GP

12

C91

3SC

10U

6D3V

5KX-

1GP

C91

3SC

10U

6D3V

5KX-

1GP

12

C90

7

SCD

1U10

V2KX

-5G

P

DY

C90

7

SCD

1U10

V2KX

-5G

P

DY

12

C91

5SC

10U

6D3V

5KX-

1GP

C91

5SC

10U

6D3V

5KX-

1GP

12

C91

1

SC10

U6D

3V3M

X-G

P

DY

C91

1

SC10

U6D

3V3M

X-G

P

DY

12

C92

3SC

10U

6D3V

5KX-

1GP

C92

3SC

10U

6D3V

5KX-

1GP

SM_VREF AL1

VSSAXG_SENSE AK34VAXG_SENSE AK35VAXGAT24VAXGAT23VAXGAT21VAXGAT20VAXGAT18VAXGAT17VAXGAR24VAXGAR23VAXGAR21VAXGAR20VAXGAR18VAXGAR17VAXGAP24VAXGAP23VAXGAP21VAXGAP20VAXGAP18VAXGAP17VAXGAN24VAXGAN23VAXGAN21VAXGAN20VAXGAN18VAXGAN17VAXGAM24VAXGAM23VAXGAM21VAXGAM20VAXGAM18VAXGAM17VAXGAL24VAXGAL23VAXGAL21VAXGAL20VAXGAL18VAXGAL17VAXGAK24VAXGAK23VAXGAK21VAXGAK20VAXGAK18VAXGAK17VAXGAJ24VAXGAJ23VAXGAJ21VAXGAJ20VAXGAJ18VAXGAJ17VAXGAH24VAXGAH23VAXGAH21VAXGAH20VAXGAH18VAXGAH17

VDDQ U4VDDQ U1VDDQ P7VDDQ P4VDDQ P1

VDDQ AF7VDDQ AF4VDDQ AF1VDDQ AC7VDDQ AC4VDDQ AC1VDDQ Y7VDDQ Y4VDDQ Y1VDDQ U7

VCCPLLB6VCCPLLA6

VCCSA M27VCCSA M26VCCSA L26VCCSA J26VCCSA J25VCCSA J24VCCSA H26VCCSA H25

VCCSA_SENSE H23

VCCSA_VID1 C24

VCCPLLA2

FC_C22 C22

POWER

GRAPHICS

DDR3 -1.5V RAILS

SENSE

LINES

1.8V RAIL

SA RAIL

VREF

MISC

7 OF 9

SANDY

CPU1G

SANDY

2nd = 62.10040.77162.10055.421

3rd = 62.10055.321

POWER

GRAPHICS

DDR3 -1.5V RAILS

SENSE

LINES

1.8V RAIL

SA RAIL

VREF

MISC

7 OF 9

SANDY

CPU1G

SANDY

2nd = 62.10040.77162.10055.421

3rd = 62.10055.321

12

C91

9

SCD

1U10

V2KX

-5G

P

DY

C91

9

SCD

1U10

V2KX

-5G

P

DY12

TC901

ST330U2VDM-4-GP

79.33719.20L2nd = 77.C3371.13L

TC901

ST330U2VDM-4-GP

79.33719.20L2nd = 77.C3371.13L1

2C

920

SC10

U6D

3V3M

X-G

P

DY

C92

0

SC10

U6D

3V3M

X-G

P

DY1

2

C90

8SC

4D7U

6D3V

3KX-

GP

C90

8SC

4D7U

6D3V

3KX-

GP

12

EC901

SCD

1U50V3KX-G

PEC

901SC

D1U

50V3KX-GP

12

C91

0

SC10

U6D

3V3M

X-G

P

DY

C91

0

SC10

U6D

3V3M

X-G

P

DY

12

C90

6SC

10U

6D3V

5KX-

1GP

DY

C90

6SC

10U

6D3V

5KX-

1GP

DY

12

R906100R2F-L1-GP-UR906100R2F-L1-GP-U

12

C91

8

SCD

1U10

V2KX

-5G

P

DY

C91

8

SCD

1U10

V2KX

-5G

P

DY

1 234

RN901SRN1KJ-7-GPRN901SRN1KJ-7-GP

12

C90

1SC

10U

6D3V

5KX-

1GP

C90

1SC

10U

6D3V

5KX-

1GP

12

C91

2SC

10U

6D3V

5KX-

1GP

C91

2SC

10U

6D3V

5KX-

1GP

12

C91

4SC

10U

6D3V

5KX-

1GP

C91

4SC

10U

6D3V

5KX-

1GP

12

EC90

2SC

D1U

50V3

KX-G

PDY

EC90

2SC

D1U

50V3

KX-G

PDY

12

C91

6SC

10U

6D3V

5KX-

1GP

C91

6SC

10U

6D3V

5KX-

1GP

12

C90

2SC

10U

6D3V

5KX-

1GP

C90

2SC

10U

6D3V

5KX-

1GP

12

C92

2SC

1U10

V2KX

-1G

PC

922

SC1U

10V2

KX-1

GP

12

C92

5

SCD

1U10

V2KX

-5G

P

DY

C92

5

SCD

1U10

V2KX

-5G

P

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00CPU (VSS)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = CPU

A00 0103 add 3rd foxcon CPU1 at XBuild batch run A00 0103 add 3rd foxcon CPU1 at XBuild batch run

VSST35VSST34VSST33VSST32VSST31VSST30VSST29VSST28VSST27VSST26VSSP9VSSP8VSSP6VSSP5VSSP3VSSP2VSSN35VSSN34VSSN33VSSN32VSSN31VSSN30VSSN29VSSN28VSSN27VSSN26VSSM34VSSL33VSSL30VSSL27VSSL9VSSL8VSSL6VSSL5VSSL4VSSL3VSSL2VSSL1VSSK35VSSK32VSSK29VSSK26VSSJ34VSSJ31VSSH33VSSH30VSSH27VSSH24VSSH21VSSH18VSSH15VSSH13VSSH10VSSH9VSSH8VSSH7VSSH6VSSH5VSSH4VSSH3VSSH2VSSH1VSSG35VSSG32VSSG29VSSG26VSSG23VSSG20VSSG17VSSG11VSSF34VSSF31VSSF29

VSS F22VSS F19VSS E30VSS E27VSS E24VSS E21VSS E18VSS E15VSS E13VSS E10VSS E9VSS E8VSS E7VSS E6VSS E5VSS E4VSS E3VSS E2VSS E1VSS D35VSS D32VSS D29VSS D26VSS D20VSS D17VSS C34VSS C31VSS C28VSS C27VSS C25VSS C23VSS C10VSS C1VSS B22VSS B19VSS B17VSS B15VSS B13VSS B11VSS B9VSS B8VSS B7VSS B5VSS B3VSS B2VSS A35VSS A32VSS A29VSS A26VSS A23VSS A20VSS A3

VSS

9 OF 9

SANDY

CPU1I

SANDY

62.10055.4212nd = 62.10040.7713rd = 62.10055.321

VSS

9 OF 9

SANDY

CPU1I

SANDY

62.10055.4212nd = 62.10040.7713rd = 62.10055.321

VSSAT35VSSAT32VSSAT29VSSAT27VSSAT25VSSAT22VSSAT19VSSAT16VSSAT13VSSAT10VSSAT7VSSAT4VSSAT3VSSAR25VSSAR22VSSAR19VSSAR16VSSAR13VSSAR10VSSAR7VSSAR4VSSAR2VSSAP34VSSAP31VSSAP28VSSAP25VSSAP22VSSAP19VSSAP16VSSAP13VSSAP10VSSAP7VSSAP4VSSAP1VSSAN30VSSAN27VSSAN25VSSAN22VSSAN19VSSAN16VSSAN13VSSAN10VSSAN7VSSAN4VSSAM29VSSAM25VSSAM22VSSAM19VSSAM16VSSAM13VSSAM10VSSAM7VSSAM4VSSAM3VSSAM2VSSAM1VSSAL34VSSAL31VSSAL28VSSAL25VSSAL22VSSAL19VSSAL16VSSAL13VSSAL10VSSAL7VSSAL4VSSAL2VSSAK33VSSAK30VSSAK27VSSAK25VSSAK22VSSAK19VSSAK16VSSAK13VSSAK10VSSAK7VSSAK4VSSAJ25

VSS AJ22VSS AJ19VSS AJ16VSS AJ13VSS AJ10VSS AJ7VSS AJ4VSS AJ3VSS AJ2VSS AJ1VSS AH35VSS AH34VSS AH32VSS AH30VSS AH29VSS AH28VSS AH26VSS AH25VSS AH22VSS AH19VSS AH16VSS AH7VSS AH4VSS AG9VSS AG8VSS AG4VSS AF6VSS AF5VSS AF3VSS AF2VSS AE35VSS AE34VSS AE33VSS AE32VSS AE31VSS AE30VSS AE29VSS AE28VSS AE27VSS AE26VSS AE9VSS AD7VSS AC9VSS AC8VSS AC6VSS AC5VSS AC3VSS AC2VSS AB35VSS AB34VSS AB33VSS AB32VSS AB31VSS AB30VSS AB29VSS AB28VSS AB27VSS AB26VSS Y9VSS Y8VSS Y6VSS Y5VSS Y3VSS Y2VSS W35VSS W34VSS W33VSS W32VSS W31VSS W30VSS W29VSS W28VSS W27VSS W26VSS U9VSS U8VSS U6VSS U5VSS U3VSS U2

VSS

8 OF 9

SANDY

CPU1H

SANDY

62.10055.4212nd = 62.10040.7713rd = 63.10055.321

VSS

8 OF 9

SANDY

CPU1H

SANDY

62.10055.4212nd = 62.10040.7713rd = 63.10055.321

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00XDP

A3


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00XDP

A3


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00XDP

A3


<Variant Name>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SA1_DIM1

SA0_DIM1SA1_DIM1

SA0_DIM1

TS#_DIMM0_1

M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5

M_B_A7M_B_A6

M_B_A11M_B_A10M_B_A9M_B_A8

M_B_A12

M_B_A15M_B_A14M_B_A13

M_B_A0

M_B_DQ42M_B_DQ41M_B_DQ40

M_B_DQ43


M_B_DQ15

M_B_DQ0


M_B_DQ47




M_B_DQ1

M_B_DQ53M_B_DQ52

M_B_DQ24

M_B_DQ55M_B_DQ54


M_B_DQ2

M_B_DQ57M_B_DQ56

M_B_DQ59M_B_DQ58


M_B_DQ3


M_B_DQ33M_B_DQ32

M_B_DQ35M_B_DQ34

M_B_DQ5M_B_DQ4

M_B_DQ7M_B_DQ6


M_B_DQ8


M_B_DQS#0

M_B_DQS3

M_B_DQS#5

M_B_DQS4

M_B_DQS#6

M_B_DQS5

M_B_DQS#7

M_B_DQS#1

M_B_DQS6

M_B_DQS0

M_B_DQS#2

M_B_DQS7

M_B_DQS1

M_B_DQS#3

M_B_DQS2

M_B_DQS#4

1D5V_S3

1D5V_S3

3D3V_S0

0D75V_S0

0D75V_S0

DDR_VREF_S3

3D3V_S0

DDR_VREF_S3

M_VREF_DQ_DIMM1

M_VREF_CA_DIMM1

M_VREF_CA_DIMM1M_VREF_DQ_DIMM1

3D3V_S0

TS#_DIMM0_1 15

PCH_SMBCLK 15,20,79,82PCH_SMBDATA 15,20,79,82

M_B_A[15:0] 6

M_B_BS06

M_B_BS26

M_B_BS16M_B_DQ[63:0]6

M_B_DQS[7:0] 6

M_B_DQS#[7:0] 6

M_B_DIM0_ODT06M_B_DIM0_ODT16

DDR3_DRAMRST#15,37

M_B_WE# 6

M_B_DIM0_CS#0 6

M_B_CAS# 6

M_B_DIM0_CKE0 6M_B_DIM0_CKE1 6

M_B_DIM0_CS#1 6



M_B_RAS# 6

Title


Date: Sheet of


QUEEN 15 A00

DDR3-SODIMM2Custom


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00

DDR3-SODIMM2Custom


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00

DDR3-SODIMM2Custom


<Variant Name>

Place these capsclose to VTT1 andVTT2.

Note:If SA0 DIM0 = 0, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA0SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA2SO-DIMMA TS Address is 0x32

SODIMM A DECOUPLING

Layout Note:Place these Caps nearSO-DIMMA.

H =5.2mm

SSID = MEMORY

Thermal EVENT

PART NUMBER

5.2mm REVERSED

62.10017.P61

Height TYPE

5.2mm




0617 Modify:Joseph dummy TC1401 default un-stuff.

0624 Modify:SWAP DM1 and DM2 location.

REVERSED

0707 Modify:Change R1404,R1405 to 0ohm 0402 from short pad.

0818De-cap

0818De-cap

0825

62.10017.N41(2nd)

62.10017.P41(3rd) 5.2mm REVERSED

62.10024.E21(4th) 5.2mm REVERSED

1110 X02 Modify:DM2 1st change to 62.10017.P61; 2nd changeto 62.10017.N41 on ST stage from ME updated connector list.

A00

A00

12

C14

14S

CD

1U10

V2K

X-5

GP

C14

14S

CD

1U10

V2K

X-5

GP

12

C14

20S

C1U

6D3V

2KX

-GP

DY C14

20S

C1U

6D3V

2KX

-GP

DY

12

C14

10S

C10

U6D

3V5K

X-1

GP

DY C14

10S

C10

U6D

3V5K

X-1

GP

DY

12

R14040R0402-PAD-2-GPR14040R0402-PAD-2-GP

1 2R140310KR2J-3-GP

R140310KR2J-3-GP

12

C14

03S

C10

U6D

3V5K

X-1

GP

DY C14

03S

C10

U6D

3V5K

X-1

GP

DY

12

C1425

SC

2D2U

10V

3KX

-1G

PDY C1425

SC

2D2U

10V

3KX

-1G

PDY

12

C14

06S

C10

U6D

3V5K

X-1

GP

DY C14

06S

C10

U6D

3V5K

X-1

GP

DY

A098A197A296A395A492A591A690A786A889A985A10/AP107A1184A1283A13119A1480A1578A16/BA279

BA0109BA1108

DQ05DQ17DQ215DQ317DQ44DQ56DQ616DQ718DQ821DQ923DQ1033DQ1135DQ1222DQ1324DQ1434DQ1536DQ1639DQ1741DQ1851DQ1953DQ2040DQ2142DQ2250DQ2352DQ2457DQ2559DQ2667DQ2769DQ2856DQ2958DQ3068DQ3170DQ32129DQ33131DQ34141DQ35143DQ36130DQ37132DQ38140DQ39142DQ40147DQ41149DQ42157DQ43159DQ44146DQ45148DQ46158DQ47160DQ48163DQ49165DQ50175DQ51177DQ52164DQ53166DQ54174DQ55176DQ56181DQ57183DQ58191DQ59193DQ60180DQ61182DQ62192DQ63194

DQS0#10DQS1#27DQS2#45DQS3#62DQS4#135DQS5#152DQS6#169DQS7#186

DQS012DQS129DQS247DQS364DQS4137DQS5154DQS6171DQS7188

ODT0116ODT1120

VREF_DQ1

VSS 2

NP1 NP1NP2 NP2

RAS# 110WE# 113

CAS# 115

CS0# 114CS1# 121

CKE0 73CKE1 74

CK0 101CK0# 103

CK1 102CK1# 104

DM0 11DM1 28DM2 46DM3 63DM4 136DM5 153DM6 170DM7 187

SDA 200SCL 202

VDDSPD 199

SA0 197SA1 201

VREF_CA126

VDD18 124

NC#1 77NC#2 122

NC#/TEST 125

VDD3 81VDD4 82VDD5 87VDD6 88VDD7 93VDD8 94VDD9 99

VDD10 100

VDD13 111VDD14 112VDD15 117VDD16 118

VSS 3VSS 8VSS 9VSS 13VSS 14VSS 19VSS 20VSS 25VSS 26VSS 31VSS 32VSS 37VSS 38VSS 43VSS 44VSS 48VSS 49VSS 54VSS 55VSS 60VSS 61

VDD1 75

VSS 65VSS 66VSS 71VSS 72

VDD2 76

VDD11 105VDD12 106

VDD17 123

VSS 127VSS 128

VSS 134VSS 133


VSS 151VSS 150

VSS 155VSS 156VSS 161VSS 162VSS 167VSS 168

VSS 173VSS 172

VSS 179VSS 178

VSS 185VSS 184


RESET#30

EVENT# 198

VSS 205VSS 206VTT1203

VTT2204

DM2

DDR3-204P-48-GP62.10017.P61

2nd = 62.10017.N41

4th = 62.10024.E213rd = 62.10017.P41

DM2

DDR3-204P-48-GP62.10017.P61

2nd = 62.10017.N41

4th = 62.10024.E213rd = 62.10017.P41

12

R140210KR2J-3-GPR140210KR2J-3-GP

12

C1423

SC

D1U

10V

2KX

-5G

P

C1423

SC

D1U

10V

2KX

-5G

P

12

C14

07S

C10

U6D

3V5K

X-1

GP

C14

07S

C10

U6D

3V5K

X-1

GP

12 C14

04S

C22

U6D

3V5M

X-2

GP

C14

04S

C22

U6D

3V5M

X-2

GP

12

C14

09S

C10

U6D

3V5K

X-1

GP

DY C14

09S

C10

U6D

3V5K

X-1

GP

DY

12

C14

05S

C10

U10

V5Z

Y-1

GP

DY C14

05S

C10

U10

V5Z

Y-1

GP

DY

12

C1424

SC

D1U

10V

2KX

-5G

P

C1424

SC

D1U

10V

2KX

-5G

P

12

C14

22S

C1U

6D3V

2KX

-GP

DY C14

22S

C1U

6D3V

2KX

-GP

DY

12 C14

17S

C1U

6D3V

2KX

-GP

C14

17S

C1U

6D3V

2KX

-GP

12

C1413

SC

D1U

10V

2KX

-5G

P

C1413

SC

D1U

10V

2KX

-5G

P

12

C1418

SC

10U

6D3V

5KX

-1G

PDY C1418

SC

10U

6D3V

5KX

-1G

PDY

12

C14

08S

C10

U10

V5Z

Y-1

GP

DY C14

08S

C10

U10

V5Z

Y-1

GP

DY

12

C1411

SC

D1U

10V

2KX

-5G

P

C1411

SC

D1U

10V

2KX

-5G

P

12 C14

15S

C1U

6D3V

2KX

-GP

C14

15S

C1U

6D3V

2KX

-GP

12

R14050R0402-PAD-2-GPR14050R0402-PAD-2-GP

12

C1412

SC

2D2U

10V

3KX

-1G

PDY C1412

SC

2D2U

10V

3KX

-1G

PDY

12

C14

21S

C1U

6D3V

2KX

-GP

C14

21S

C1U

6D3V

2KX

-GP

12

C14

19S

C1U

6D3V

2KX

-GP

C14

19S

C1U

6D3V

2KX

-GP

12

TC1401

ST3

30U

2VD

M-4

-GP

DYTC1401

ST3

30U

2VD

M-4

-GP

DY

12

R140110KR2J-3-GPR140110KR2J-3-GP

12

C1402

SC

2D2U

10V

3KX

-1G

PDYC1402

SC

2D2U

10V

3KX

-1G

PDY

12

C1401

SC

D1U

10V

2KX

-5G

P

C1401

SC

D1U

10V

2KX

-5G

P

12 C14

16S

C1U

6D3V

2KX

-GP

C14

16S

C1U

6D3V

2KX

-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SA0_DIM0SA1_DIM0

SA0_DIM0SA1_DIM0

M_A_DQS7

M_A_DQS0

M_A_DQ35

M_A_DQ17

M_A_DQS#5

M_A_DQ52

M_A_DQ47

M_A_DQ44

M_A_DQ24

M_A_DQ2

M_A_DQ0

M_A_A12

M_A_DQ46

M_A_DQ36

M_A_DQ21

M_A_DQ6

M_A_A4

M_A_DQS#2

M_A_DQ33

M_A_DQ12

M_A_DQ10

M_A_DQS6

M_A_DQS#7

M_A_DQ45

M_A_DQ43

M_A_DQ25

M_A_DQ16

M_A_DQS4

M_A_DQS#4

M_A_DQ51

M_A_DQ39

M_A_DQ31

M_A_DQ20

M_A_DQ1

M_A_A11

M_A_A9

M_A_DQ63

M_A_DQ5

M_A_A15

M_A_A3

M_A_DQS#1

M_A_DQ55

M_A_DQ34

M_A_DQ11

M_A_DQ9

M_A_DQS5

M_A_DQS#6

M_A_DQ50

M_A_DQ32

M_A_DQ15

M_A_DQS3

M_A_DQS#3

M_A_DQ23

M_A_DQ19

M_A_A10

M_A_A8

M_A_DQ62

M_A_DQ57

M_A_DQ54

M_A_DQ42

M_A_DQ4

M_A_A14

M_A_A2

M_A_DQ59

M_A_DQ30

M_A_DQ8

M_A_A6

M_A_DQS#0

M_A_DQ61

M_A_DQ49

M_A_DQ41

M_A_DQ22

M_A_DQ14

M_A_DQS2

M_A_DQ40

M_A_DQ18

M_A_A7

M_A_DQS1

M_A_DQ56

M_A_DQ53

M_A_DQ48

M_A_DQ37

M_A_DQ26

M_A_DQ3

M_A_A13

M_A_A1

M_A_DQ58

M_A_DQ28M_A_DQ27

M_A_DQ7

M_A_A5

M_A_A0

M_A_DQ60

M_A_DQ38

M_A_DQ29

M_A_DQ13

1D5V_S3

3D3V_S0

1D5V_S3

0D75V_S0

DDR_VREF_S3

0D75V_S0

DDR_VREF_S3

M_VREF_DQ_DIMM0

M_VREF_CA_DIMM0

M_VREF_DQ_DIMM0M_VREF_CA_DIMM0

TS#_DIMM0_1 14

PCH_SMBCLK 14,20,79,82PCH_SMBDATA 14,20,79,82

M_A_A[15:0] 6

M_A_BS26

M_A_BS06M_A_BS16

M_A_DQ[63:0]6

DDR3_DRAMRST#14,37

M_A_DIM0_ODT06M_A_DIM0_ODT16

M_A_DQS#[7:0] 6

M_A_DQS[7:0] 6

M_A_WE# 6

M_A_DIM0_CS#0 6

M_A_CAS# 6

M_A_DIM0_CKE0 6M_A_DIM0_CKE1 6

M_A_DIM0_CS#1 6



M_A_RAS# 6

Title


Date: Sheet of


QUEEN 15 A00

DDR3-SODIMM1Custom


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00

DDR3-SODIMM1Custom


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00

DDR3-SODIMM1Custom


<Variant Name>

Note:SO-DIMMB SPD Address is 0xA4SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther fromthe Processor than SO-DIMMA

Place these capsclose to VTT1 andVTT2.

SODIMM B DECOUPLING

Layout Note:Place these Caps nearSO-DIMMB.

H =9.2mm

SSID = MEMORY

PART NUMBER

9.2mm REVERSED

Height TYPE

62.10017.Q41 9.2mm REVERSED




0624 Modify:SWAP DM1 and DM2 location.

0707 Modify:Change R1503,R1504 to 0ohm 0402 from short pad.

0818De-cap

0818De-cap

9.2mm REVERSED

62.10017.N11(2nd)

62.10017.N61(3rd)

62.10024.D91(4th) 9.2mm REVERSED

1110 X02 Modify:DM1 1st change to 62.10017.Q41; 2nd changeto 62.10017.N11 on ST stage from ME updated connector list.

20101220 R1501 R1502 for change to parallel resistor

A00

A00

A00

123 4


12

R15040R0402-PAD-2-GPR15040R0402-PAD-2-GP

12 C15

11S

C1U

6D3V

2KX

-GP

C15

11S

C1U

6D3V

2KX

-GP

12

C1524

SC

2D2U

10V

3KX

-1G

PDY C1524

SC

2D2U

10V

3KX

-1G

PDY

12

C15

04S

C10

U10

V5Z

Y-1

GP

DY C15

04S

C10

U10

V5Z

Y-1

GP

DY

12

C15

18S

C1U

6D3V

2KX

-GP

DY C15

18S

C1U

6D3V

2KX

-GP

DY

A098A197A296A395A492A591A690A786A889A985A10/AP107A1184A1283A13119A1480A1578A16/BA279

BA0109BA1108

DQ05DQ17DQ215DQ317DQ44DQ56DQ616DQ718DQ821DQ923DQ1033DQ1135DQ1222DQ1324DQ1434DQ1536DQ1639DQ1741DQ1851DQ1953DQ2040DQ2142DQ2250DQ2352DQ2457DQ2559DQ2667DQ2769DQ2856DQ2958DQ3068DQ3170DQ32129DQ33131DQ34141DQ35143DQ36130DQ37132DQ38140DQ39142DQ40147DQ41149DQ42157DQ43159DQ44146DQ45148DQ46158DQ47160DQ48163DQ49165DQ50175DQ51177DQ52164DQ53166DQ54174DQ55176DQ56181DQ57183DQ58191DQ59193DQ60180DQ61182DQ62192DQ63194

DQS0#10DQS1#27DQS2#45DQS3#62DQS4#135DQS5#152DQS6#169DQS7#186

DQS012DQS129DQS247DQS364DQS4137DQS5154DQS6171DQS7188

ODT0116ODT1120

VREF_DQ1

VSS 2

NP1 NP1NP2 NP2

RAS# 110WE# 113

CAS# 115

CS0# 114CS1# 121

CKE0 73CKE1 74

CK0 101CK0# 103

CK1 102CK1# 104

DM0 11DM1 28DM2 46DM3 63DM4 136DM5 153DM6 170DM7 187

SDA 200SCL 202

VDDSPD 199

SA0 197SA1 201

VREF_CA126

VDD18 124

NC#1 77NC#2 122

NC#/TEST 125

VDD3 81VDD4 82VDD5 87VDD6 88VDD7 93VDD8 94VDD9 99

VDD10 100

VDD13 111VDD14 112VDD15 117VDD16 118

VSS 3VSS 8VSS 9VSS 13VSS 14VSS 19VSS 20VSS 25VSS 26VSS 31VSS 32VSS 37VSS 38VSS 43VSS 44VSS 48VSS 49VSS 54VSS 55VSS 60VSS 61

VDD1 75


VDD2 76

VDD11 105VDD12 106

VDD17 123

VSS 127VSS 128

VSS 134VSS 133


VSS 151VSS 150

VSS 155VSS 156VSS 161VSS 162VSS 167VSS 168

VSS 173VSS 172

VSS 179VSS 178

VSS 185VSS 184


RESET#30

EVENT# 198

VSS 205VSS 206VTT1203

VTT2204

DM1

DDR3-204P-42-GP

4th = 62.10024.D91

2nd = 62.10017.N1162.10017.Q41

3rd = 62.10017.N61

DM1

DDR3-204P-42-GP

4th = 62.10024.D91

2nd = 62.10017.N1162.10017.Q41

3rd = 62.10017.N61

12

C15

09S

C10

U6D

3V5K

X-1

GP

DY C15

09S

C10

U6D

3V5K

X-1

GP

DY12

C1517

SC

D1U

10V

2KX

-5G

P

C1517

SC

D1U

10V

2KX

-5G

P

12

C15

19S

C1U

6D3V

2KX

-GP

C15

19S

C1U

6D3V

2KX

-GP

12

C1522

SC

D1U

10V

2KX

-5G

P

C1522

SC

D1U

10V

2KX

-5G

P

12

C1501

SC

D1U

10V

2KX

-5G

P

C1501

SC

D1U

10V

2KX

-5G

P

12 C15

13S

CD

01U

50V

2KX

-1G

PC

1513

SC

D01

U50

V2K

X-1

GP

12 C15

05S

C22

U6D

3V5M

X-2

GP

C15

05S

C22

U6D

3V5M

X-2

GP

12 C15

14S

CD

01U

50V

2KX

-1G

PC

1514

SC

D01

U50

V2K

X-1

GP

12

C1515

SC

D1U

10V

2KX

-5G

P

C1515

SC

D1U

10V

2KX

-5G

P

12

C1516

SC

2D2U

10V

3KX

-1G

PDY C1516

SC

2D2U

10V

3KX

-1G

PDY

12

C15

06S

C10

U6D

3V5K

X-1

GP

C15

06S

C10

U6D

3V5K

X-1

GP

12

C15

21S

C1U

6D3V

2KX

-GP

C15

21S

C1U

6D3V

2KX

-GP

12

C15

10S

C10

U6D

3V5K

X-1

GP

DY C15

10S

C10

U6D

3V5K

X-1

GP

DY

12

C15

20S

C1U

6D3V

2KX

-GP

DY C15

20S

C1U

6D3V

2KX

-GP

DY

12

C15

08S

C10

U10

V5Z

Y-1

GP

DY C15

08S

C10

U10

V5Z

Y-1

GP

DY

12

C1523

SC

D1U

10V

2KX

-5G

P

C1523

SC

D1U

10V

2KX

-5G

P

12

C15

07S

C10

U6D

3V5K

X-1

GP

DY C15

07S

C10

U6D

3V5K

X-1

GP

DY

12

R15030R0402-PAD-2-GPR15030R0402-PAD-2-GP

12

C15

12S

CD

1U10

V2K

X-5

GP

DY C15

12S

CD

1U10

V2K

X-5

GP

DY

12

C15

03S

C10

U10

V5Z

Y-1

GP

DY C15

03S

C10

U10

V5Z

Y-1

GP

DY

12

C1502

SC

2D2U

10V

3KX

-1G

P

DY C1502

SC

2D2U

10V

3KX

-1G

P

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LVDS_VBGLVDS_IBG

DAC_IREF_R

CRT_GREEN

LVDS_VDD_EN

LVDS_VREFHLVDS_VREFL

L_CTRL_DATA

L_CTRL_DATAL_CTRL_CLK

LVDS_DDC_CLK_RLVDS_DDC_DATA_R

L_BKLT_EN

L_CTRL_CLK

CRT_BLUECRT_RED

CRT_BLUE

CRT_REDCRT_GREEN

CRT_BLUE_N48

CRT_RED_T49CRT_GREEN_P49

3D3V_S0

CRT_HSYNC82CRT_VSYNC82

LVDS_DDC_CLK_R49LVDS_DDC_DATA_R49

LVDSA_DATA049LVDSA_DATA149LVDSA_DATA249

LVDSA_DATA0#49LVDSA_DATA1#49LVDSA_DATA2#49

LVDSA_CLK#49LVDSA_CLK49

L_BKLT_CTRL49

LVDS_VDD_EN49L_BKLT_EN27

CRT_DDC_CLK82CRT_DDC_DATA82

CRT_BLUE82CRT_GREEN82CRT_RED82

Title


Date: Sheet of


QUEEN 15 A00PCH (LVDS/CRT/DDI)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Place near PCH

Impedance:90 ohm

Close to PCH side

L_DDC_DATA(PAGE17):This signal is on the LVDS interface.This signal needs to be left NC if eDP is used for the local flat panel display

0617 Modify:Joseph Removed LVDSB related net for single LVDS channel base on Dell updated spec.

0712 Modify:SWAP RN1704

Notes:1K 0.5% 0402.

0804 Remove HDMI from PCH.

0917 X01 Modify:Add R1703~R1705 on RGB signal and reservedEC1701~EC1703 0.1u from EMC Neo suggestion.

0923 SWAP

0923 SWAP

A00

A00

12

EC1702

SCD

1U50V3KX-G

P

DY

EC1702

SCD

1U50V3KX-G

P

DY

12345 6 7 8

RN1705SRN150F-1-GPRN1705SRN150F-1-GP

L_BKLTCTLP45

L_BKLTENJ47

L_CTRL_CLKT45L_CTRL_DATAP39

L_DDC_CLKT40L_DDC_DATAK47

L_VDD_ENM45

LVDSA_CLK#AK39LVDSA_CLKAK40

LVDSA_DATA#0AN48LVDSA_DATA#1AM47LVDSA_DATA#2AK47LVDSA_DATA#3AJ48

LVDSA_DATA0AN47LVDSA_DATA1AM49LVDSA_DATA2AK49LVDSA_DATA3AJ47

LVDSB_CLK#AF40LVDSB_CLKAF39

LVDSB_DATA#0AH45LVDSB_DATA#1AH47LVDSB_DATA#2AF49LVDSB_DATA#3AF45

LVDSB_DATA0AH43

DDPB_0N AV42

DDPB_1N AV45

LVD_VREFHAE48LVD_VREFLAE47

DDPD_2N BF42

DDPD_3N BJ42

DDPB_2N AU48

DDPB_3N AV47

DDPC_0N AY47

DDPC_1N AY43

DDPC_2N BA47

DDPC_3N BB47

DDPD_0N BB43

DDPD_1N BF44

DDPB_0P AV40

DDPB_1P AV46

DDPD_2P BE42

DDPD_3P BG42

DDPB_2P AU47

DDPB_3P AV49

LVDSB_DATA1AH49LVDSB_DATA2AF47LVDSB_DATA3AF43

LVD_IBGAF37LVD_VBGAF36

DDPC_1P AY45

DDPC_0P AY49

DDPC_2P BA48

DDPC_3P BB49

DDPD_0P BB45

DDPD_1P BE44

CRT_BLUEN48

CRT_DDC_CLKT39CRT_DDC_DATAM40

CRT_GREENP49

CRT_HSYNCM47

CRT_IRTNT42

CRT_REDT49

CRT_VSYNCM49

DAC_IREFT43

SDVO_CTRLCLK P38SDVO_CTRLDATA M39

DDPC_CTRLCLK P46DDPC_CTRLDATA P42

DDPD_CTRLCLK M43DDPD_CTRLDATA M36

DDPB_AUXN AT49

DDPC_AUXN AP47

DDPD_AUXN AT45

DDPB_AUXP AT47

DDPC_AUXP AP49

DDPD_AUXP AT43

DDPB_HPD AT40

DDPC_HPD AT38

DDPD_HPD BH41

SDVO_TVCLKINP AP45SDVO_TVCLKINN AP43

SDVO_STALLP AM40SDVO_STALLN AM42

SDVO_INTP AP40SDVO_INTN AP39

LVDS

Digital Display Interface

CRT

4 OF 10

CougarPoint

PCH1D

COUGAR-GP-U2-NF

LVDS

Digital Display Interface

CRT

4 OF 10

CougarPoint

PCH1D

COUGAR-GP-U2-NF

12

EC1703

SCD

1U50V3KX-G

P

DY

EC1703

SCD

1U50V3KX-G

P

DY

12 3

4

RN1702

SRN100KJ-6-GP

RN1702

SRN100KJ-6-GP

1 2R1703 0R0402-PAD-2-GPR1703 0R0402-PAD-2-GP

12

R17021KR2D-1-GP

CHIP RES 1K D 1/16W 0402

R17021KR2D-1-GP

CHIP RES 1K D 1/16W 0402

1 2R1704 0R0402-PAD-2-GPR1704 0R0402-PAD-2-GP1 2R1705 0R0402-PAD-2-GPR1705 0R0402-PAD-2-GP

12 3

4

RN1701

SRN2K2J-1-GP

RN1701

SRN2K2J-1-GP

12

R17012K37R2F-GPR17012K37R2F-GP


123

4

RN

0R4P2R-PADRN1704

RN

0R4P2R-PADRN1704

12

EC1701

SCD

1U50V3KX-G

P

DY

EC1701

SCD

1U50V3KX-G

P

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INT_PIRQB#

USB_OC#2_3USB_OC#0_1

USB_OC#8_9USB_OC#10_11USB_OC#12_13

USB_OC#6_7

BBS_BIT1

CLK_PCI_LPC_R

INT_PIRQF#

INT_PIRQH#

INT_PIRQE#

CLK_PCI_FB_RCLK_PCI_KBC_R

BBS_BIT1

INT_PIRQB#INT_PIRQC#INT_PIRQD#

INT_PIRQA#

DGPU_PWM_SELECT#

PCI_PLTRST#

PCI_GNT3#

PCI_PME#

DGPU_SELECT#DGPU_PWR_EN#

USB_OC#8_9USB_OC#6_7USB_OC#12_13

BBS_BIT0

USB_OC#10_11USB_OC#0_1

PCI_PLTRST#

NV_ALENV_CLE

PCI_GNT3#

USB_RBIAS

USB_OC#4_5

USB_OC#4_5

USB_OC#2_3

INT_PIRQG#

INT_PIRQE#INT_PIRQC#INT_PIRQA#

NV_RCOMP

NV_ALE

INT_PIRQD#INT_PIRQF#

INT_PIRQG#

DGPU_PWR_EN#DGPU_HOLD_RST#

NV_CLE

FFS_INT2_R 3D3V_S5

3D3V_S5

1D8V_S0

3D3V_S0

3D3V_S0

3D3V_S0

1D8V_S0

USB_OC#8_9 61CLK_PCI_FB20CLK_PCI_LPC71

CLK_PCI_KBC27

USB_PN12 49USB_PP12 49

PLT_RST#5,27,71,75,82,83

USB_PP5 32USB_PN5 32







HDD_FALL_INT179


BBS_BIT0 21


SATA_ODD_DA#56

DGPU_PWR_EN#93

USB30_SMI#82

DGPU_HOLD_RST#83

KB_LED_BL_DET69

H_SNB_IVB# 5

FFS_INT2_R 79

USB_OC#0_1 61

Title


Date: Sheet of


QUEEN 15 A00PCH (PCI/USB/NVRAM)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Danbury Technology:Disabled when Low.Enable when High.

KBC CLK EMI

Reserved 01

11

BOOT BIOS Strap

GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19

0 1 Reserved

SPI(Default)

SSID = PCH

0 0 LPC

A16 swap override Strap/Top-BlockSwap Override jumper

PCI_GNT#3 Low = A16 swapoverride/Top-BlockSwap Override enabledHigh = Default

OC[3:0]# for Device 29 (Ports 0-7)OC[7:4]# for Device 26 (Ports 8-13)

USB Table

13

12

X

Mini Card1 (WLAN)

Fingerprint

X

Express Card

USB Ext. port 2

10

0

11

USB Ext. port 1 (HS)

Pair

4

5

2

3

1

Device

6

7

8

9

BLUETOOTH

CARD READER

USB Ext. port 3

CAMERA

Mini Card2 (WWAN)

USB Ext. port 1 (HS)External debug port use on Huron river platform

Touch Panel / 3G SIM

USB Ext. port 4 / E-SATA /USB CHARGE

0617 Modify:Joseph Remove PLT_RST AND gate logic IC U1801/C1802. 0628 Modify:

Add EC1803 4.7pF 0402 on CLK_PCI_LPC base on EMC NEO suggestion.0707 Modify:Change R1815,R1812,R1813 to 0ohm 0402 from short pad.0719 Modify:Reserved TP on CLKOUT_PCI3,4 from vender feedback.

20100625 V1.2

0629 Modify:Reseved R1816 100K 0402 on PLT_RST#.

0709 Modify:Add R1817 0ohm and connect to KB_LED_BL_DET.(5V Tolerance High Active)

0709 Modify:Removed INT_PIRQH# on RN1801 pin1.

0719 Modify:DF_TVS (NV_CLE) connect PROC_SELECT# (H_SNB_IVB#)with R1808 2.2K¡Ó5% pull up resistor to PCH VCCPNAND railand a R1809 1K¡Ó5% series resistor base on Intelfeedback.

NV_CLESet to Vss when LOW

DMI & FDI Termination Voltage

Set to Vcc when HIGH

0908 X01 Modify:Add R1818 10K PL on FFS_INT2_R(GPIO14)

0908

1120 X02 Modify:Reserved USB_OC#0_1 connect from PCH GPIO59.

A00

1 2R1813 0R0402-PADR1813 0R0402-PAD



12

EC1802

SC4D

7P50

V2C

N-1

GPDY

EC1802

SC4D

7P50

V2C

N-1

GPDY

12

C1801SC220P50V2KX-3GPDY C1801SC220P50V2KX-3GPDY 1 2

R1818 10KR2J-3-GPR1818 10KR2J-3-GP

1 2

R1807

0R0402-PAD-2-GP

R1807

0R0402-PAD-2-GP

1 2

R1809

1KR2J-1-GP

R1809

1KR2J-1-GP

12

EC1803

SC4D

7P50

V2C

N-1

GPDY

EC1803

SC4D

7P50

V2C

N-1

GPDY

12 3

4RN1803

SRN10KJ-5-GP

RN1803

SRN10KJ-5-GP

12

R1816

100K

R2J

-1-G

PDYR1816

100K

R2J

-1-G

PDY12345 6

78910

RN1802

SRN8K2J-2-GP-U

RN1802

SRN8K2J-2-GP-U


12

R18148K2R2J-3-GPR18148K2R2J-3-GP

12

R18082K2R2J-2-GPR18082K2R2J-2-GP

RSVD AV5

RSVD AY7RSVD AV7RSVD AU3RSVD BG4

DF_TVS AY1

RSVD AT10RSVD BC8

RSVD AU2RSVD AT4

RSVD BB5RSVD BB3RSVD BB7RSVD BE8RSVD BD4RSVD BF6

RSVD AT3RSVD AT1RSVD AY3RSVD AT5RSVD AV3RSVD AV1RSVD BB1RSVD BA3

RSVD AT8

RSVD AV10

RSVD AY5RSVD BA2

RSVD AT12RSVD BF3

PIRQA#K40PIRQB#K38PIRQC#H38PIRQD#G38

REQ1#/GPIO50C46REQ2#/GPIO52C44REQ3#/GPIO54E40

GNT1#/GPIO51D47GNT2#/GPIO53E42GNT3#/GPIO55F46

PIRQE#/GPIO2G42PIRQF#/GPIO3G40PIRQG#/GPIO4C42PIRQH#/GPIO5D44

USBP0N C24USBP0P A24USBP1N C25USBP1P B25USBP2N C26USBP2P A26USBP3N K28USBP3P H28USBP4N E28USBP4P D28USBP5N C28USBP5P A28USBP6N C29USBP6P B29USBP7N N28USBP7P M28USBP8N L30USBP8P K30USBP9N G30USBP9P E30

USBP10N C30USBP10P A30USBP11N L32USBP11P K32USBP12N G32USBP12P E32USBP13N C32USBP13P A32

PME#K10

CLKOUT_PCI0H49CLKOUT_PCI1H43CLKOUT_PCI2J48

USBRBIAS# C33

USBRBIAS B33

OC0#/GPIO59 A14OC1#/GPIO40 K20OC2#/GPIO41 B17OC3#/GPIO42 C16OC4#/GPIO43 L16OC5#/GPIO9 A16

OC6#/GPIO10 D14OC7#/GPIO14 C14CLKOUT_PCI4H40 CLKOUT_PCI3K42

PLTRST#C6

TP1BG26TP2BJ26TP3BH25

TP6AH38TP7AH37TP8AK43TP9AK45

TP16Y13TP17K24TP18L24TP19AB46TP20AB45

TP21B21TP22M20TP23AY16

TP25BE28TP26BC30TP27BE32TP28BJ32TP29BC28TP30BE30TP31BF32TP32BG32TP33AV26TP34BB26TP35AU28TP36AY30TP37AU26TP38AY26TP39AV28TP40AW30

TP4BJ16TP5BG16

TP15AM5 TP14AM4 TP13AH12 TP12H3 TP11N30 TP10C18

TP24BG46

RSVD

NVRAM

PCI

USB

5 OF 10

CougarPoint

PCH1E

COUGAR-GP-U2-NF

RSVD

NVRAM

PCI

USB

5 OF 10

CougarPoint

PCH1E

COUGAR-GP-U2-NF

1 2R18031KR2J-1-GPDY R18031KR2J-1-GPDY

1 2R1804 22R2J-2-GPR1804 22R2J-2-GP

1 2R18021KR2J-1-GPDY R18021KR2J-1-GPDY



1 2R181122D6R2F-L1-GPR181122D6R2F-L1-GP

12345 6

78910

RN1801

SRN8K2J-2-GP-U

RN1801

SRN8K2J-2-GP-U

12

EC1801

SC10

P50V

2JN

-4G

PDYEC1801

SC10

P50V

2JN

-4G

PDY

1 2R1805 22R2J-2-GPR1805 22R2J-2-GP

1 2R1815 0R0402-PADR1815 0R0402-PAD

1 2R1806 22R2J-2-GPR1806 22R2J-2-GP

1 2R1817 0R0402-PADR1817 0R0402-PAD

12R1801 4K7R2J-2-GPDYR1801 4K7R2J-2-GPDY

12


1 2R1812 0R0402-PADR1812 0R0402-PAD

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BATLOW#

PM_CLKRUN#

H_PM_SYNC

DSWODVREN

PM_SUS_STAT#

SUS_CLK

PM_SLP_A#

PM_SLP_SUS#

PM_SLP_S5#

PM_SLP_LAN#

DSWODVREN

PM_RSMRST#PCH_DPWROK

PM_RI#

PM_RSMRST#

PM_RSMRST#

PCH_SUSCLK_KBC

RBIAS_CPY

SUSACK#SUS_PWR_ACK

DMI_COMP_R

SYS_RESET#

PWROK

PWROK

SYS_PWROK

MEPWROK

PM_RSMRST#

PM_PWRBTN#

AC_PRESENT

PM_SLP_LAN#

SUS_PWR_ACK

BATLOW#PM_RI#PCH_WAKE#

RTC_AUX_S5

3D3V_S0

RTC_AUX_S5

1D05V_VTT

3D3V_S0

3D3V_S5

PM_SLP_S4# 27,46,75

PM_SLP_S3# 27,36,37,47,75

H_PM_SYNC 5

PM_CLKRUN# 27

PCH_WAKE# 27

PCH_SUSCLK_KBC 27

DMI_RXP04DMI_RXP14DMI_RXP24DMI_RXP34

PM_PWRBTN#27

DMI_TXN04DMI_TXN14DMI_TXN24DMI_TXN34

DMI_TXP04DMI_TXP14DMI_TXP24DMI_TXP34

DMI_RXN04DMI_RXN14DMI_RXN24DMI_RXN34

AC_PRESENT27,86

SUS_PWR_ACK27

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_INT 4

FDI_TXN0 4

FDI_TXP0 4

FDI_TXN6 4

FDI_TXP4 4

FDI_TXP6 4

FDI_TXN4 4

FDI_TXP2 4

FDI_TXP5 4

FDI_TXN2 4

FDI_TXN5 4

FDI_TXP7 4

FDI_TXN7 4

FDI_FSYNC0 4

FDI_LSYNC1 4

FDI_TXN3 4

FDI_TXN1 4

FDI_TXP3 4

FDI_TXP1 4

FDI_TXN[7:0] 4FDI_TXP[7:0] 4

DMI_RXP[3:0]4DMI_RXN[3:0]4

DMI_TXP[3:0]4DMI_TXN[3:0]4

RSMRST#_KBC 27

S0_PWR_GOOD27,36

RUNPWROK45,46,47,93

XDP_DBRESET#5

SYS_PWROK36

PM_DRAM_PWRGD5,37

Title


Date: Sheet of


QUEEN 15 A00PCH (DM I/FDI/PM)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

LOW Disabled

SSID = PCH

Signal Routing Guideline:DMI_ZCOMP keep W=4 mils androuting length less than 500mils.DMI_IRCOMP keep W=4 mils androuting length less than 500mils.

For platforms not supporting Deep S4/S51.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)2.DPWROK and RSMRST# will rise at the same time (connected on board)3.SLP_SUS# and SUSACK# are left as ¡¥no connect¡¦4.SUSWARN# used as SUSPWRDNACK/GPIO30

0621 Modify:Joseph removed Q1901/R1909/R1916 3V_5V_POK and PM_RSMRST# related control circuit.

S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

0625 Modify:Reserved EC1901 on PCH_SUSCLK_KBC for EMC NEO suggestion.

0628 Modify:Change R1904 to 100K 0402 from 10K and default stuff.

20100628 V1.30629 Modify:R1926 connect to SYS_PWROK.

0707 Modify:stuff R1925 and un-stuff R1905.

0707 Modify:Change R1903 change to 0ohm 0402 from short pad.

0719 Modify:Change R1908 to 10K ohm based on Intel review:8.2K to 10K pull-down is recommended.

PCIE_WAKE#CRB : 1KCEKLT: 10K

0907 X01 SWAP RN1901

0920 X01 Modify:move PCH_WAKE# to RN1901 pin4Add R1909 PH on AC_PRESENT.

1 2R19230R2J-2-GPDY

R19230R2J-2-GPDY

12 R1922 10KR2J-3-GP

DY

R1922 10KR2J-3-GP

DY

1 2R1925 0R0402-PADR1925 0R0402-PAD

1 2R1918 330KR2J-L1-GPDYR1918 330KR2J-L1-GPDY

12 R1920 10KR2J-3-GP

DY

R1920 10KR2J-3-GP

DY

1TP1905TPAD14-GPTP1905TPAD14-GP

1 2R19120R0402-PADR19120R0402-PAD

DMI0RXNBC24DMI1RXNBE20DMI2RXNBG18DMI3RXNBG20

DMI0RXPBE24DMI1RXPBC20DMI2RXPBJ18DMI3RXPBJ20

DMI0TXNAW24DMI1TXNAW20DMI2TXNBB18DMI3TXNAV18

DMI0TXPAY24DMI1TXPAY20DMI2TXPAY18DMI3TXPAU18

DMI_ZCOMPBJ24

DMI_IRCOMPBG25

FDI_RXN0 BJ14FDI_RXN1 AY14FDI_RXN2 BE14FDI_RXN3 BH13FDI_RXN4 BC12FDI_RXN5 BJ12FDI_RXN6 BG10FDI_RXN7 BG9

FDI_RXP0 BG14FDI_RXP1 BB14FDI_RXP2 BF14FDI_RXP3 BG13FDI_RXP4 BE12FDI_RXP5 BG12FDI_RXP6 BJ10FDI_RXP7 BH9

FDI_FSYNC0 AV12

FDI_FSYNC1 BC10

FDI_LSYNC0 AV14

FDI_LSYNC1 BB10

FDI_INT AW16

PMSYNCH AP14

SLP_SUS# G16

SLP_S3# F4

SLP_S4# H4

SLP_S5#/GPIO63 D10

SYS_RESET#K3

SYS_PWROKP12

PWRBTN#E20

RI#A10

WAKE# B9

SUS_STAT#/GPIO61 G8

SUSCLK/GPIO62 N14

ACPRESENT/GPIO31H20

BATLOW#/GPIO72E10

PWROKL22

CLKRUN#/GPIO32 N3

SUSWARN#/SUSPWRDNACK/GPIO30K16

RSMRST#C21

DRAMPWROKB13

SLP_LAN#/GPIO29 K14

APWROKL10

DPWROK E22

DMI2RBIASBH21

SLP_A# G10

DSWVRMEN A18

SUSACK#C12

DMI

FDI

System Power Management

3 OF 10

CougarPoint

PCH1C

COUGAR-GP-U2-NF

DMI

FDI

System Power Management

3 OF 10

CougarPoint

PCH1C

COUGAR-GP-U2-NF


1 2 R190510KR2J-3-GPDY R190510KR2J-3-GPDY

12 R190810KR2J-3-GP

R190810KR2J-3-GP

1 2R19070R2J-2-GPDY

R19070R2J-2-GPDY


1 2R1903 0R0402-PADR1903 0R0402-PAD

1 2R1902 750R2F-GPR1902 750R2F-GP

1 2R1911 10KR2J-3-GPDY R1911 10KR2J-3-GPDY

1 2R1913 0R0402-PADR1913 0R0402-PAD

1 2 R1904100KR2J-1-GP

R1904100KR2J-1-GP

1 2R1909 100KR2J-1-GPR1909 100KR2J-1-GP


12

EC1901

SC4D

7P50

V2C

N-1

GPDY

EC1901

SC4D

7P50

V2C

N-1

GPDY

1 2R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP

1 2R1906 0R0402-PADR1906 0R0402-PAD

1 2 R192610KR2J-3-GP

DY R192610KR2J-3-GP

DY


1 2R1924 0R0402-PADR1924 0R0402-PAD

1 2R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

1 2R1901 49D9R2F-GPR1901 49D9R2F-GP

1 2R1910 0R0402-PADR1910 0R0402-PAD

12345

678

RN1901

SRN10KJ-6-GP

RN1901

SRN10KJ-6-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XTAL25_IN

PCIE_CLK_REQ6#

CLK_BUF_EXP_NCLK_BUF_EXP_P

SMB_CLK

CLK_BUF_CKSSCD_P

PCIE_TXP5_CPCIE_TXN5_C

XTAL25_OUT

CLK_PCI_FB

EC_SWI#

PCH_GPIO74

PCIE_CLK_RQ2#

CLK_PCH_SRC0_PCLK_PCH_SRC0_N

CLKOUT_PEG_A_NCLKOUT_PEG_A_P

DRAMRST_CNTRL_PCH

PCIE_CLK_REQ6#

PEG_B_CLKRQ#

CLKOUT_DMI_NCLKOUT_DMI_PCLK_PCH_SRC1_P

CLK_PCH_SRC1_N

ITPXDP_PITPXDP_N

PCIE_CLK_REQ5#



SML1_CLK

PEG_CLKREQ#_R

SML1_DATA

PCH_GPIO74

DRAMRST_CNTRL_PCH

SMB_DATA

XCLK_RCOMP

CLK_BUF_REF14

SML0_CLKSML0_DATA

CL_CLK

CL_DATA

CL_RST#

SMB_DATA

SML0_CLK



SML1_DATASML1_CLK

CLK_BUF_DOT96_PCLK_BUF_DOT96_N

CLK_BUF_CKSSCD_N

SMB_CLK

PEG_CLKREQ#_R

SML0_DATA


CLK_PCIE_NEW_REQ#

SMB_CLK


SMB_DATA

CLK_BUF_CPYCLK_NCLK_BUF_CPYCLK_P

CLK_48_USB30

DGPU_PRSNT#

JTAG_TCK

CLK_27M_VGA_R

DGPU_PRSNT#UMA_DIS#

PEG_B_CLKRQ#CLK_PCIE_NEW_REQ#

USB3_PEGB_CLKREQ#

PCIE_CLK_REQ5#

CLK_PCIE_WLAN_REQ#PCIE_CLK_RQ2#

EC_SWI#

CLK_PCH_48M

CLK_BUF_CKSSCD_NCLK_BUF_CKSSCD_P

CLK_BUF_EXP_NCLK_BUF_EXP_P

CLK_BUF_DOT96_NCLK_BUF_DOT96_P

CLK_BUF_REF14

PCIE_CLK_LAN_REQ#CLK_PCIE_WWAN_REQ#

CLK_PCIE_NEW#CLK_PCIE_NEW


XTAL25_OUT

XTAL25_IN

+VCCDIFFCLKN

3D3V_S0

3D3V_S5

3D3V_S0 3D3V_S0

3D3V_S53D3V_S0

3D3V_S5

PCIE_RXN282PCIE_RXP282

PCIE_TXN282PCIE_TXP282



CLK_PCI_FB 18

PCH_SMBDATA 14,15,79,82

PCH_SMBCLK 14,15,79,82

CLK_PCIE_VGA# 83CLK_PCIE_VGA 83

SML1_DATA 27,86

SML1_CLK 27,86

PEG_CLKREQ# 83

SMB_CLK 75

SMB_DATA 75



DRAMRST_CNTRL_PCH 37

CLK_PCIE_USB3#82CLK_PCIE_USB382

CLK_EXP_N 5CLK_EXP_P 5

CLK_PCIE_WWAN82

CLK_PCIE_WWAN_REQ#82

CLK_PCIE_WWAN#82



CLK_PCIE_NEW_REQ#75

CLK_PCIE_NEW#75CLK_PCIE_NEW75

EC_SWI# 27

USB3_PEGB_CLKREQ#82

JTAG_TCK_VGA 86

UMA_DIS# 22

CLK_PCIE_WLAN#82CLK_PCIE_WLAN82

CLK_PCIE_WLAN_REQ#82

CLK_PCIE_LAN82CLK_PCIE_LAN#82

PCIE_CLK_LAN_REQ#82

CLK_PCH_48M 32

CLK_27M_VGA 83



Title


Date: Sheet of


QUEEN 15 A00PCH (PCI-E/SMBUS/CLOCK/CL)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = PCH

NEW CARD

Dock

For DIS_PX mode or MXM mode.

Intel GBE LAN

Card Reader

W-WAN

LAN

USB3.0

WLAN

CRB : 1KCEKLT: 10K

For VGA_ 27M

¡V Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3¡V Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 andFLEX2if more than 2 PCI clocks + PCI loopback are routed.

20100621 V1.2UMA_DISCRETE#UMA: 1 1DIS :0 1SG(PX) : 0 0Optimus(Muxless) : 1 0

PCIECLKRQ1# and PCIECLKRQ2# Support S0 power only

20100614 V1.1

0623 Modify:Change PCIE_CLK_RQ2#&CLK_PCIE_WLAN_REQ# pull high power to 3D3V_S0 from 3D3V_S5.(add RN2018)

20100614 V1.1

20100614 V1.1

0623 Modify:SWAP WLAN CLK and LAN CLK routing each other.0716 Modify:Rename PCIE_CLK_LAN_RQ1# to PCIE_CLK_LAN_REQ#.

0705 Modify:Add R2004 from RN2001.

0625 Modify:Move R2014 to RN2002.

0630 SWAP RN2012

0630 SWAP RN2010,RN2016

0630 Modify:Removed LAN_XI for LAN 25MHZ and reserved TP2004.0707 Modify:Removed R2002 for USB3.0 48MHZ.0709 Modify:Add R2002 22ohm for CLK_27M_VGA.0717 Modify:default stuff R2002 22ohm for CLK_27M_VGA.

0630 Modify:Removed XDP CLOCK and reserved TP2005,TP2006.

PL 10K FOR Integrated CLOCK GEN mode.

0705 Modify:Separate RN2009 10K to RN2019,RN2021,R2008 for layout routing.



0712 Modify:SWAP RN2001 PIN6,7,8


0719 Modify:R2009 change to 1K from 10K base on Intel James feedback list.

0908

0913 X01 Modify:Reserved EC2004,EC2005 on CLK_PCIE_NEW&CLK_PCIE_NEW# for EMC suggestion.

0915 SWAP1112 X02 Modify:Dell required us to disable PCIE port of WWAN slot,If PCIE port 1 is disabled, it will cause all PCIE port disabled,so change WWAN to PCIE port 3 from port1at ST stage.

X02 1115

1118 X02 Modify:Change X2001 to 82.30020.D41 from 82.30020.851from Sourcer Dick updated.

X02 1118

A00

A00

A00

A00

A00

A00

A00

1 2C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP

1

2

34

5

6

Q2001

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

Q2001

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

12

R200410KR2J-3-GPDY R200410KR2J-3-GPDY


12

R20061M1R2J-GPR20061M1R2J-GP

1 2R2001

22R2J-2-GPDYR200122R2J-2-GPDY

12

EC2003

SC4D7P50V2CN-1GPDYEC2003

SC4D7P50V2CN-1GPDY

1 2R2016 22R2J-2-GPR2016 22R2J-2-GP

1 2R2002

0R2J-2-GPDY

R2002

0R2J-2-GPDY


12C2007

SC12P50V2JN-3GP

C2007

SC12P50V2JN-3GP

123

4

RN

0R4P2R-PADRN2010

RN

0R4P2R-PADRN2010

123

4

RN

0R4P2R-PADRN2011

RN

0R4P2R-PADRN2011

12

R200510KR2J-3-GPR200510KR2J-3-GP

1 2R20030R2J-2-GP

DY R20030R2J-2-GP

DY

123

4

RN

0R4P2R-PADRN2016

RN

0R4P2R-PADRN2016

12

R2010

10KR

2J-3

-GPDY

R2010

10KR

2J-3

-GPDY

41

2 3

X2001

XTAL-25MHZ-155-GP

82.30020.D412nd = 82.30020.G713rd = 82.30020.G61

X2001

XTAL-25MHZ-155-GP

82.30020.D412nd = 82.30020.G713rd = 82.30020.G61

12 3

4

RN2007

SRN2K2J-1-GP

RN2007

SRN2K2J-1-GP



12

R2013

10KR

2J-3

-GP UMA

R2013

10KR

2J-3

-GP UMA




12 3

4 RN2006SRN10KJ-5-GPRN2006SRN10KJ-5-GP

12 3

4RN2018

SRN10KJ-5-GP

RN2018

SRN10KJ-5-GP

12

R2012

10KR

2J-3

-GP

R2012

10KR

2J-3

-GP

12 3

4RN2005SRN2K2J-1-GPRN2005SRN2K2J-1-GP


12

R2011

10KR

2J-3

-GP MUXLESS

R2011

10KR

2J-3

-GP MUXLESS

12 3

4RN2021 SRN10KJ-5-GPRN2021 SRN10KJ-5-GP

1 2R2008

10KR2J-3-GP

R2008

10KR2J-3-GP

12

EC2004


SC4D7P50V2CN-1GPDY


123

4

RN

0R4P2R-PADRN2013

RN

0R4P2R-PADRN2013

123

4

RN

0R4P2R-PADRN2015

RN

0R4P2R-PADRN2015

1234 5

678

RN2001

SRN10KJ-6-GP

RN2001

SRN10KJ-6-GP


12 3

4

RN2019

SRN10KJ-5-GP

RN2019

SRN10KJ-5-GP


123

4

RN

0R4P2R-PADRN2012

RN

0R4P2R-PADRN2012



12

EC2005


SC4D7P50V2CN-1GPDY

1 2R200790D9R2F-1-GPR200790D9R2F-1-GP

12 3

4

RN2008

SRN10KJ-5-GP

RN2008

SRN10KJ-5-GP

1234 5

678

RN2002

SRN10KJ-6-GP

RN2002

SRN10KJ-6-GP

PERN1BG34PERP1BJ34

PERN2BE34PERP2BF34

PERN3BG36PERP3BJ36

PERN4BF36PERP4BE36

PERN5BG37PERP5BH37

PERN6BJ38PERP6BG38

PERN7BG40PERP7BJ40

PERN8BE38PERP8BC38

PETN1AV32PETP1AU32

PETN2BB32PETP2AY32

PETN3AV34PETP3AU34

PETN4AY34PETP4BB34

PETN5AY36PETP5BB36

PETN6AU36PETP6AV36

PETN7AY40PETP7BB40

PETN8AW38PETP8AY38

CLKOUT_PCIE0NY40CLKOUT_PCIE0PY39

CLKOUT_PCIE1NAB49CLKOUT_PCIE1PAB47

CLKOUT_PCIE2NAA48CLKOUT_PCIE2PAA47



CLKOUT_PCIE5NV45CLKOUT_PCIE5PV46

CLKIN_GND1_N BJ30CLKIN_GND1_P BG30

CLKIN_DMI_N BF18CLKIN_DMI_P BE18

CLKIN_DOT_96N G24CLKIN_DOT_96P E24

CLKIN_SATA_N AK7CLKIN_SATA_P AK5

XTAL25_IN V47XTAL25_OUT V49

REFCLK14IN K45

CLKIN_PCILOOPBACK H45

CLKOUT_PEG_A_N AB37CLKOUT_PEG_A_P AB38

PEG_A_CLKRQ#/GPIO47 M10

PCIECLKRQ0#/GPIO73J2

PCIECLKRQ1#/GPIO18M1

PCIECLKRQ2#/GPIO20V10

PCIECLKRQ3#/GPIO25A8

PCIECLKRQ4#/GPIO26L12

PCIECLKRQ5#/GPIO44L14

CLKOUTFLEX0/GPIO64 K43

CLKOUTFLEX1/GPIO65 F47

CLKOUTFLEX2/GPIO66 H47

CLKOUTFLEX3/GPIO67 K49

CLKOUT_DMI_N AV22CLKOUT_DMI_P AU22

PEG_B_CLKRQ#/GPIO56E6

CLKOUT_PEG_B_PAB40 CLKOUT_PEG_B_NAB42

XCLK_RCOMP Y47

CLKOUT_DP_P AM13CLKOUT_DP_N AM12


PCIECLKRQ7#/GPIO46K12


CLKOUT_ITPXDP_NAK14CLKOUT_ITPXDP_PAK13

SMBALERT#/GPIO11 E12

SMBCLK H14

SMBDATA C9

SML0ALERT#/GPIO60 A12

SML0CLK C8

SML0DATA G12

SML1ALERT#/PCHHOT#/GPIO74 C13

SML1CLK/GPIO58 E14

SML1DATA/GPIO75 M16

CL_CLK1 M7

CL_DATA1 T11

CL_RST1# P10

PCIECLKRQ6#/GPIO45T13

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUS

Controller

Link

2 OF 10

CougarPoint

PCH1B

COUGAR-GP-U2-NF

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUS

Controller

Link

2 OF 10

CougarPoint

PCH1B

COUGAR-GP-U2-NF

1 2R20091KR2J-1-GPR20091KR2J-1-GP

12 3

4


123

4 RN2003SRN2K2J-1-GPRN2003SRN2K2J-1-GP

123

4

RN

0R4P2R-PADRN2014

RN

0R4P2R-PADRN2014

12C2008

SC12P50V2JN-3GP

C2008

SC12P50V2JN-3GP

123

4RN2004SRN2K2J-1-GPRN2004SRN2K2J-1-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_JTAG_TMS

HDA_BITCLK

HDA_RST#

HDA_SYNC

PCH_JTAG_TDI

LPC_AD0LPC_AD1LPC_AD2LPC_AD3

PCH_JTAG_TDO

RBIAS_SATA3

SATA_COMP

SATA_DET#0

PCH_JTAG_TCK_BUF

RTC_X2

SM_INTRUDER#

RTC_X2

RTC_X1

SRTC_RST#

PCH_INTVRMEN

BBS_BIT0

RTC_X1

RTC_RST#

SATA3_COMP

HDA_SPKR

HDA_SYNC

HDA_RST#HDA_BITCLK

HDA_SDOUT

HDA_SDOUT

PCH_GPIO33

HDA_SYNC

PCH_SPI_CLK

PCH_SPI_SI

PCH_SPI_CS0#

LPC_AD[0..3]

SPI_CS0#_RHDA_CODEC_BITCLK HDA_CODEC_SDOUTHDA_CODEC_SYNC

HDA_SYNC_R SATA_DET#0INT_SERIRQ

HDA_SDOUTHDA_SYNC HDA_SYNC_R

RTC_AUX_S5

RTC_AUX_S5

1D05V_VTT

1D05V_VTT

3D3V_S0

+3VS_+1.5VS_HDA_IO

+3VS_+1.5VS_HDA_IO

RUN_ENABLE3D3V_S0

BBS_BIT0 18

HDA_SPKR29

INT_SERIRQ 27

LPC_AD[0..3] 27,71

HDA_SDIN029

SPI_CS0#_R27,60

SPI_SO_R27,60

SPI_SI_R27,60

SPI_CLK_R27,60

SATA_LED# 68

ME_UNLOCK27

LPC_FRAME# 27,71

HDA_CODEC_BITCLK29HDA_CODEC_RST#29

HDA_CODEC_SYNC29

SATA_RXN5 57SATA_RXP5 57SATA_TXN5 57SATA_TXP5 57



KB_DET# 69

PSW_CLR#22FP_DET#22

S_GPIO22

HDA_CODEC_SDOUT29

Title


Date: Sheet of


QUEEN 15 A00PCH (SPI/RTC/LPC/SATA/IHDA)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = PCH

INTVRMEN- Integrated SUS1.05V VRM EnableHigh - Enable internal VRsLow - Enable external VRs

NO REBOOT STRAPNo Reboot Strap

HDA_SPKRLow = DefaultHigh = No Reboot

HDA_SDOUTLow = DefaultHigh = Enable

Flash Descriptor Security Overide

This signal has a weak internal pull down.On Die PLL VR is supplied by 1.5V whensampled high, 1.8 V when sampled low.Needs to be pulled High for Huron River platform.co-operate with R2310

PLL ODVR VOLTAGE

HDA_SYNCLow = 1.8V (Default)High = 1.5V

0625 Modify:Reserved EC2101 on SPI_CSO#_R for EMC NEO suggestion.

0625 Modify:Reserved EC2102,EC2103 on HDA_CODEC_BITCLK&HDA_CODEC_SDOUT for EMC NEO suggestion.

0629 Modify:Move All of 0.01uF cap closed to allconnector base on Layout guideline.

20100625 V1.2

ESATA

ODD

HDD1

HDD2

0630 modify:Change RN2104 PH 20K to R2115,R2216 20K 0402.

0707 Modify:Change RN2101 to R2122,R2123 33ohm 0402.

0707 Modify:Reserved Q2101 for isolate CODE and PCH base on design guide update 1.01.0712 Modify:Add R2124 between HDA_SYNC_R and HDA_SYNC.

HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used tosample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on thissignal on the board. Signal may have leakage paths via powered off devices (AudioCodec) and hence contend with the external pull-up. A blocking FET isrecommended in such a case to isolate HDA_SYNC from the Audio Codec deviceuntil after the Strap sampling is complete.

0709 Modify:KB_DET# connect to GPIO23.(inter PH 20K)

Notes:ME_UNLOCK (HDA_SDO) connect to EC. Make sure EC drive this pin "low" all the time.

0720 Modify:un-stuff R2122 33ohm.

0720 Modify:Add R2117 100K and stuff Q2101,R2124.

0805

0916 X01 Modify:Add RN2104 instead of R2111 10K.


A00

1 2R2110 33R2J-2-GPR2110 33R2J-2-GP

12

EC2101

SC4D

7P50

V2C

N-1

GPDY

EC2101

SC4D

7P50

V2C

N-1

GPDY

12

C2104SC1U6D3V2KX-GP

C2104SC1U6D3V2KX-GP



12

EC2103

SC4D

7P50

V2C

N-1

GPDY

EC2103

SC4D

7P50

V2C

N-1

GPDY

12 3

4

RN2105 SRN33J-5-GP-URN2105 SRN33J-5-GP-U

1 2R2109 33R2J-2-GPR2109 33R2J-2-GP

12 3

4RN2102

SRN33J-5-GP-U

RN2102

SRN33J-5-GP-U

1 2R2103 1KR2J-1-GPR2103 1KR2J-1-GP

21

G2101

GAP-OPEN

G2101

GAP-OPEN

1 2R211620KR2J-L2-GPR211620KR2J-L2-GP

1 2R2114 750R2F-GPR2114 750R2F-GP

12

R2117100KR2J-1-GPR2117100KR2J-1-GP


1 2R2107 1KR2J-1-GPR2107 1KR2J-1-GP

123

4RN2104

SRN10KJ-5-GP

RN2104

SRN10KJ-5-GP

12 R212233R2J-2-GP DY R212233R2J-2-GP DY



1 2R2101 10MR2J-L-GPR2101 10MR2J-L-GP

12

C2103SC1U6D3V2KX-GPC2103SC1U6D3V2KX-GP

12

C2102SC15P50V2JN-2-GPC2102SC15P50V2JN-2-GP

1 2

R211520KR2J-L2-GPR211520KR2J-L2-GP

1 4

32

X2101

X-32D768KHZ-67-GP82.30001.A81

2nd = 82.30001.6913rd = 82.30001.861

X2101

X-32D768KHZ-67-GP82.30001.A81

2nd = 82.30001.6913rd = 82.30001.861

1 2R2112 37D4R2F-GPR2112 37D4R2F-GP


12C

2101

SC15

P50V

2JN

-2-G

PC

2101

SC15

P50V

2JN

-2-G

P

1 2R2108 33R2J-2-GPR2108 33R2J-2-GP

G

S

D

Q2101

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031Q2101

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

12

EC2102

SC4D

7P50

V2C

N-1

GPDY

EC2102

SC4D

7P50

V2C

N-1

GPDY

12R2104

1M1R2J-GPR2104

1M1R2J-GP

1234 5

678

RN2103

SRN10KJ-6-GP

RN2103

SRN10KJ-6-GP

1 2R2113 49D9R2F-GPR2113 49D9R2F-GP

RTCX1A20

RTCX2C20

INTVRMENC17

INTRUDER#K22

HDA_BCLKN34

HDA_SYNCL34

HDA_RST#K34

HDA_SDIN0E34

HDA_SDIN1G34

HDA_SDIN2C34

HDA_SDOA36

SATALED# P3

FWH0/LAD0 C38FWH1/LAD1 A38FWH2/LAD2 B37FWH3/LAD3 C37

LDRQ1#/GPIO23 K36

FWH4/LFRAME# D36

LDRQ0# E36

RTCRST#D20

HDA_SDIN3A34

HDA_DOCK_EN#/GPIO33C36

HDA_DOCK_RST#/GPIO13N32

SRTCRST#G22

SATA0RXN AM3SATA0RXP AM1SATA0TXN AP7SATA0TXP AP5

SATA1RXN AM10SATA1RXP AM8SATA1TXN AP11SATA1TXP AP10

SATA2RXN AD7SATA2RXP AD5SATA2TXN AH5SATA2TXP AH4

SATA3RXN AB8SATA3RXP AB10SATA3TXN AF3SATA3TXP AF1

SATA4RXN Y7SATA4RXP Y5SATA4TXN AD3SATA4TXP AD1

SATA5RXN Y3SATA5RXP Y1SATA5TXN AB3SATA5TXP AB1

SATAICOMPI Y10

SPI_CLKT3

SPI_CS0#Y14

SPI_CS1#T1

SPI_MOSIV4

SPI_MISOU3

SATA0GP/GPIO21 V14

SATA1GP/GPIO19 P1

JTAG_TCKJ3

JTAG_TMSH7

JTAG_TDIK5

JTAG_TDOH1

SERIRQ V5

SPKRT10

SATAICOMPO Y11

SATA3COMPI AB13

SATA3RCOMPO AB12

SATA3RBIAS AH1

RTC

IHDA

SATA

LPC

SPI

JTAG

SATA 6G

1 OF 10

CougarPoint

PCH1A

COUGAR-GP-U2-NF

RTC

IHDA

SATA

LPC

SPI

JTAG

SATA 6G

1 OF 10

CougarPoint

PCH1A

COUGAR-GP-U2-NF

1 2

R2105330KR2F-L-GP

R2105330KR2F-L-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_THERMTRIP_R

INIT3_3V#

FDI_OVRVLTG

DMI_OVRVLTG

H_PECI_R

PLL_ODVR_EN

GSENSOR_DET

RTC_DET#

DBC_EN

PCH_GPIO15

EC_SMI#

DGPU_HPD_INTR#

PCH_GPIO27

GSENSOR_DET

PLL_ODVR_EN

DMI_OVRVLTG

FDI_OVRVLTG

ICC_EN#

MFG_MODE

S_GPIO GPIO0

ICC_EN#

EC_SCI#

PCH_GPIO16

DGPU_PWROK

PCH_TEMP_ALERT#

PSW_CLR#

PCH_GPIO48

VRAM_SIZE1

VRAM_SIZE2

TS_VSS

UMA_DIS#

USB2_CRT_ON#

3G_EN

H_RCIN#

RTC_DET#USB2_CRT_ON#

H_A20GATE

SATA_ODD_PRSNT#

PCH_TEMP_ALERT#

MFG_MODE

PCH_NCTF_2

PCH_NCTF_4

PCH_NCTF_3

PCH_NCTF_1

PCH_GPIO15

PCH_GPIO48

DBC_EN

EC_SMI#

DGPU_HPD_INTR#EC_SCI#

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S5

3D3V_S0

H_A20GATE 27

H_CPUPWRGD 5,36

H_THERMTRIP# 5,36

H_RCIN# 27

H_PECI 5,27

EC_SMI#27

SATA_ODD_PRSNT#56

EC_SCI#27

DGPU_PWROK83,92,93

SATA_ODD_PWRGT 56

FP_DET#21

UMA_DIS# 20

3G_EN82

PSW_CLR#21

S_GPIO21

RTC_DET#60

USB2_CRT_ON#61

Title


Date: Sheet of


QUEEN 15 A00PCH (GPIO/CPU)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = PCH GSENSOR_ST GSENSOR_ADI R2205 DY 10K

R2206 100K DY

ICC_EN#

GPIO36(DMI_OVRVLTG)

DMI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated to same voltage(DC Coupling Model DEFAULT)

PLL ON DIE VR ENABLE

NOTE:This signal has a weak internal pull-up20KENABLED -- HIGH (R2212 UNSTUFFED) DEFAULTDISABLED -- LOW (R2212 STUFFED)

LOW (R2211)- ENABLED

Integrated Clock Chip Enable

HIGH (R2211 DY)- DISABLED [DEFAULT]

Integrated Clock Enable functionality is achievedvia soft-strap. The default is integrated clockenable.

GPIO37(FDI_OVRVLTG)

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated to same voltage(DC Coupling Model DEFAULT)

Integrated Clock Enable functionality is achievedvia soft-strap. The default is integrated clockenable.

Note:For PCH debug with XDP, need to NO STUFF R2218

GPIO8 has a weak[20K] internal pull up.

TS Signal Disable Guideline:TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4 should not float on the motherboard. They should be tied to GND directly.

[VRAM_SIZE1:VRAM_SIZE2]LL=512M / HL=1G / LH=2G

0625 Modify:Change PL 100K 0402 from PH on GFX_CRB_DET.

20100625 V1.2

20100625 V1.2

GPIO27 has a weak[20K] internal pull up.To enable on-die PLL Voltage regurator,should not place external pull down.

0629 Modify:Stuff R2202 200K 0402 1%(ANNIE updated)

0629 Modify:Add R2221 10K 0402 on PCH_GPIO24(ANNIE updated)0709 Modify:Rename PCH_GPIO24 to 3G_EN on R2221.

0701 Modify:Separate PCH_TEMP_ALERT# from RN2201 to R2222 10K base on layout limitation.

0701 Modify:Separate MFG_MODE from RN2202 to R2223 10K base on layout limitation.

0705 Modify:Removed R2214~R2217 10K 0402 on VRAM_SIZE1&2.

0707 Modify:Change R2219 change to 0ohm 0402 from short pad.

0709 Modify:Rename PCH_GPIO22 to DBC_EN.Rename PCH_GPIO24 to 3G_EN.


0714 Modify:Add TP2206~TP2209 on PCH NCTF pin.

0719 Modify:Change R2202 to 100K from 200K.

0720 Modify:Removed DBC_EN on GPIO22.

0908 X01 Modify:change FFS_INT2_R from PCH GPIO48 to GPIO14Keep PCH_GPIO5 PH R2201,PCH_GPIO48 PH R2220

0916 X01 Modify:Move EC_SCI#,DBC_EN to RN2201.Move S_GPIO to RN2103.Move PSW_CLR# to RN2104.

0923 SWAP 1118 X02 Modify:Rename GFX_CRB_DET to GSENSOR_DETon GPIO39.

1120 X02 Modify:Rename PCH_GPIO12 to RTC_DET#on GPIO12.

1120 X02 Modify:Rename PCH_GPIO12 to RTC_DET#on GPIO12.

1118 X02 Modify:Rename USB3_PWR_ON to PCH_GPIO57.1120 X02 Modify:Reserved USB2_CRT_ON# to control U6102 USB power switch from PCH GPIO57.

123

4RN2204

SRN10KJ-5-GP

RN2204

SRN10KJ-5-GP


21

G2201

GAP-O

PEN

G2201

GAP-O

PEN


1 2R22011KR2J-1-GP

R22011KR2J-1-GP

12

R221010KR2J-3-GPR221010KR2J-3-GP



12



1 2R22111KR2J-1-GP

R22111KR2J-1-GP

1 2R2213 0R0402-PADR2213 0R0402-PAD

12


1 2R2222 10KR2J-3-GPR2222 10KR2J-3-GP

1234 5

678

RN2201

SRN10KJ-6-GP

RN2201

SRN10KJ-6-GP


1 2R22121KR2J-1-GP

DY R22121KR2J-1-GP

DY

1 2R2202

100KR2J-1-GP

R2202

100KR2J-1-GP

12 3

4

RN2203

SRN10KJ-5-GP

RN2203

SRN10KJ-5-GP

1 2R2221

10KR2J-3-GP

R2221

10KR2J-3-GP

1 2R2223 10KR2J-3-GPR2223 10KR2J-3-GP

1 2R2218100R2J-2-GP

R2218100R2J-2-GP

1 2R2204 390R2J-1-GPR2204 390R2J-1-GP

1 2R22030R2J-2-GPDY R22030R2J-2-GPDY

12

R220710KR2J-3-GP

DY

R220710KR2J-3-GP

DY


1 2R2219 0R0402-PADR2219 0R0402-PAD


1 2R2220 10KR2J-3-GPR2220 10KR2J-3-GP

12

R220810KR2J-3-GPR220810KR2J-3-GP

12

R220910KR2J-3-GP

DY

R220910KR2J-3-GP

DY

GPIO27E16

GPIO28P8

GPIO24/MEM_LEDE8

GPIO57D6

LAN_PHY_PWR_CTRL/GPIO12C4

NCTF_VSS#A4A4

NCTF_VSS#A44A44

NCTF_VSS#A45A45

NCTF_VSS#A46A46

NCTF_VSS#A5A5

NCTF_VSS#A6A6

NCTF_VSS#B3B3

NCTF_VSS#B47B47

NCTF_VSS#BD1BD1

NCTF_VSS#BD49BD49

NCTF_VSS#BE1BE1

NCTF_VSS#BE49BE49

TACH2/GPIO6H36

TACH0/GPIO17D40

TACH3/GPIO7E38

SATA3GP/GPIO37M5

SATA5GP/GPIO49V3

SCLOCK/GPIO22T5

SLOAD/GPIO38N2

SDATAOUT0/GPIO39M3

SDATAOUT1/GPIO48V13

PROCPWRGD AY11

RCIN# P5

PECI AU16

THRMTRIP# AY10

GPIO8C10

BMBUSY#/GPIO0T7

GPIO15G2

TACH1/GPIO1A42

SATA2GP/GPIO36V8

INIT3_3V# T14

STP_PCI#/GPIO34K1

GPIO35K4

SATA4GP/GPIO16U2

NCTF_VSS#F49 F49

A20GATE P4

TACH4/GPIO68 C40

TACH6/GPIO70 C41

TACH7/GPIO71 A40

TACH5/GPIO69 B41

NCTF_VSS#BH3 BH3

NCTF_VSS#BH47 BH47

NCTF_VSS#BJ4 BJ4

NCTF_VSS#BJ44 BJ44

NCTF_VSS#BJ45 BJ45

NCTF_VSS#BJ46 BJ46

NCTF_VSS#BJ5 BJ5

NCTF_VSS#BJ6 BJ6

NCTF_VSS#C2 C2

NCTF_VSS#C48 C48

NCTF_VSS#D1 D1

NCTF_VSS#D49 D49

NCTF_VSS#E1 E1

NCTF_VSS#E49 E49

NCTF_VSS#F1 F1

TS_VSS4 AK10

TS_VSS3 AH10

TS_VSS2 AK11

TS_VSS1 AH8

NC_1 P37

NCTF_VSS#BF1BF1

NCTF_VSS#BF49BF49

NCTF_VSS#BG2 BG2

NCTF_VSS#BG48 BG48

CPU/MISC

NCTF

GPIO

6 OF 10

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49

BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48

D1,D49,E1,E49,F1,F49

CougarPoint

PCH1F

COUGAR-GP-U2-NF

CPU/MISC

NCTF

GPIO

6 OF 10

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49

BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48

D1,D49,E1,E49,F1,F49

CougarPoint

PCH1F

COUGAR-GP-U2-NF


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.8VS_VCCTX_LVDS

+1.05VS_VCC_DMI_CCI

+1.05VS_VCC_DMI

+VCCA_DAC_1_2

+1.05VS_VCC_DMI

+3VS_VCCA_LVDS

VCCAPLLEXP

VCCFDIPLL

VCCVRM

1D05V_VTT

1D05V_VTT

1D05V_VTT

1D05V_VTT

3D3V_S0

1D05V_VTT

3D3V_S0

1D05V_VTT

1D8V_S0

3D3V_S5

3D3V_S0

3D3V_S0

1D8V_S0

1D5V_S0

3D3V_DAC_S0

1D5V_S0

3D3V_S05V_S5 3D3V_DAC_S0

Title


Date: Sheet of


QUEEN 15 A00PCH (POWER1)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = PCH 6A

2.925A(Total current of VCCIO)

0.266A (Totally VCC3_3 current)

0.159A(Totally current of VCCVRM)

0.042A (Totally current of VCCDMI)

(10uF x1)

(1uFx3)(10uFx1_0603)

(1uF x4)

(0.1uF x1)

1.3A(Total current of VCCCORE) (10uF x1_0603)(0.1uF/0.01uF x1)

(22uF x1)(0.01uF x2)

0.06A

(0.1uFx1)

(1uFx1)

0.001A

(1uF x1)

(1uFx1)(10uFx1)

0.02A

0.19A

(0.1uFx1)

VCCVRM(Internal PLL and VRMs):A.1.5V for Mobile B.1.8 V for Desktop

Refer to NPCE795 shared SPI flash architecture

0.001A

0.266A

0.16A

0.042A

0.02A

0818De-cap

0917 X01 Modify:Change R2304 to 0R0603 short pad from 0ohm.

1111 X02 Modify:Change VCCADAC power source to 3D3V_DAC_S0 from 3D3V_S0.

A00 1228

A001119 X02 Modify:Reserved R2308 on VCCVRM power rail.

1122 X02 Modify:Removed U2302 LDO for VCCVRM.

1117 X02 Modify:Add G9091 LDO circuit for CRT DAC powerto avoid monitor noise issue.1122 X02 Modify:base on layout condition change 3D3V_DAC_S0circuit.

Current Limit=360mA

20100621 V1.2

3.3V CRT LDO

A00

A00

A00 1229 add 3rd Richtek(74.09198.G7F) on U2301 at XBuild batch run config

12

C23

09SC

1U6D

3V2K

X-G

PC

2309

SC1U

6D3V

2KX-

GP

12

C23

05SC

10U

6D3V

5KX-

1GP

C23

05SC

10U

6D3V

5KX-

1GP

12

C2313

SCD

01U

16V2

KX-3

GP

C2313

SCD

01U

16V2

KX-3

GP

12


12

C23

02SC

1U6D

3V2K

X-G

PC

2302

SC1U

6D3V

2KX-

GP

12

C23

04SC

1U6D

3V2K

X-G

PC

2304

SC1U

6D3V

2KX-

GP

12

C2310SCD1U10V2KX-5GPC2310SCD1U10V2KX-5GP


12

C23

16SC

D01

U16

V2KX

-3G

PC

2316

SCD

01U

16V2

KX-3

GP

12


VIN1GND2EN3 NC#4 4

VOUT 5

U2301

G9091-330T11U-GP

2nd = 74.09198.G7F74.09091.J3F

3rd = 74.07716.A7F

U2301

G9091-330T11U-GP

2nd = 74.09198.G7F74.09091.J3F

3rd = 74.07716.A7F

12

C23

01SC

10U

6D3V

5KX-

1GP

C23

01SC

10U

6D3V

5KX-

1GP

VCCCOREAA23VCCCOREAC23VCCCOREAD21VCCCOREAD23VCCCOREAF21VCCCOREAF23VCCCOREAG21VCCCOREAG23VCCCOREAG24VCCCOREAG26VCCCOREAG27VCCCOREAG29VCCCOREAJ23VCCCOREAJ26VCCCOREAJ27

VccDFTERM AJ17

VccDFTERM AJ16

VCCIOAN21

VCCIOAN26

VCCIOAN27

VCCIOAP21

VCCIOAP26

VCCIOAT24

VCCIOAN16

VCCIOAN17

VCCIOAP23

VCCIOAP24

VCCADAC U48

VCCTX_LVDS AM37

VCCTX_LVDS AM38

VCCALVDS AK36

VCCVRM AT16

VCCVRMAP16

VCCAPLLEXPBJ22

VCCAFDIPLLBG6

VCCIOAN19 VCCTX_LVDS AP37

VCCTX_LVDS AP36

VSSADAC U47

VSSALVDS AK37

VCCIOAP17

VCC3_3 V33

VCC3_3 V34

VCC3_3BH29 VccDFTERM AG17

VccDFTERM AG16

VCCDMI AT20

VCCIOAN33

VCCIOAN34

VCCCOREAJ29VCCCOREAJ31

VCCSPI V1

VCCCLKDMI AB36

VCCDMIAU20

POWER

VCC CORE

DMI

VCCIO

CRT

LVDS

FDI

NAND / SPI

HVCMOS

7 OF 10

CougarPoint

PCH1G

COUGAR-GP-U2-NF

POWER

VCC CORE

DMI

VCCIO

CRT

LVDS

FDI

NAND / SPI

HVCMOS

7 OF 10

CougarPoint

PCH1G

COUGAR-GP-U2-NF

1 2R2307

0R0402-PAD-2-GPR2307

0R0402-PAD-2-GP

12

C2312

SC1U

6D3V

2KX-

GP

C2312

SC1U

6D3V

2KX-

GP

12

C2315

SC10

U6D

3V5K

X-1G

P

C2315

SC10

U6D

3V5K

X-1G

P

12


12


12


1 2R2306

0R0402-PAD-2-GPR2306

0R0402-PAD-2-GP

1 2R2308

0R0402-PAD-2-GP

R2308

0R0402-PAD-2-GP

12

C23

07SC

D1U

10V2

KX-5

GP

C23

07SC

D1U

10V2

KX-5

GP

12

C2318

SC10

U6D

3V5K

X-1G

P

C2318

SC10

U6D

3V5K

X-1G

P

1 2

R2301

0R0402-PAD-2-GP

R2301

0R0402-PAD-2-GP

1 2L2301

HCB1608KF-181-GP

2nd = 68.00206.0413rd = 68.00335.08168.00214.051

DYL2301

HCB1608KF-181-GP

2nd = 68.00206.0413rd = 68.00335.08168.00214.051

DY

12

C23

08SC

1U6D

3V2K

X-G

PC

2308

SC1U

6D3V

2KX-

GP

12

C23

06SC

1U6D

3V2K

X-G

PC

2306

SC1U

6D3V

2KX-

GP

1 2R23050R0805-PADR23050R0805-PAD

12

C23

03SC

1U6D

3V2K

X-G

PC

2303

SC1U

6D3V

2KX-

GP

12

C23

17SC

D01

U16

V2KX

-3G

PC

2317

SCD

01U

16V2

KX-3

GP

12

C2314

SCD

1U10

V2KX

-5G

P

C2314

SCD

1U10

V2KX

-5G

P

12

C2311

SC1U

10V2

KX-1

GP

C2311

SC1U

10V2

KX-1

GP

1 2R23040R0603-PADR23040R0603-PAD


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+V1.05S_SSCVCC

+VCCSUS1

+V1.05S_VCCAPLL_SATA3

+V3.3S_VCC_CLKF33

+V1.05S_SSCVCC

+V3.3S_VCC_CLKF33

+1.05VS_VCCA_A_DPL

+VCCRTCEXT

DCPSUSBYP

VCCACLK

+VCCSST

+VCCDIFFCLK

+1.05VS_VCCA_B_DPL

+5VA_PCH_VCC5REFSUS

+VCCAPLL_CPY_PCH

+5VS_PCH_VCC5REF

+VCCPDSW

+VCCDIFFCLK

+VCCA_USBSUS

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+1.05VS_VCCA_A_DPL

DCPSUS

3D3V_S5

3D3V_S5

3D3V_S0

3D3V_S5

1D05V_VTT

1D05V_VTT

3D3V_S0

1D05V_VTT

3D3V_S0

1D05V_VTT

1D05V_VTT

1D05V_VTT

1D05V_VTT

RTC_AUX_S5

1D05V_VTT

3D3V_S0

1D5V_S01D05V_VTT

1D05V_VTT

+VCCDIFFCLKN

3D3V_S5

1D05V_VTT

3D3V_S5

1D05V_VTT

5V_S0

5V_S5

1D5V_S0

+3VS_+1.5VS_HDA_IO

3D3V_S5+3VS_+1.5VS_HDA_IO

3D3V_S5

1D05V_VTT

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = PCH

(1uFx1)(10uFx1)

(0.1uFx1)

(1uFx3)(22uFx2_0603)

(10uFx1)

0.002A

1.01A (Total current of VCCASW)

0.16A (Totally current of VCCVRM(0.1uFx1)

0.055A

(0.1uFx1)

0.095A

0.001A

6uA

(0.1uFx2)

(1uFx1)

(1uFx1)

(0.1uFx2)

(1uFx1)

(1uFx1)

(4.7uFx1_0603)

(1uFx1)

(10uFx1)

(0.1uFx1)

(1uFx1)

(0.1uFx2)

(1uFx1)

0.01A

(1uFx1)

0.001A

0.001A

0.097A (Totally current of VCCSUS3_3)

(1uFx1)

(0.1uFx1)

(0.1uFx1)

(0.1uFx1)

(0.1uFx1)

(1uFx1)

0617 Modify:Joseph Rename 1D5V_S0_1D8V_S0 to 1D5V_S0 for VCCVRM.

0714 Modify:Reserved C2443,C2444 on +1.05VS_VCCA_A_DPL,+1.05VS_VCCA_B_DPL same as DG15.

0.08A

0.08A

(220uFx1)

(220uFx1)

(1uFx1)

(1uFx1)

0714 Modify:Removed C2419 1uF base on Annie updated schematic.

0818De-cap

0818De-cap

0818De-cap

A00

A00

21

D2402CH751H-40PT-GP83.R0304.A8F2nd = 83.R2004.B8F





12


1 2L2401

IND-10UH-218-GP

2nd = 68.1001E.10N68.10050.10Y

L2401

IND-10UH-218-GP

2nd = 68.1001E.10N68.10050.10Y

12

C2427SC1U10V2KX-1GPC2427SC1U10V2KX-1GP

12

C2434

SC10

U6D

3V5K

X-1G

PDYC2434

SC10

U6D

3V5K

X-1G

PDY

DCPSUSBYPV12

VCCASWAA19

VCCASWAA21

VCCASWAA24

VCCASWAA27

VCCASWAA29

VCCSUSHDA P32

VCCSUS3_3 P24

VCCIO T26

VCCIO AD17

VCCASWAA31

VCCASWAC26

VCCASWAC27

VCCASWAC29

VCCASWAC31

VCCASWAD29

V5REF P34

VCC3_3 T34

VCCRTCA22

VCCSUS3_3 V24

VCCSUS3_3 V23

VCCSUS3_3 T24

VCCSUS3_3 T23

VCCIO AC16

VCCADPLLBBF47

VCCDIFFCLKNAF33

V5REF_SUS M26

VCCIO AC17

DCPSUST17

VCCSSCAG33

VCCADPLLABD47

VCCVRMY49

VCCACLKAD49

DCPRTCN16

VCCASWAA26

VCCDIFFCLKNAF34

VCCIOAF17

DCPSSTV16

VCCIO AF13

VCCASW T21

VCCASW V21

VCCASW T19

VCC3_3 AA16

VCC3_3 W16

VCCSUS3_3 N20

VCCSUS3_3 N22

VCCSUS3_3 P20

VCCSUS3_3 P22

VCCIO N26

VCCIO P26

VCCIO P28

VCCIO T27

V_PROC_IOBJ8

VCCIO T29

VCCDIFFCLKNAG34

VCCASWAD31

VCCASWW21

VCCASWW23

VCCASWW24

VCCASWW26

VCCASWW29

VCCASWW31

VCCASWW33

VCCIO AF14

VCCVRM AF11

VCCIO AH13

VCCIO AH14

VCC3_3 AJ2

VCCAPLLSATA AK1

DCPSUSAL24

VCCIOAL29

DCPSUS AN23

VCCSUS3_3 AN24

VCCAPLLDMI2BH23

DCPSUSV19

VCCDSW3_3T16

VCC3_3T38

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

RTC

PCI/GPIO/LPC

MISC

10 OF 10

CougarPoint

PCH1J

COUGAR-GP-U2-NF

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

RTC

PCI/GPIO/LPC

MISC

10 OF 10

CougarPoint

PCH1J

COUGAR-GP-U2-NF

12

C2411SCD1U10V2KX-5GP


1 2L2403

IND-10UH-218-GP

2nd = 68.1001E.10N68.10050.10Y

L2403

IND-10UH-218-GP

2nd = 68.1001E.10N68.10050.10Y

12


12

C24

18SC

D1U

10V2

KX-5

GP

C24

18SC

D1U

10V2

KX-5

GP


12



12

C24

06SC

1U6D

3V2K

X-G

PC

2406

SC1U

6D3V

2KX-

GP

1 2L2402

IND-10UH-218-GP

2nd = 68.1001E.10N68.10050.10Y

L2402

IND-10UH-218-GP

2nd = 68.1001E.10N68.10050.10Y

1 2R2411

0R3J-0-U-GPDYR2411

0R3J-0-U-GPDY

12

C24

07SC

1U6D

3V2K

X-G

PC

2407

SC1U

6D3V

2KX-

GP

1 2R24030R0603-PADR24030R0603-PAD

12




12

C24

08SC

D1U

10V2

KX-5

GP

C24

08SC

D1U

10V2

KX-5

GP

12



12

C24

22SC

D1U

10V2

KX-5

GP

C24

22SC

D1U

10V2

KX-5

GP

12

C2443

SC10

U6D

3V3M

X-G

P

DY

C2443

SC10

U6D

3V3M

X-G

P

DY

12


21



12C2415

SCD1U10V2KX-5GPC2415

SCD1U10V2KX-5GP

12

C2404

SC10

U6D

3V5K

X-1G

P

C2404

SC10

U6D

3V5K

X-1G

P

12

C2403

SC10

U6D

3V5K

X-1G

P

C2403

SC10

U6D

3V5K

X-1G

P

12

C2412SC1U6D3V2KX-GPC2412

SC1U6D3V2KX-GP

12

C2444

SC10

U6D

3V3M

X-G

P

DY

C2444

SC10

U6D

3V3M

X-G

P

DY

12

C2402SC1U10V2KX-1GPC2402SC1U10V2KX-1GP

12

C2413SC1U6D3V2KX-GPC2413

SC1U6D3V2KX-GP

12



12

C24

21SC

D1U

10V2

KX-5

GP

C24

21SC

D1U

10V2

KX-5

GP

1 2R24090R0603-PADR24090R0603-PAD

1 2R2408

10R2J-2-GP

R2408

10R2J-2-GP

12

C2428SC1U6D3V2KX-GP

C2428SC1U6D3V2KX-GP

12


12


12


1 2

R2405

0R0402-PAD-2-GP

R2405

0R0402-PAD-2-GP


1 2R2407

10R2J-2-GP

R2407

10R2J-2-GP

1 2R24060R0603-PADR24060R0603-PAD

12


12

C2417SC4D7U6D3V3KX-GP


12

C2432SC1U6D3V2KX-GP

C2432SC1U6D3V2KX-GP

12

C2437SC1U10V2KX-1GPDYC2437SC1U10V2KX-1GPDY

1 2

R2404

0R0402-PAD-2-GP

R2404

0R0402-PAD-2-GP

12

C2414SC1U6D3V2KX-GP

C2414SC1U6D3V2KX-GP

12

C2401

SC10

U6D

3V5K

X-1G

P

C2401

SC10

U6D

3V5K

X-1G

P

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00PCH (VSS)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = PCHVSSAY4VSSAY42VSSAY46VSSAY8VSSB11VSSB15VSSB19VSSB23VSSB27VSSB31VSSB35VSSB39VSSB7

VSSBB12VSSBB16VSSBB20VSSBB22VSSBB24VSSBB28VSSBB30VSSBB38VSSBB4VSSBB46VSSBC14VSSBC18VSSBC2VSSBC22VSSBC26VSSBC32VSSBC34VSSBC36VSSBC40VSSBC42VSSBC48VSSBD46VSSBD5VSSBE22VSSBE26VSSBE40VSSBF10VSSBF12VSSBF16VSSBF20VSSBF22VSSBF24VSSBF26VSSBF28VSSBD3VSSBF30VSSBF38VSSBF40VSSBF8VSSBG17VSSBG21VSSBG33VSSBG44VSSBG8VSSBH11VSSBH15VSSBH17VSSBH19

VSSBH27VSSBH31VSSBH33VSSBH35VSSBH39VSSBH43VSSBH7VSSD3VSSD12VSSD16VSSD18VSSD22VSSD24VSSD26VSSD30VSSD32

VSS K7VSS L18VSS L2VSS L20VSS L26VSS L28VSS L36VSS L48VSS M12VSS P16VSS M18VSS M22VSS M24VSS M30VSS M32VSS M34VSS M38VSS M4VSS M42VSS M46VSS M8VSS N18VSS P30

VSS P11VSS P18VSS T33VSS P40VSS P43VSS P47VSS P7VSS R2VSS R48VSS T12VSS T31VSS T37VSS T4VSS W34VSS T46VSS T47VSS T8VSS V11VSS V17VSS V26VSS V27VSS V29VSS V31VSS V36VSS V39VSS V43VSS V7VSS W17VSS W19

VSSD34VSSD38VSSD42VSSD8VSSE18VSSE26VSSG18VSSG20VSSG26VSSG28VSSG36VSSG48VSSH12VSSH18

VSS W2VSS W27VSS W48VSS Y12VSS Y38VSS Y4VSS Y42VSS Y46VSS Y8VSS BG29VSS N24VSS AJ3

VSS N47

VSSH22VSSH24VSSH26VSSH30VSSH32VSSH34VSSF3

VSS K39VSS K46

VSS H46VSS K18VSS K26

VSS AD47VSS B43VSS BE10VSS BG41VSS G14VSS H16VSS T36VSS BG22VSS BG24VSS C22VSS AP13

VSSF45

VSSH10

VSS M14VSS AP3VSS AP1VSS BE16VSS BC16VSS BG28VSS BJ28

9 OF 10

CougarPoint

PCH1I

COUGAR-GP-U2-NF

9 OF 10

CougarPoint

PCH1I

COUGAR-GP-U2-NF

VSSAA17VSSAA2VSSAA3

VSSAA34VSSAB11VSSAB14VSSAB39VSSAB4VSSAB43VSSAB5VSSAB7VSSAC19VSSAC2VSSAC21VSSAC24VSSAC33VSSAC34VSSAC48VSSAD10VSSAD11VSSAD12VSSAD13VSSAD19VSSAD24VSSAD26VSSAD27VSSAD33VSSAD34VSSAD36VSSAD37

VSSAD39VSSAD4VSSAD40VSSAD42VSSAD43VSSAD45VSSAD46

VSSAF10VSSAF12

VSSAD16VSSAF16VSSAF19VSSAF24VSSAF26VSSAF27VSSAF29VSSAF31VSSAF38VSSAF4VSSAF42VSSAF46

VSSAF7VSSAF8VSSAG19VSSAG2VSSAG31VSSAG48VSSAH11VSSAH3VSSAH36VSSAH39VSSAH40VSSAH42VSSAH46VSSAH7VSSAJ19

VSSAJ33VSSAJ34VSSAK12VSSAK3

VSS AK38VSS AK4VSS AK42VSS AK46VSS AK8VSS AL16VSS AL17VSS AL19VSS AL2VSS AL21VSS AL23VSS AL26VSS AL27VSS AL31

VSS AL48VSS AM11VSS AM14VSS AM36VSS AM39

VSS AM45VSS AM46VSS AM7VSS AN2VSS AN29VSS AN3VSS AN31VSS AP12VSS AP19VSS AP28VSS AP30VSS AP32VSS AP38

VSS AP42VSS AP46VSS AP8VSS AR2VSS AR48VSS AT11VSS AT13VSS AT18VSS AT22VSS AT26VSS AT28VSS AT30VSS AT32

VSS AT42VSS AT46VSS AT7VSS AU24VSS AU30VSS AV16VSS AV20VSS AV24VSS AV30VSS AV38VSS AV4VSS AV43VSS AV8VSS AW14VSS AW18VSS AW2VSS AW22VSS AW26VSS AW28VSS AW32VSS AW34VSS AW36VSS AW40VSS AW48VSS AV11VSS AY12VSS AY22VSS AY28

VSSAD8

VSSAE3

VSSAD14

VSS AP4

VSSH5

VSSAF5

VSSAD38

VSSAA33

VSSAJ21VSSAJ24

VSSAE2

VSS AT34VSS AT39

VSS AM43

VSS AL34VSS AL33

8 OF 10

CougarPoint

PCH1H

COUGAR-GP-U2-NF

8 OF 10

CougarPoint

PCH1H

COUGAR-GP-U2-NF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00Reserved

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PSL_IN1

PROCHOT_EC

ECSMI#_KBC

EC_GPIO97

ECRST#

USB3_PWR_ON

EC_SPI_DO_C

EC_SPI_CLK_C

ECSWI#_KBC

ECSCI#_KBC

PECI

KCOL0

ECRST#

KCOL9KCOL10KCOL11KCOL12KCOL13KCOL14KCOL15KCOL16

KROW0KROW1

KCOL1

KROW2

KCOL2

KROW3

KCOL3KCOL4

KROW4KROW5

KCOL5KCOL6

KROW6KROW7

KCOL7KCOL8

KBC_VCORF

PANEL_BLENECSCI#_KBC

ECSWI#_KBC

LPC_AD0LPC_AD1LPC_AD2LPC_AD3

MEDIA_BTN1#

VBAT

H_PROCHOT#_EC

PROCHOT_EC

3D3V_AUX_KBC_VCC

EC_GPIO72

EC_SPI_DI_C

PSL_OUT

ECSMI#_KBC

PSL_IN2

PLT_RST#_EC

PCB_VER_AD

MODEL_ID_DET

USB_DET#

EC_SPI_CS#_C

MEDIA_BTN2#

EC_A

GN

D

EC_SPI_DI_C

EC_ENABLE#_1

PANEL_BLEN

EC_VTT

KBC_ON#

EC_GPIO72

AC_IN#_KBC

KBC_ON#_R

AC_OK

KBC_ON#_RKBC_ON#

EC_ENABLE#_1

PSL_IN1

EC_GPIO72

FAN_TACH1

E51_RxD

BAT_SCLBAT_SDA

BLUETOOTH_EN

AC_IN#_KBCBAT_IN#

S5_ENABLEECRST#

EC_ENABLE#_1

PSL_IN1

ECSWI#_KBC

ECSCI#_KBC

ECSMI#_KBC

PCB_VER_AD MODEL_ID_DET

CPU_THRM

USB3_PWR_ON

SYS_THRM

KBC_ON#_R

INSTANT_ON#

MEDIA_BTN1#

MEDIA_BTN3#

MEDIA_BTN1#

PCIE_WAKE#

USB_DET#

USB_DET#

KBC_ON#_R

USBDET_CON#

KBC_ON#_R

DATA_RECOVERY#

MEDIA_BTN2#

PSL_OUT

AD_IA_HW2

KBC_ON#_R

EC_GPIO72

KBC_ON#

PSL_IN2

AC_IN#_KBC

KBC_ON#_GATE

S5_ENABLE

MEDIA_BTN2#MODEL_ID_DET

3D3V_S03D3V_AUX_KBC

EC_AGND

1D05V_VTT

3D3V_AUX_S5

EC_AGND

3D3V_AUX_KBCRTC_AUX_S5

3D3V_AUX_KBC

3D3V_AUX_KBC

3D3V_S0

3D3V_AUX_KBC

EC_AGND

3D3V_AUX_KBC

EC_AGND

EC_AGND

EC_AGND 3D3V_AUX_KBC

3D3V_AUX_S5

3D3V_AUX_S5

3D3V_AUX_KBC

3D3V_AUX_KBC

EC_AGND

SPI_CLK_R 21,60

SPI_SI_R 21,60

BAT_IN#39

SPI_SO_R 21,60

AD_IA40

PM_SLP_S3#19,36,37,47,75

KBC_BEEP29

SPI_CS0#_R 21,60

TPCLK 69TPDATA 69

USB_PWR_EN#61

EC_SCI#22

EC_SWI#20

PM_SLP_S4#19,46,75

AMP_MUTE#29

RSMRST#_KBC19

BLON_OUT 49

SUS_PWR_ACK19

PCH_SUSCLK_KBC19

PLT_RST# 5,18,71,75,82,83

PURE_HW_SHUTDOWN#28,36,86

PWRLED#68ME_UNLOCK21

H_PECI5,22

KCOL[0..16] 69

KROW[0..7] 69

H_A20GATE 22

LID_CLOSE#70

BAT_SDA 39,40BAT_SCL 39,40

WIFI_RF_EN82

PM_CLKRUN# 19

LPC_FRAME# 21,71

INT_SERIRQ 21

LPC_AD[0..3] 21,71

S5_ENABLE36

E51_RxD82E51_TxD82

AC_PRESENT19,86

BLUETOOTH_EN63,82

CLK_PCI_KBC 18

SML1_DATA 20,86SML1_CLK 20,86

HDMI_IN# 51

PM_PWRBTN#19

H_RCIN# 22

H_PROCHOT# 5,40,42

CHG_AMBER_LED#68

USB3_PWR_ON82

EC_SMI#22

FAN1_DAC28

FAN_TACH128

CPU_THRM28

SYS_THRM28

S0_PWR_GOOD19,36

L_BKLT_EN17

KB_BL_CTRL69

PSID_EC82

USBCHARGER_CB057

PM_LAN_ENABLE 82

LCD_TST49

BATT_WHITE_LED#68

CAP_LED69

RCID82

LCD_TST_EN 49

TP_LOCK_LED#68

AC_OK40

FAN_TACH128

MEDIA_LED1#82

MEDIA_LED3#82

IMVP_PWRGD36,42

PCIE_WAKE#75,82

MEDIA_BTN3#82

PCH_WAKE# 19

EC_SCI#22

EC_SWI#20

EC_SMI#22

MEDIA_LED2#82

AD_IA_HW40

USBDET_CON#57

INSTANT_ON#82

DATA_RECOVERY#82

AD_IA_HW2 40

KBC_PWRBTN#68

AC_IN# 40

Title


Date: Sheet of


QUEEN 15 A00KBC Nuvoton NPCE795

A2


<Core Design>

Title


Date: Sheet of



A2


<Core Design>

Title


Date: Sheet of



A2


<Core Design>

<------PCH / eDP<------ BATTERY / CHARGER

SSID = KBC

NOTE:Connect GND and AGND planes via either 0R resistor or one point layout connection.

Need very close to EC

EC_GPIO47 High Active

NOTE:Locate resistors R2736,R2719 and R2722 close to the NPCE795P.

<------ TP

ROSA Multi GPIO setting0604 Modify:Add Pull down 100k ohm at F_SDI for Power consumption concern.

0604 Modify:RN2704 pull-Low 10K Resistor to DYon BLUETOOTH_EN.

20100609 V1.0

0621 Modify:Removed R2723

PSL SOLUTION

PSL_IN1

PSL_OUT

10mW SOLUTION

VBACKUP

0623 Modify:Change RN2704 to R2708 10K 0402 Resistor on BLUETOOTH_EN.

0604 Modify:RN2704 pull-Low 10K Resistor to DYon BLUETOOTH_EN.

0623 Modify:Change RN2702 to R2712 10K 0402 Resistor on FAN_TACH1.

EC GPIO standard PH/PL

0628 Modify:Move R2771 to closed 3D3V_AUX_KBC power rail base on layout placement.

0628 Modify:Stuff R2712 and Removed R2805.

0629 Modify:Rename PWRLED#&PWR_BTN_LED#&CHARGE_LED#.0715 Modify:Removed PWR_BTN_LED# on KBC GPIO45.0720 Modify:Change MEDIA_LED2# to KBC GPIO45.Add AD_IA_HW on KBC GPIO66.

0629 Modify:Rename TP_LOCK_LED#&BATT_WHITE_LED#

0630 Modify:Removed LID_CLOSE# PH 10K on RN2705.

0630 Modify:Removed R2762 100K 0402.

0702 Modify:Rename EC_GPIO6 to PSL_IN2

0702 Modify:Rename EC_GPIO70 to PSL_IN1Rename EC_GPIO71 to PSL_OUT

0702 Modify:Rename EC_GPIO70 to PSL_IN1

0702 Modify:Rename EC_GPIO71 to PSL_OUT

0702 Modify:Rename CHARGE_LED# to CHG_AMBER_LED#Rename DC_BATFULL# to BATT_WHITE_LED#.


0707 Modify:KBC_GPIO14 change to PCIE_WAKE#.

0706 Modify:KBC GPIO7 change to DISCRETE#KBC GPIO97 change to IMVP_PWRGD.

0707 Modify:Rename DISCRETE# to MODEL_ID_DET.Rename EC_GPIO36 for MEDIA_BTN3#.

0707 Modify:Rename DISCRETE# to MODEL_ID_DET.Change R2739 to 100K 0402 from 10K.

Reserved

47.0K

1.65VReserved

64.9K

76.8

100.0K

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

100.0KX00

X01

3.0V

2.75V

X02

100.0K

2.48V

A00

100.0K

100.0K

100.0K

100.0K

100.0K

10.0K

2.24V

Reserved

20.0K

2.0V

33.0K

1.87V

0707 Modify:Rename PCH_TEMP_ALERT# for HDMI_IN#

0708 Modify:Rename EG_EN to MEDIA_BTN2# on GPIO96.

0709 Modify:KB_DET# rename to MEDIA_BTN1# on KBC GPIO26.

0709 Modify:Removed R2772 10K PH on EC_GPIO27.0714 Modify:Un-stuff D2705 and Add R2760 between EC_SMI# and ECSMI#_KBC already confirm with NUVOTON and SW.

0709 Modify:EC_GPIO27 change to PCH_WAKE# to PCH.

0712 Modify:default stuff R2756, un-stuff R2734.

0714 Modify:Add USB_DET# on KBC GPIO57/KBSOUT17.

143.0K100.0K 1.358VReserved

174.0KReserved 100.0K 1.204V

Reserved 100.0K 215.0K 1.048V

MODEL_ID_DET(GPIO07)

143.0K100.0K 1.358V

174.0K100.0K

47.0K

1.65V

64.9K

76.8K

100.0K

PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

100.0KDQ15_UMA 3.0V

2.75V100.0K

2.48V100.0K

100.0K

100.0K

100.0K

100.0K

10.0K

2.24V

20.0K

2.0V

33.0K

1.87V

1.204V

DQ15_Ventura 100.0K 215.0K 1.048V

DQ15_ATI

DQ15_NVIDIA

DN15_UMA

DN15_ATI

DQ13_UMA

DQ13_ATI

DN13_UMA

DN13_ATI

0714 Modify:Change C2709,C2710 to EC_AGND from GND.

20100712 V1.5

0714 Modify:Un-stuff D2701,D2704 and Add R2758,R2759 ohm confirm with NUVOTON and SW.

0719 Modify:Reserved 0.1uF on all of ADC input pins base on NUVOTON feedback list.(C2717~C2721)

0719 Modify:Reserved 0.1uF on all of ADC input pins base on NUVOTON feedback list.(C2717~C2721)

Notes:The total SPI interface signal between EC and PCH can¡¦t not exceed 6500mil. The mismatch between SPI signal must be within 500mil

NOTES:The NPCE795P GPIO/PWM outputs that are connected to LEDs have high drive buffers (20mA) and can be connected directly to the LEDs.

C2712 Need very close to EC

NOTES:Please make sure there's no pull-down resistor on USB_PWR_EN#,AC_PRESENT,E51_TXD.

0720 Modify:Stuff C2714 0.1uF on AD_IA.

0722 Modify:Add R2757 0ohm only for DQ15 stuff, change D2706 only for DN15 stuff.

0712 Modify:Add D2706 connect to MEDIA BUTTON Instant_on#.0713 Modify:Add R2772,D2707 for USBCHARGER DETECT Function.

0709 Modify:Add R2774,R2775 PH 100K to 3D3V_AUX_KBC for MEDIA_BTN2#,MEDIA_BTN3#.Add R2776 100K to 3D3V_AUX_KBC for PCIE_WAKE#from DEVICE to KBC.KB_DET# rename to MEDIA_BTN1# on KBC GPIO26.

MEDIA BUTTON CONTROL

0723 Modify:Add R2764,D2708 Base on Dell Peter request, both 13¡¨/15¡¨ Media BTN 2(Recovery Button) need support bootable capability.

0728

0902 X01 Modify:Add C2722 0.1uF between Q2703 G&S pin for fixed leakage voltage to 3D3V_AUX_KBC under DC mode.0916 X01 Modify:Add Q2706 2N7002 to avoid leakage loop from 3D3V_S5 to 3D3V_AUX_KBC issue when 10mWlatched fail timing.

215K=64.21535.6DL

A00 1222

A00 R2739 R2774 for change to parallel resistor

A00

A00

A00

A00

A00

A00

Ventura need to change to 215K(64.21535.6DL)

A00 1228

A00 1228

A00 1228

A00 1228

12

C2701

SC2D

2U10

V3KX

-1G

P

C2701

SC2D

2U10

V3KX

-1G

P

12

R2726100KR2F-L1-GPR2726100KR2F-L1-GP

1 2C2711

SC220P50V2KX-3GPDYC2711

SC220P50V2KX-3GPDY

1 2R2770 100KR2J-1-GPR2770 100KR2J-1-GP

12 33R2J-2-GPR2736 33R2J-2-GPR2736

12

C27

04SC

D1U

10V2

KX-5

GP

C27

04SC

D1U

10V2

KX-5

GP

1 2R2734

0R2J-2-GPDYR2734

0R2J-2-GPDY

1 2R2757

0R2J-2-GPDQ15R2757

0R2J-2-GPDQ15

C

B

E

Q2701

MMBT3906-4-GP

2nd = 84.03906.F1184.T3906.A11

Q2701

MMBT3906-4-GP

2nd = 84.03906.F1184.T3906.A11

1 2C2722

SCD1U10V2KX-5GP

C2722

SCD1U10V2KX-5GP

12C2721 SCD1U10V2KX-5GP

DYC2721 SCD1U10V2KX-5GP

DY1

2

3

D2701

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

DYD2701

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

DY

12

R2773100KR2J-1-GPR2773100KR2J-1-GP

1

2

3

D2708

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

D2708

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

1 2R2733 0R0402-PADR2733 0R0402-PAD1

2

R2732

100K

R2J

-1-G

P

R2732

100K

R2J

-1-G

P

1

2

3

D2706

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81DN15

D2706

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81DN15

12

R272447KR2F-GPR272447KR2F-GP

1 2R2712 10KR2J-3-GPR2712 10KR2J-3-GP

12

R2769100KR2J-1-GPPSLR2769100KR2J-1-GPPSL

1 2R2721 43R2J-GPR2721 43R2J-GP

1 2

R2760

0R0402-PAD-2-GP

R2760

0R0402-PAD-2-GP

1 2R2762

0R0402-PAD-2-GP

R2762

0R0402-PAD-2-GP

12

C27

05SC

D1U

10V2

KX-5

GP

DY C27

05SC

D1U

10V2

KX-5

GP

DY

1 2R2711 0R0402-PADR2711 0R0402-PAD

12 R2722 33R2J-2-GPR2722 33R2J-2-GP1 2R2737 0R0402-PAD-2-GPR2737 0R0402-PAD-2-GP

12

C2713SCD1U10V2KX-5GP DYC2713SCD1U10V2KX-5GP DY

12

C27

06SC

D1U

10V2

KX-5

GP

C27

06SC

D1U

10V2

KX-5

GP

1 2R2708 10KR2J-3-GPDYR2708 10KR2J-3-GPDY

123

4

RN2701

SRN4K7J-8-GP

RN2701

SRN4K7J-8-GP

12

R271033KR2F-GP64.33025.6DL R271033KR2F-GP64.33025.6DL

1

2

3

D2703

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

10mW

D2703

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

10mW


12

R270510KR2J-3-GPR270510KR2J-3-GP

VREF104

GPIO90/AD097GPIO91/AD198GPIO92/AD299

GPIO93/AD3100

GPIO94/DA0101GPIO95/DA1105GPIO96/DA2106

GPIO279GPIO3/AD695GPIO4/AD596

GPIO5/AD4108PSL_IN2#_GPIO693

GPIO7/AD794GPIO16114GPIO246

GPIO30109GPIO34/CIRRXL14

GPIO4180GPIO42/TCK17

GPIO43/TMS20GPIO44/TDI21

GPIO46/CIRRXM/TRST#23GPIO5126PSL_IN1_GPIO7073

PSL_OUT_GPIO7174VBKUP75

GPIO7582GPO76/SHBM83GPIO7784

GPIO8191GPO82/IOX_LDSH/TEST#110

GPIO84/IOX_SCLK/XORTR#112GPIO97107

GPIO3615

VCORF44

GN

D18

GN

D45

GN

D78

GN

D89

GN

D11

6G

ND

5

AG

ND

103

GPIO11/CLKRUN# 8

LAD3 1LAD2 128

LAD1 127LAD0 126

LFRAME# 3LCLK 2LRESET# 7

SERIRQ 125

GPIO85/GA20 121KBRST#/GPIO86 122

ECSCI#/GPIO54 29GPIO65/SMI# 9

GPIO10/LPCPD# 124

GPIO67/PWUREQ# 123

GPIO37/PSCLK1 72

GPIO26/PSCLK2 10GPIO35/PSDAT1 71

GPIO27/PSDAT2 11GPIO50/PSCLK3/TDO 25GPIO52/PSDAT3/RDY# 27

GPIO17/SCL1 70

GPIO73/SCL2 67

GPIO23/SCL3 119

GPIO22/SDA1 69

GPIO74/SDA2 68

GPIO31/SDA3 120GPIO47/SCL4 24

GPIO53/SDA4 28

F_SDI/F_SDIO1 86

F_SDIO/F_SDIO0 87

F_SCK 92F_CS0# 90

VC

C19

VC

C46

VC

C76

VC

C88

VC

C11

5

AV

CC

102

VD

D4

1 OF 2U2701A

NPCE795PA0DX-GP-U

1 OF 2U2701A

NPCE795PA0DX-GP-U

G

S

D

Q2706

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031Q2706

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

1 2R27670R2J-2-GP

DYR2767

0R2J-2-GP

DY

1

2

3

D2707

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

D2707

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81



DY

12R2766

0R0402-PAD-2-GP

10mWR2766

0R0402-PAD-2-GP

10mW

12

R27712D2R3-1-U-GPR27712D2R3-1-U-GP

1 2R2759

0R0402-PAD-2-GP

R2759

0R0402-PAD-2-GP

12

C2712SC1U10V3ZY-6GPC2712SC1U10V3ZY-6GP

12

C2716

SCD

1U16

V2KX

-3G

P

C2716

SCD

1U16

V2KX

-3G

P



DY

12 C

2709

SC2D

2U10

V3KX

-1G

PC

2709

SC2D

2U10

V3KX

-1G

P

12 33R2J-2-GPR2719 33R2J-2-GPR2719

123

4RN2703

SRN100KJ-6-GP

RN2703

SRN100KJ-6-GP

12



1 2R2761 0R0402-PADR2761 0R0402-PAD

1 2R2735

0R0402-PAD-2-GP

R2735

0R0402-PAD-2-GP

12

C2715

SC1U

6D3V

2KX-

GPDY

C2715

SC1U

6D3V

2KX-

GPDYG

S

D

Q2702

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031Q2702

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

123

4RN2706

SRN10KJ-5-GP

RN2706

SRN10KJ-5-GP

12

C2703SC2D2U10V3KX-1GPDY C2703SC2D2U10V3KX-1GPDY

1 2R2776 100KR2J-1-GPR2776 100KR2J-1-GP

G

S

D

Q27052N7002K-2-GP84.2N702.J312ND = 84.2N702.031

PSL

Q27052N7002K-2-GP84.2N702.J312ND = 84.2N702.031

PSL

G

S

D

Q2704

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

10mW

Q2704

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

10mW

1 2R27020R0603-PADR27020R0603-PAD

12



1 2R2768

0R2J-2-GPPSL

R2768

0R2J-2-GPPSL

1 2R2720 0R0402-PADR2720 0R0402-PAD

1

2

3

D2702

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

D2702

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

123

4RN2707

SRN100KJ-6-GP

RN2707

SRN100KJ-6-GP

12



1 2R2772 100KR2J-1-GPR2772 100KR2J-1-GP

1

2

3

D2705

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

DYD2705

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

DY

12345

678

RN2705

SRN10KJ-6-GP

RN2705

SRN10KJ-6-GP

1 2R2756

0R0402-PAD-2-GP10mWR2756

0R0402-PAD-2-GP10mW

12

R2763

0R0402-PAD-2-GP

10mWR2763

0R0402-PAD-2-GP

10mW

12 C

2710

SCD

1U10

V2KX

-5G

PC

2710

SCD

1U10

V2KX

-5G

P

12

C27

08SC

D1U

10V2

KX-5

GP

C27

08SC

D1U

10V2

KX-5

GP

GPIO56/TA131

GPIO20/TA2117GPIO14/TB163GPIO01/TB264

GPIO15/A_PWM32

GPIO21/B_PWM118GPIO13/C_PWM62GPIO32/D_PWM65

GPIO66/G_PWM81GPIO33/H_PWM66

GPIO45/E_PWM22GPIO40/F_PWM16

VCC_POR#85

GPIO83/SOUT_CR/TRIST#111 GPIO87/CIRRXM/SIN_CR113

GPIO00/EXTCLK77 GPIO55/CLKOUT/IOX_DIN_DIO30

PECI13

VTT12

KBSOUT0/JENK# 53

KBSOUT1/TCK 52KBSOUT2/TMS 51KBSOUT3/TDI 50

KBSOUT4/JEN0# 49KBSOUT5/TDO 48

KBSOUT6/RDY# 47KBSOUT7 43KBSOUT8 42

KBSOUT9/SDP_VIS# 41KBSOUT10/P80_CLK 40

KBSOUT11/P80_DAT 39KBSOUT12/GPIO64 38KBSOUT13/GPIO63 37

KBSOUT14/GPIO62 36KBSOUT15/GPIO61/XOR_OUT 35

GPIO60/KBSOUT16 34GPIO57/KBSOUT17 33

KBSIN0 54KBSIN1 55

KBSIN2 56KBSIN3 57KBSIN4 58

KBSIN5 59KBSIN6 60

KBSIN7 61

2 OF 2U2701B

NPCE795PA0DX-GP-U

2 OF 2U2701B

NPCE795PA0DX-GP-U

1 2R2758

0R0402-PAD-2-GP

R2758

0R0402-PAD-2-GP

1 2R2704

330KR2J-L1-GP

R2704

330KR2J-L1-GP

1 2R2775 100KR2J-1-GPR2775 100KR2J-1-GP

12

C27

07SC

D1U

10V2

KX-5

GP

C27

07SC

D1U

10V2

KX-5

GP

SD

G G

D

Q2703DMP2130L-7-GP2ND = 84.03413.A31

84.02130.031

G

D

Q2703DMP2130L-7-GP2ND = 84.03413.A31

84.02130.031


1

2

3

D2704

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

DYD2704

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

THERM_SYS_SHDN#

THERM_SYS_SHDN#_OTZP2800_DXN

ADJ

P2800_DXP

FAN_VCC

FAN_VCC

FAN_TACH1_C

FON#

FAN_VCC

FAN_VCC

ADJ

FAN_VCC

FAN_TACH1_C

U2805_5U2805_1

U2805_4

THERM_SYS_SHDN#_OTZ

THERM_SYS_SHDN#

3D3V_S0

3D3V_S0

3D3V_DAC_S0

5V_S05V_S03D3V_DAC_S0

3D3V_DAC_S0

3D3V_DAC_S0


CPU_THRM 27SYS_THRM 27

FAN_TACH127

FAN1_DAC27

Title


Date: Sheet of


QUEEN 15 A00Thermal P2800/Fan Controllor P2793

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

SSID = Thermal

Layout notice :Both DXN and DXP routing 10 miltrace width and 10 mil spacing.

1.H/W T8 Shutdown2.System Sensor, Put on palm rest

Thermal sensor P2800

For linear FAN

*Layout* 15 mil

Fan controller P2793

0614 Modify:Change FAN1 connector part number to 20.D0210.103 base on ME EMN and DXF.0712 Modify:Change FAN1 part number to 20.F1639.004 from 20.D0210.103 base on latest EMN and DXF.

0628 Modify:Stuff R2712 and Removed R2805.

0705 Modify:R2802 change to 0ohm 0402 from short pad and default un-stuff.

0709 Modify:Removed R2811 and connect 3D3V_S0 to Q2802.G directly.

EMI/ESD

0724 Modify:Removed C2808 0.1uF.

0831

87.1 Degree

*Layout* 10 mil

20101019 X01:Reserve U2804 for PURE_HW_SHUTDOWN# test.20101020 X01:Reserve R2810 to 3D3V_S0 and R2811 to GND for HYST.

1111 X02 Modify:Reserved G709T1UF for T8 solutionsync with DN13.

X02 1111

1117 X02 Modify:Add R2805 0hm between THERM_SYS_SHDN#_OTZand THERM_SYS_SHDN#.

1117 X02 Modify:Rename U2801&U2804 pin 8 to THERM_SYS_SHDN#_OTZ from THERM_SYS_SHDN#.

X02 1118

1111 X02 Modify:ADJ&ADJ_VGA power source change to 3D3V_DAC_S0from 3D3V_S0 to solve T8 shut down issue.

1111 X02 Modify:ADJ&ADJ_VGA power source change to 3D3V_DAC_S0from 3D3V_S0 to solve T8 shut down issue.

1110 X02 Modify:Add 2nd 20.F1841.003 on FAN1 from ME updated connector list.

1119 X02 Modify:Change U2801,U2804,U2805 VCC power to 3D3V_DAC_S0 from 3D3V_S0.

A00 1224

A00 1224Hysterisis:10C for HYST= VCC2C for HYST=GND

A00 1227

1227 A00 Modify:If stuff P2800EA1 then must stuff R2803,R2804,C2805 but if stuff P28003B0 should be unstuff.

A00 1228

A00 1228 un-stuff U2805 G709T1UF related circuit and R2812 then stuff R2805

A00 1228 Cancel VGA Thermal sensor P2800 circuit

21

D2802

CH551H-30PT-GP

2ND = 83.R5003.H8H3rd = 83.5R003.08F

83.R5003.C8F

D2802

CH551H-30PT-GP

2ND = 83.R5003.H8H3rd = 83.5R003.08F

83.R5003.C8F

12

R2808NTC-100K-8-GP

DY

R2808NTC-100K-8-GP

DY

1 2

R2802 0R2J-2-GP

DY

R2802 0R2J-2-GP

DY

12

C2810

SC22

00P5

0V2K

X-2G

P

DY

C2810

SC22

00P5

0V2K

X-2G

P

DY

12


12

R2804226KR2F-GP

P2800A1R2804226KR2F-GP

P2800A1

12

C2802

SCD

1U10

V2KX

-5G

P

C2802

SCD

1U10

V2KX

-5G

P

12

C2809

SC4D

7U6D

3V3K

X-G

P

C2809

SC4D

7U6D

3V3K

X-G

P

1 2R2807 0R0402-PADR2807 0R0402-PAD

G

S

D

Q2802

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q2802

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

FON#1VIN2VO3VSET4

GND 8GND 7GND 6GND 5

U2802

G991P11U-GP

2nd = 74.02793.A313rd = 74.05606.A71

74.00991.031

U2802

G991P11U-GP

2nd = 74.02793.A313rd = 74.05606.A71

74.00991.031

VCC5DXP6DXN7OTZ8 GND 2

ADJ 1

TDL 3TDR 4

U2801

P2800EA1-GP

74.02800.A71

U2801

P2800EA1-GP

74.02800.A71

1

23

4

5

FAN1ACES-CON3-11-GP20.F0772.003

2nd = 20.F1841.003

FAN1ACES-CON3-11-GP20.F0772.003

2nd = 20.F1841.003

12

C2807SC2200P50V2KX-2GPC2807SC2200P50V2KX-2GP

12

R2803107KR2F-GP

P2800A1 R2803107KR2F-GP

P2800A1

12


1 2R2806

24K3R2F-1-GP

DYR2806

24K3R2F-1-GP

DY

1AFTP2801AFTP2801

12

R2809100KR2J-1-GPR2809100KR2J-1-GP

12

EC2801

SCD

1U16

V2KX

-3G

P

DYEC2801

SCD

1U16

V2KX

-3G

P

DY

12R2810

0R2J-2-GPDYR2810

0R2J-2-GPDY

12

C2805

SCD

1U10

V2KX

-5G

P

P2800A1C2805

SCD

1U10

V2KX

-5G

P

P2800A1

12

C2811

SCD

1U10

V2KX

-5G

PDYC2811

SCD

1U10

V2KX

-5G

PDY

12

C2804

SCD

1U10

V2KX

-5G

P

C2804

SCD

1U10

V2KX

-5G

P

SET1GND2OUT#3 HYST 4

VCC 5

U2805

G709T1UF-GP

74.00709.A7F

DY

U2805

G709T1UF-GP

74.00709.A7F

DY

3

1

2

Q2801PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

Q2801PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

12R2811

0R2J-2-GPDYR2811

0R2J-2-GPDY

12

C2803

SC4D

7U6D

3V3K

X-G

P

C2803

SC4D

7U6D

3V3K

X-G

P

1 2R2805

0R2J-2-GP

R2805

0R2J-2-GP

1AFTP2802AFTP2802

1 2R2812 0R2J-2-GP

DYR2812 0R2J-2-GP

DY

12

R2801

150R2F-1-GPDY

R2801

150R2F-1-GPDY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDA_CODEC_SDIN0

AUD_DVDDCORE

HDA_CODEC_BITCLK

HDA_CODEC_BITCLK

AUD_HP1_JACK_R

PUMP_CAPN

AUD_SENSE_A

PUMP_CAPP

AMP_MUTE#

KBC_BEEP_R

SB_SPKR_R

AUD_V_B

AUD_SENSE_B

AUD_VREG

AUD_SPK_L+AUD_SPK_L-

AUD_EXT_MIC_R

AUD_HP1_JACK_L

AUD_EXT_MIC_L

AUD_VREFOUT_B

PCH

_AZ_CO

DEC

_SDO

UT1

HDA_CODEC_SDOUT

AUD_VREFFLT

AMP_MUTE#

HDA_CODEC_SYNCHDA_CODEC_RST#

HDA_CODEC_SDOUT

AUD_CAP2

AUD_PC_BEEP

AUD

_SEN

SE_A

AUD

_SEN

SE_B

AUD

_PC

_BEE

P

AUD

_CAP

2AU

D_V

REF

FLT

AUD

_VR

EFO

UT_

B

AUD_VREFOUT_B

AUD_V_B

AUD

_VR

EG

AUD_PC_BEEP

AUD_SPK_R-AUD_SPK_R+

AUD_VREFOUT_B

AUD_DMIC_CLKAUD_DMIC_IN0

AUD_DMIC_IN0_RAUD_DMIC_CLK_R

AUD_DMIC_CLK_RAUD_DMIC_IN0_R3D3V_S0

+AVDD

+AVDD

5V_S0

3D3V_S0

5V_S0 +PVDD

+AVDD

+AVDD

+AVDD+PVDD

HDA_CODEC_SYNC21HDA_CODEC_RST#21

HDA_SDIN021HDA_CODEC_BITCLK21HDA_CODEC_SDOUT21

AUD_HP1_JD# 82

EXT_MIC_JD# 82

AUD_SPK_L+ 58AUD_SPK_L- 58

AMP_MUTE#27

HDA_SPKR 21

KBC_BEEP 27

AUD_HP1_JACK_L2 82AUD_HP1_JACK_R2 82

MIC_IN_L 82MIC_IN_R 82

AUD_SPK_R- 58AUD_SPK_R+ 58

MIC_IN_L82

MIC_IN_R82

AUD_DMIC_CLK49AUD_DMIC_IN049

Title


Date: Sheet of


QUEEN 15 A00

Audio Codec 92HD87B1A3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Close to codec

Close to Pin14

From SB

From EC

SSID = AUDIO

Close to Pin13

Close to codec

AUD_PC_BEEPTrace width>15 mils

Close to codec

2010/06/30 Change to 92HD87 (71.92H87.A03)

Put C2921 and C2922 close to codec

CLOSE TO CODEC

0707 Modify:Change R2911,R2914,R2917 change to 0ohm 0603 from short pad.0726 Modify:Removed all of AUD_AGND and R2911,R2914,R2917.

0707 Modify:updated U2901 part number from data base.

0719 Modify:Move RN2901 to closed AUDIO CODEC from speaker connector.

For EMI

1122 X02 Modify:change R2920,R2921 to 22ohm from 0ohm andstuff EC2901,EC2902 22p from EMC Neo updated.


A00

1 2R2906 60D4R2F-GPR2906 60D4R2F-GP

12

C29

02SC

D1U

10V2

KX-5

GP

C29

02SC

D1U

10V2

KX-5

GP

12

C29

10SC

10U

6D3V

5MX-

3GP

C29

10SC

10U

6D3V

5MX-

3GP

12

C29

09SC

1U10

V2KX

-1G

PC

2909

SC1U

10V2

KX-1

GP

12

G2901DUMMY-C2G2901DUMMY-C2

1 2R2910 470KR2J-2-GPR2910 470KR2J-2-GP

1 2R29040R0603-PADR29040R0603-PAD1

2

C29

08SC

D1U

10V2

KX-5

GP

C29

08SC

D1U

10V2

KX-5

GP

12

R291820KR2F-L-GPR291820KR2F-L-GP

12


12C2912 SCD1U10V2KX-5GPC2912 SCD1U10V2KX-5GP

12

C2923SC1U10V2KX-1GP

C2923SC1U10V2KX-1GP

12

C2914SC2D2U10V3KX-1GPC2914SC2D2U10V3KX-1GP

12

C29

05SC

D1U

10V2

KX-5

GP

C29

05SC

D1U

10V2

KX-5

GP

12

C2901SC10U6D3V5MX-3GPC2901SC10U6D3V5MX-3GP

12C2922 SC1U10V3KX-3GPC2922 SC1U10V3KX-3GP

123 4

RN2901SRN4K7J-8-GP

RN2901SRN4K7J-8-GP

12 C

2903

SC1U

6D3V

2KX-

GP

C29

03SC

1U6D

3V2K

X-G

P

12

C29

18SC

10U

6D3V

5MX-

3GP

C29

18SC

10U

6D3V

5MX-

3GP

12C2913 SCD1U10V2KX-5GPC2913 SCD1U10V2KX-5GP

12

EC2901

SC22P50V2JN-4GP

EC2901

SC22P50V2JN-4GP

12

C29

04SC

D1U

10V2

KX-5

GP

C29

04SC

D1U

10V2

KX-5

GP

1 2R2913

20KR2F-L-GP

R2913

20KR2F-L-GP

1 2R29030R0603-PADR29030R0603-PAD

12R2919

39K2R2F-L-GP

R2919

39K2R2F-L-GP

12


12


12

C2907SC4D7P50V2CN-1GPDY C2907SC4D7P50V2CN-1GPDY

12

C2919SC1000P50V3JN-GP-UC2919SC1000P50V3JN-GP-U

12

C2920SCD1U10V2KX-5GPDY C2920SCD1U10V2KX-5GPDY

DVDD_LV1DMIC_CLK/GPIO_12DMIC_0/GPIO_23SDATA_OUT4BITCLK5SDATA_IN6DVDD7SYNC8RESET#9PCBEEP10

SE

NS

E_A

11S

EN

SE

_B12

PO

RTF

_L13

PO

RTF

_R14

PO

RTC

_L15

PO

RTC

_R16

VR

EFF

ILT

17C

AP

218

VR

EFO

UT_

A19

VR

EFO

UT_

C20

AVDD1 21PORTA_L 22PORTA_R 23AVSS2 24PORTB_L 25PORTB_R 26AVSS2 27V- 28CAP- 29CAP+ 30

VR

EG

/+2_

5V31

AV

DD

232

PV

DD

33P

OR

TD_+

L34

PO

RTD

_-L

35P

VS

S36

PO

RTD

_-R

37P

OR

TD_+

R38

PV

DD

39E

AP

D40

THE

RM

AL_

PA

D41U2901

92HD87B1A5NDGXTBX8-GP

71.92H87.A03

U2901

92HD87B1A5NDGXTBX8-GP

71.92H87.A031 2R2905 60D4R2F-GPR2905 60D4R2F-GP1 2

33R2J-2-GPR2901

33R2J-2-GPR2901

12

C29

17SC

4D7U

6D3V

3KX-

GP

C29

17SC

4D7U

6D3V

3KX-

GP1

2 34

RN2902

SRN22J-7-GP

RN2902

SRN22J-7-GP

1 2R2909

120KR2J-L-GPR2909

120KR2J-L-GP

12

R290810KR2J-3-GPR290810KR2J-3-GP

12

C29

06SC

1U10

V2KX

-1G

PC

2906

SC1U

10V2

KX-1

GP

1 2R29020R0603-PADR29020R0603-PAD

12

EC2902

SC22P50V2JN-4GP

EC2902

SC22P50V2JN-4GP

12

C29

15SC

10U

6D3V

5MX-

3GP

C29

15SC

10U

6D3V

5MX-

3GP

12C2921 SC1U10V3KX-3GPC2921 SC1U10V3KX-3GP

12

C29

16SC

1U6D

3V2K

X-G

PC

2916

SC1U

6D3V

2KX-

GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB_PN5_R

RREF

USB_PP5_R

V18

XD_CD#SP1SP2SP3SP4SP5

SP6SP7SP8SP9

SP10

SP11SP12SP13SP14XD_D7

USB_PP5_R

USB_PN5_R

3D3V_CARD_S0

3D3V_S0

3D3V_CARD_S0

CLK_PCH_48M20

XD_CD# 74SP1 74SP2 74SP3 74SP4 74SP5 74

SP6 74SP7 74SP8 74SP9 74

SP10 74

SP11 74SP12 74SP13 74SP14 74XD_D7 74

USB_PN518

USB_PP518

Title


Date: Sheet of


QUEEN 15 A00

Card Reader-RTS5138A3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

SSID = SDIO

Close to chip

3D3V_CARD_S0

PCH GPIO67(48M) confirm with SW

The maximum range of the PMOS output current1. xD-Picture Card: 250mA2. SD/MMC Card: 250mA3. MS/MSPRO/Duo-HG: 250mA

MAX 0.4A

The pin2 / pin3 (DM/DP) of RTS5138 chip trace layout with differential characteristic impedance (Zdiff) is 90£[¡Ó10%

48MHz clock input trace of characteristic impedance (Zo) must be 50¡Ó15%.

POWER TRACE1.RTS5138: pin 4 (3V3_IN) trace fixed width is 30 mils (minimum).2.RTS5138: pin 5 (CARD_3V3) trace fixed width is 30 mils (minimum).3.RTS5138: pin 6 (V18) trace fixed width is 12 mils (minimum).Keep the trace routing lengths as short as possible.4.RTS5138: pin 1(RREF) trace fixed width is 12 mils (minimum).5.RTS5138: pin 1(RREF) trace must far away 48MHz clock trace.6.De-coupling and Bulk capacitor should place near to RT5138 chip and Combo Socket.7.It is recommended that use of ferrites bead on power trace.8.Via size: Pad>=32 mils, Finished hole>=16 mils.

0917 X01 Modify:stuff TR3201 and un-stuff R3211,R3210at X01 stage from EMC Neo suggestion.

A00 1229

1 2R3210

0R0402-PAD-2-GP

R3210

0R0402-PAD-2-GP

1 2R32016K2R2F-GP

R32016K2R2F-GP

12


1 2

R3211

0R0402-PAD-2-GP

R3211

0R0402-PAD-2-GP

12

C3207SC4D7U6D3V3KX-GPC3207SC4D7U6D3V3KX-GP

CLK

_IN

24

RREF1DM2DP33V3_IN4CARD_3V35V186

XD

_CD

#7

SP

18

SP

29

SP

310

SP

411

SP

512

SP6 13SP7 14SP8 15SP9 16GPIO0 17SP10 18SP

1119

SP

1220

SP

1321

SP

1422

XD

_D7

23

GND25

U3201RTS5138-GR-GP

71.05138.003

U3201RTS5138-GR-GP

71.05138.003

1 2C3201

SC100P50V2JN-3GPDY

C3201

SC100P50V2JN-3GPDY

12


DYC3204SC4D7U6D3V3KX-GP

DY

12

C3202SC1U10V2KX-1GPC3202SC1U10V2KX-1GP1

2



A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PS_S3CNTRL

5V_RUN_ENABLE

3.3V_RUN_ENABLE

1.5V_RUN_ENABLE

H_PWRGD_R

SYS_PWROK

PS_S3CNTRL

15V_S5

5V_S5 5V_S0

3D3V_S5 3D3V_S0

3D3V_AUX_S5

1D5V_S3 1D5V_S0

RUN_ENABLE

1D05V_VTT

3D3V_S0

S0_PWR_GOOD19,27

SYS_PWROK 19

PS_S3CNTRL 37

S5_ENABLE 27

PURE_HW_SHUTDOWN# 27,28,86

H_THERMTRIP# 5,22

H_CPUPWRGD5,22

3V_5V_EN41

PM_SLP_S3#19,27,37,47,75

IMVP_PWRGD27,42

Title


Date: Sheet of


QUEEN 15 A00Power Plane Enable

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Power Sequence

+3.3V_RUN ComsumptionPeak current 8.14A

+5V_RUN ComsumptionPeak current 7.73A

5V_S0

3D3V_S0

ROSA Run Power

SSID = Reset.Suspend

G

GD

D

S

S

AO4468 MAX 9ARds(on) = 18.5mOhm

AO4468 MAX 11.6ARds(on) = 18.5mOhm

1.5V_RUN for VGA ComsumptionPeak current 7.39A

+1.5V_RUN_CPU ComsumptionPeak current 3A

+1.5V_RUN for Mini-Card ComsumptionPeak current 1A

Total= 11.39A

1D5V_S0

MAX Current ? mADesign Current ? mA

TPCA8062-H-GP MAX 28ARds(on) = 4.1~5.4m OHM

0615 Modify:Removed R3626,R3628 0ohm 0805 Resistor,they are unnecessary for this power rail.Removed R3627,R3629 0ohm 0805 Resistor for 1D5V_DDR_S0.

0621 Modify:Change R3603 to 1K from 2K 0402.

0628 Modify:Utilize D3602 Diode instead of U3603 AND GATE for SYS_PWROK sequnece control.

0628 Modify:Removed R3609,R3610,R3613,C3613 and Stuff R3614.

0713 Modify:Change U3606 part number to 84.08062.037 from 84.04468.037.0827 Add 2nd and 3rd.

0719 Modify:Reserved EC3601 0.1uF near C3604 for EMC NEO suggestion.

0723 Modify:Default stuff R3622 PH Resistor to fix Annie demo board abnormal issue from Annie teamupdated.A00

A00 1228 stuff Q3603

12



12


DYC3612SCD01U50V2KX-1GP

DY

1 2R36011KR2J-1-GPDY

R36011KR2J-1-GPDY

1 2 3456

Q36022N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q36022N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

1 2R363010KR2J-3-GP

R363010KR2J-3-GP

1 2R3614

0R0402-PAD-2-GP

R3614

0R0402-PAD-2-GP

C

B

E

Q3601CHT2222APT-GP

DYQ3601CHT2222APT-GP

DY

1 2R360710KR2J-3-GP

R360710KR2J-3-GP

1 2R360510KR2J-3-GP

R360510KR2J-3-GP

12

C3604SC10U6D3V5KX-1GPC3604SC10U6D3V5KX-1GP

12

C3603SC10U10V5ZY-1GPC3603SC10U10V5ZY-1GP

G

S

D

Q3603

2N7002K-2-GP2nd = 84.2N702.03184.2N702.J31

Q3603

2N7002K-2-GP2nd = 84.2N702.03184.2N702.J31

12

EC36

01SC

D1U

50V3

KX-G

PDY

EC36

01SC

D1U

50V3

KX-G

PDY

12345

678 S

SSGD

DDD

U3601

AO4468-GP84.04468.037

2nd = 84.08882.037

SSSGD

DDD

U3601

AO4468-GP84.04468.037

2nd = 84.08882.037

1

2

3

D3602BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

D3602BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

12

C3602

SCD

1U10

V2KX

-5G

PDYC3602

SCD

1U10

V2KX

-5G

PDY

1

2

3

D3601

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

D3601

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

12R3622

56R2J-4-GP

R3622

56R2J-4-GP

12


12


12


12345

678 S

SSGD

DDD

U3602

AO4468-GP84.04468.037

2nd = 84.08882.037

SSSGD

DDD

U3602

AO4468-GP84.04468.037

2nd = 84.08882.037

12

R36

0220

0KR

2J-L

1-G

P

DY R36

0220

0KR

2J-L

1-G

P

DY1 2

R3603 1KR2J-1-GPR3603 1KR2J-1-GP

1 2R3606100KR2J-1-GP

R3606100KR2J-1-GP

12

R3604100KR2J-1-GPR3604100KR2J-1-GP

12345

678 S

SSGD

DDD

U3606

TPCA8062-H-GP

84.08062.037

2nd = 84.00460.0373rd = 84.00312.037

SSSGD

DDD

U3606

TPCA8062-H-GP

84.08062.037

2nd = 84.00460.0373rd = 84.00312.037

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PS_S3CNTRL

Q37

02_D

Q37

01_D

SM_DRAMRST#_D

DRAMRST_CNTRL_PCH

+V_SM_VREF

0D75V_ENVDDPWRGOOD_R

VDDPWRGOOD_R

0D75V_EN

1D5V_S00D75V_S0

1D5V_S3

1D5V_S03D3V_S0

3D3V_S0

M_VREF_DQ_DIMM0

RUN_ENABLE PS_S3CNTRL36

0D75V_EN 46PM_SLP_S3#19,27,36,47,75

DDR3_DRAMRST# 14,15

DRAMRST_CNTRL_PCH 20

SM_DRAMRST#5

+V_SM_VREF_CNT 9

PM_DRAM_PWRGD5,19

VDDPWRGOOD 5

PM_DRAM_PWRGD5,19

1.05VTT_PWRGD 45,48PS_S3CNTRL36

Title


Date: Sheet of


QUEEN 15 A00ADAPTER

A3


DN15ATI

Title


Date: Sheet of


QUEEN 15 A00ADAPTER

A3


DN15ATI

Title


Date: Sheet of


QUEEN 15 A00ADAPTER

A3


DN15ATI

2

5 S3 Power Reduction X01 20091111

S3 Power Reduction CircuitSM_DRAMRST#

Close to CPUS3 Power Reduction Circuit Processor VREF_DQ Implementation

Close to CPUS3 Power Reduction Circuit SM_DRAMPWROK

SM_DRAMPWROK must have a maximum of 15ns rise or fall timeover VDDQ * 0.55¡Ó 200mV and the edge must be monotonic

CEKLT V1.0: PCH to 1K,CUP to 200R

Close to CPUS3 Power Reduction Circuit SM_DRAMPWROK

Close to DIMMS3 Power Reduction Circuit SM_DRAMPWROK

0629 Modify0629 Modify

0706 Modify:Removed Q3707,R3717 and connect RUN_ENABLE to Q3708.G directly same as EV board.

0709 Modify:Change U3701 pin1,5 to 3D3V_S0 from 3D3V_S5.

0709 Modify:U3701 change to OD type 73.01G09.AAH.0723 Modify:Change U3701 to push pull type 73.01G08.L04.R3720 change to 910ohm 0402.R3719 change to 750ohm 0402.default un-stuff R3702.

PUSH PULL

0730

0920

0827

0908 X01 Modify:Stuff Q3704,R3710; un-stuff R3716.U3701 pin2 change to 1.05VTT_PWRGD from RUNPWROK.

X02 1111

1110 X02 Modify:Change U3701 1st to 73.7SZ08.EAH;2nd to 73.01G08.L04;3rd to 73.7SZ08.DAH from Sourcer Eason updated.

A00

12

R37100R0402-PAD-2-GPR37100R0402-PAD-2-GP

12

R370322R2J-2-GPR370322R2J-2-GP

12

R3713200R2F-L-GP

R3713200R2F-L-GP

1 2

R3719

910R2F-GP

R3719

910R2F-GP

G

S

D

Q3708

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q3708

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

12

R3705100KR2J-1-GPR3705100KR2J-1-GP

12

R37061KR2J-1-GPR37061KR2J-1-GP

G S

D

Q37022N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DYQ37022N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DY

1 2

R37070R2J-2-GP

DY

R37070R2J-2-GP

DY

1 2R37181KR2J-1-GP

R37181KR2J-1-GP

G S

D

Q37012N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q37012N7002K-2-GP84.2N702.J312ND = 84.2N702.031

12

R3702200R2F-L-GPDYR3702

200R2F-L-GPDY

1 2R3717

0R2J-2-GPDYR3717

0R2J-2-GPDY

G

S

D

Q37032N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

Q37032N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

12


12


12

R3704220R2J-L2-GPDYR3704220R2J-L2-GPDY

1 2R3708 0R0402-PADR3708 0R0402-PAD

1

2

34

5

U3701

TC7SZ08FU-2-GP

73.7SZ08.EAH

3rd = 73.7SZ08.DAH2nd = 73.01G08.L04

U3701

TC7SZ08FU-2-GP

73.7SZ08.EAH

3rd = 73.7SZ08.DAH2nd = 73.01G08.L04

1 2R37090R2J-2-GPDY R37090R2J-2-GPDY

12

R3720750R2F-GPR3720750R2F-GP

1 2R3716 22R2J-2-GP

DYR3716 22R2J-2-GP

DY

12C3703

SCD047U16V2KX-1-GP

C3703

SCD047U16V2KX-1-GP

G

S

D

Q3704

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031Q3704

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

DCINA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

DCINA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

DCINA3


<Core Design>

SSID = PWR.Support

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PBAT_SMBDAT1PBAT_SMBCLK1

PBAT_PRES1#

BAT_ALERT

BT+

PBAT_PRES1#

PBAT_SMBCLK1PBAT_SMBDAT1

BAT_SCL

BAT_SDA

BAT_IN#

BT+

3D3V_AUX_KBC

DCBATOUT

BATT_SENSE40

BAT_SDA27,40BAT_SCL27,40

BAT_IN#27

Title


Date: Sheet of


QUEEN 15 A00

BATT CONNA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

BATT CONNA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

BATT CONNA3


<Core Design>

For actual location, need to be swap all pin

Batt Connecter

Close to Batt Connector

0701 Modify:Removed D3904 ESD Diode on BAT_IN#.

0714 Modify:Merge R3902~R3904 to PRN3901 33ohm.

0930 X01 Modify:Change D3901~D3903 main source to 83.00099.T11for 83.BAV99.D11 shortage issue.


A00 1224

1AFTP3902AFTP3902

1 2

3

D3902BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

D3902BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

1234 5

678

PN3901

SRN33J-7-GP

PN3901

SRN33J-7-GP

1 2

3

D3901BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

D3901BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

12

C3902SCD1U50V3KX-GP

C3902SCD1U50V3KX-GP

1

23456789

10

11

BATT1

ALP-CON9-2-GP-U

20.81316.0092nd = 20.81440.009

3rd = 20.81328.009

BATT1

ALP-CON9-2-GP-U

20.81316.0092nd = 20.81440.009

3rd = 20.81328.009

1AFTP3901AFTP3901

KA

PD39

021S

MA1

8AT3

G-G

P

DY

PD39

021S

MA1

8AT3

G-G

P

DY

1 2

3

D3903BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

D3903BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

1AFTP3904AFTP3904

12

C3901SC2200P50V2KX-2GPC3901SC2200P50V2KX-2GP

12G3901

GAP-CLOSE-PWR-3-GP

G3901

GAP-CLOSE-PWR-3-GP

12

EC3902

SC10

P50V

2JN

-4G

P

DY

EC3902

SC10

P50V

2JN

-4G

P

DY

1AFTP3903AFTP3903

1AFTP3905AFTP3905

12

EC3901

SC10

P50V

2JN

-4G

P

DY

EC3901

SC10

P50V

2JN

-4G

P

DY

12

EC3903

SCD

1U50V3KX-G

PEC

3903SC

D1U

50V3KX-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AD+_G

_1

PWR_CHG_FBO

PWR_CHG_DCIN

PWR_CHG_EAO

PWR_CHG_SDA

PWR_DCBATOUT_CHG

PWR_CHG_ACOK

PWR_CHG_LX1

AC_OKPWR_CHG_SCL

DC

_IN_D

PWR_CHG_CSON

PWR_CHG_CSOP_1

PWR_CHG_ACOK

PWR_CHG_ICOUT

PWR_CHG_REF

PWR_CHG_VICM

PWR_CHG_PHASE

AD+_G_2

PWR

_CH

G_F

BO1

PR45

33_0

2PWR_CHG_VFB

ICR

EF

PWR_CHG_VDDP

PWR_CHG_LGATE

PWR_CHG_BST1

PWR_CHG_UGATE

PWR_CHG_CE

PWR_CHG_CSSN

PWR_CHG_CSOP

PWR_CHG_CSSP

PR4524_03

PR4526_01

PWR_CHG_EAI

PWR_CHG_ACIN

PG4009_1

PWR_CHG_BOOT

AC_OK

DC_IN_D PWR_CHG_ACOK

AC_OK

PQ4003_G

PQ4003_D

ICREF

PQ4004_D

PQ4004_G

BT+

CHG_AGND

CHG_AGND

CHG_AGND

BT+_R

CHG_AGND

CHG_AGND

CHG_AGND

3D3V_AUX_KBC

CHG_AGND

AD+_TO_SYS

PWR_DCBATOUT_CHG

DCBATOUT

AD+

CHG_AGND

CHG_AGND

BT+

CHG_AGND

AD+

CHG_AGND

AD+

CHG_AGND

PWR_CHG_REF

BT+

AD+ BT+

CHG_AGND

PWR_CHG_REF

CHG_AGND

CHG_AGND AC_IN#27

AD_IA27

BAT_SDA27,39

BAT_SCL27,39

BATT_SENSE 39

AC_OK 27

AD_IA_HW27

H_PROCHOT#5,27,42

AD_IA_HW227

Title


Date: Sheet of


QUEEN 15 A00CHARGER BQ24745

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

SSID = Charger

AC_IN# to KBC

PU4004Id=12AQg=3.8nCRdson=24~30mohm

Charger Current=1.4~3.6A

84.00412.037Id=12AQg=3.8nCRdson=24~30mohm

This Resistormust be 1%tolerance.

Id=-12AQg=-25nCRdson=10~38mohm

68.5R610.10XId=5.5ADCR=39~42mohmSize=6.6X7.3X3

0603 Modify:Add PC4034 to 78.10622.52L.

0603 Modify:change PL4001 to 68.5R610.10X.

Id=-12AQg=-25nCRdson=10~38mohm

0625 Modify:Reserved EC4003,EC4004 on DC_IN_D&PWR_CHG_ACOK for EMC NEO suggestion.0719 Modify:Reserved EC4005 0.1uF near PR4004 for EMC NEO suggestion.Reserved EC4008 0.1uF near PC4017 for EMC NEO suggestion.

0629 Modify

0701 Modify:Change PQ4002 to single 2N7002.

0702 Modify:Change PR4014 from 48.7K to 49.9K 0402 base on power team suggest.

0707 Modify:Change PR4012 change to 0ohm 0402 from short pad.

0707 Modify:Change PR4023 change to 0ohm 0402 from short pad.

EMI/ESD

0719 Modify:Reserved EC4006 0.1uF near PR4002for EMC NEO suggestion. 0719 Modify:

Reserved EC4007 0.1uF near PG4006for EMC NEO suggestion.

0720 Modify:Add AD_IA_HW related circuit from TOM suggestion.

0720 Modify:Change PR4001 to 20K from 0ohm base on power team Brian updated.

0721 Modify:Change PU4005 to 84.00412.037 from power team Brian updated.

0723 Modify:Removed PR4038 PH.

0818

0827

0916 X01 Modify:Reserved PQ4004,PR4036,PR4037 for AD_IA_HW2 function.

0917 X01 Modify:Change PR4027 to 0R0402short pad from 0ohm.

0917 X01 Modify:Change PR4008,PR4010 to 0R0402short pad from 0ohm.

A00 1222A00 1222

A00 1222

A00 1222

A00 1222

A00 1222

A00 1222

A00 1222

A00 1222

12

PC40

31SC

D1U

50V3

KX-G

P

DY

PC40

31SC

D1U

50V3

KX-G

P

DY

12

PC4013SC3300P50V3KX-1GPDYPC4013SC3300P50V3KX-1GPDY

12

PR40240R0402-PADPR40240R0402-PAD

1 2PR4019

D01R2512F-4-GP

PR4019

D01R2512F-4-GP

1 2PC4005

SCD1U50V3KX-GP

PC4005

SCD1U50V3KX-GP

12

PC4029SC1U

6D3V2KX-G

P

PC4029SC1U

6D3V2KX-G

P

12

PC40

09SC

D1U

50V3

KX-G

PPC

4009

SCD

1U50

V3KX

-GP

12 PR4011

10KR2F-2-GP

PR4011

10KR2F-2-GP

12

PC40

08SC

10U

25V6

KX-1

GP

PC40

08SC

10U

25V6

KX-1

GP

12

PC4001SCD1U10V2KX-5GPPC4001SCD1U10V2KX-5GP

12

PC4027

SCD

01U

50V2

KX-1

GP

DY

PC4027

SCD

01U

50V2

KX-1

GP

DY

1 2PR40180R0603-PADPR40180R0603-PAD

1 2

PC4003SCD47U50V5KX-1GP


12

PR40

09

316K

R3F

-2-G

P

PR40

09

316K

R3F

-2-G

P

CE7

VDDSMB11

DCIN22

PGND 19

SCL10

SDA9

ACIN2

NC#1414

VICM8

ACOK13

GND12

FBO6EAI5EAO4

CSSP 28

CSSN 27

VREF3

BOOT 25VDDP 21

UGATE 24

PHASE 23

LGATE 20

ICR

EF

1CSON 17

NC#16 16

VFB 15

ICOUT 26

CSOP 18

GN

D29

PU4001BQ24745RHDR-GP

PU4001BQ24745RHDR-GP

12 PR

4030

1K8R

6J-G

P

DY

PR40

301K

8R6J

-GP

DY

K A

PD4001

SD103AWS-1-GP83.1R504.A8F2nd = 83.1R504.B8F

PD4001

SD103AWS-1-GP83.1R504.A8F2nd = 83.1R504.B8F

12

PR40

1333

R3J

-2-G

P

DYPR40

1333

R3J

-2-G

P

DY

12

EC40

01SC

2200

P50V

2KX-

2GP

DY EC40

01SC

2200

P50V

2KX-

2GP

DY

12

PR40267K5R2F-1-GPPR40267K5R2F-1-GP

12

PC4026

SCD

1U50

V3KX

-GPDY

PC4026

SCD

1U50

V3KX

-GPDY

12

EC4005

SCD

1U50V3KX-G

P

DY

EC4005

SCD

1U50V3KX-G

P

DY

12

PG40

04

GAP

-CLO

SE-P

WR

-3-G

P

PG40

04

GAP

-CLO

SE-P

WR

-3-G

P

12

PC40

17SC

10U

25V6

KX-1

GP

PC40

17SC

10U

25V6

KX-1

GP12

PG4008 GAP-CLOSE-PWR-3-GPPG4008 GAP-CLOSE-PWR-3-GP

1234 5

678S

SSG D

DDD

PU4003

AO4407A-GP

84.04407.F372nd = 84.04835.H37

SSSG D

DDD

PU4003

AO4407A-GP

84.04407.F372nd = 84.04835.H37

12

PG40

06

GAP

-CLO

SE-P

WR

-3-G

P

PG40

06

GAP

-CLO

SE-P

WR

-3-G

P

12

PC40

20SC

D1U

50V3

KX-G

PPC

4020

SCD

1U50

V3KX

-GP

12

EC4004

SC4D

7P50

V2C

N-1

GPDY

EC4004

SC4D

7P50

V2C

N-1

GPDY

12PG4007 GAP-CLOSE-PWR-3-GPPG4007 GAP-CLOSE-PWR-3-GP

1 2PR40290R0402-PADPR40290R0402-PAD

1 2PC4012SCD1U50V3KX-GPPC4012SCD1U50V3KX-GP

12345

678 S

SSGD

DDD

PU4002

AO4407A-GP

2nd = 84.04835.H3784.04407.F37

SSSGD

DDD

PU4002

AO4407A-GP

2nd = 84.04835.H3784.04407.F37

12

PR40

214K

7R2J

-2-G

PPR

4021

4K7R

2J-2

-GP

12

PR40320R0402-PAD-2-GP

PR40320R0402-PAD-2-GP

12

PC40

23

SCD

1U50

V3KX

-GP

PC40

23

SCD

1U50

V3KX

-GP

12

PR4035

300KR2F-L-GP

PR4035

300KR2F-L-GP

G S

D

PQ40032N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

PQ40032N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

1 2PR40170R0603-PADPR40170R0603-PAD

12

PR40

0510

KR2F

-2-G

PPR

4005

10KR

2F-2

-GP

12

PR40080R0402-PADPR40080R0402-PAD

1 2PR4001

20KR2J-L2-GP

PR4001

20KR2J-L2-GP

12

PG40

05

GAP

-CLO

SE-P

WR

-3-G

P

PG40

05

GAP

-CLO

SE-P

WR

-3-G

P

12

EC4008

SCD

1U50V3KX-G

PEC

4008SC

D1U

50V3KX-GP

12

PC40

24SC

220P

50V2

JN-3

GP

PC40

24SC

220P

50V2

JN-3

GP

12

EC4007

SCD

1U50V3KX-G

PEC

4007SC

D1U

50V3KX-GP

12345 6 7 8

SSSGD D D D

PU40

04SI

S412

DN

-T1-

GE3

-GP

84.00412.0372nd = 84.08061.A37SSSG

D D D D

PU40

04SI

S412

DN

-T1-

GE3

-GP

84.00412.0372nd = 84.08061.A37


1 2PR4034

0R0402-PAD-2-GP

PR4034

0R0402-PAD-2-GP

1

2

3 4

5

6

PQ4001

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

PQ4001

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

12

PC40

19SC

D1U

50V3

KX-G

PPC

4019

SCD

1U50

V3KX

-GP

1 2PR4033

20R5F-1GP

PR4033

20R5F-1GP


12345 6 7 8

SSSGD D D D

PU40

05SI

S412

DN

-T1-

GE3

-GP

84.00412.0372nd = 84.08061.A37 SSSG

D D D D

PU40

05SI

S412

DN

-T1-

GE3

-GP

84.00412.0372nd = 84.08061.A37

12

PC40

06SC

1U6D

3V2K

X-G

P

DY PC40

06SC

1U6D

3V2K

X-G

P

DY

12

PR40

1449

K9R

2F-L

-GP

PR40

1449

K9R

2F-L

-GP

12

PR40

0310

0KR

2J-1

-GP

PR40

0310

0KR

2J-1

-GP

1 2PC4025

SC56P50V2JN-2GP

PC4025

SC56P50V2JN-2GP1 2PR4028

0R0402-PADPR40280R0402-PAD

1 2PC4014SC220P50V2JN-3GP

DYPC4014SC220P50V2JN-3GP

DY

12 PC

4010

SCD

01U

50V2

KX-1

GP

PC40

10SC

D01

U50

V2KX

-1G

P1

2PR

4025

8K45

R2F

-2-G

P

DY

PR40

25

8K45

R2F

-2-G

P

DY

12

PR40070R2J-2-GP

DYPR40070R2J-2-GP

DY

1 2

PR4022200KR2F-L-GPPR4022200KR2F-L-GP

12

PG40

10G

AP-C

LOSE

-PW

R-3

-GP

PG40

10G

AP-C

LOSE

-PW

R-3

-GP

12

PR403676K8R2F-GPPR403676K8R2F-GP

1 2

PC4021SC150P50V2JN-3GPPC4021SC150P50V2JN-3GP

G

S

D

Q4001

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q4001

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

12

PC4032

SCD

1U25

V2KX

-GPDY PC4032

SCD

1U25

V2KX

-GPDY

12


12

PC40

04SC

D1U

50V3

KX-G

PPC

4004

SCD

1U50

V3KX

-GP

1 2PR40230R0402-PADPR40230R0402-PAD

12

PC40

15SC

10U

25V6

KX-1

GP

PC40

15SC

10U

25V6

KX-1

GP

12

PR4047174KR2F-GPPR4047174KR2F-GP

1 2

PR4002

D01R2512F-4-GP

PR4002

D01R2512F-4-GP

1 2PR40200R0402-PADPR40200R0402-PAD

12

PC40

16SC

10U

25V6

KX-1

GP

PC40

16SC

10U

25V6

KX-1

GP

12

PC40

34SC

10U

25V6

KX-1

GP

PC40

34SC

10U

25V6

KX-1

GP

12

PG40

09G

AP-C

LOSE

-PW

R-3

-GP

PG40

09G

AP-C

LOSE

-PW

R-3

-GP

1 2

PL4001

IND-5D6UH-48-GP-U1

68.5R610.10X2nd = 68.5R610.10U

PL4001

IND-5D6UH-48-GP-U1

68.5R610.10X2nd = 68.5R610.10U

12

PC40

30SC

D1U

10V2

KX-5

GP

DY PC40

30SC

D1U

10V2

KX-5

GP

DY

1 2PR40270R0402-PADPR40270R0402-PAD

12

PC4033SCD1U10V2KX-5GP DYPC4033SCD1U10V2KX-5GP DY

1 2PR40120R0402-PADPR40120R0402-PAD

1 2PR4037

0R0402-PAD-2-GP

PR4037

0R0402-PAD-2-GP

12

PC4022SC2200P50V2KX-2GP


12

PC40

07SC

10U

25V6

KX-1

GP

PC40

07SC

10U

25V6

KX-1

GP

12

EC4006

SCD

1U50V3KX-G

PEC

4006SC

D1U

50V3KX-GP

12

PG40

01

GAP

-CLO

SE-P

WR

-3-G

P

PG40

01

GAP

-CLO

SE-P

WR

-3-G

P

12

PR40100R0402-PADPR40100R0402-PAD

12

EC4003

SC4D

7P50

V2C

N-1

GPDY

EC4003

SC4D

7P50

V2C

N-1

GPDY

12

EC4002

SCD

1U25

V2KX

-GP

EC4002

SCD

1U25

V2KX

-GP

12

PG4002

GAP-CLOSE-PWR-3-GP

PG4002

GAP-CLOSE-PWR-3-GP

12

PC40

18SC

10U

25V6

KX-1

GP

PC40

18SC

10U

25V6

KX-1

GP

12

PG4003GAP-CLOSE-PWR-3-GPPG4003GAP-CLOSE-PWR-3-GP

G S

DPQ40042N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

PQ40042N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

12PC4028

SCD01U50V2KX-1GP

DYPC4028

SCD01U50V2KX-1GP

DY

12

PR4006470KR2J-2-GP

PR4006470KR2J-2-GP

12

PR40

04

10KR

2J-3

-GP

PR40

04

10KR

2J-3

-GP

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

PWR_5V3D3V_SKIPSEL

PWR_3D3V_LGATE2_1

PWR_3D3V_FB2

PWR_5V3D3V_TONSEL

PWR

_5V3

D3V

_VR

EG3

PWR_3D3V_LGATE2

PWR_5V_FB1

PWR_5V_PHASE1

PWR_3D3V_ENTRIP2

3V_5V_POK

PWR_3D3V_BOOT2

PWR

_5V_

SNU

B

PWR_5V_UGATE1

PWR_5V_ENTRIP1

PWR_5V_LGATE1

PWR_3D3V_UGATE2

PWR_5V_VOUT1

PWR_3D3V_PHASE2

PWR_5V_BOOT1

PWR_3D3V_VOUT2

PWR_5V_FB1_R

PWR_5V3D3V_EN0

PWR_3D3V_ENTRIP2

PWR_3D3V_FB2_R

PWR_3D3V_BOOT1

PWR_5V3D3V_ENC

PWR

_3D

3V_S

NU

B

PWR_5V_VBST1_1

PWR_5V_ENTRIP1

PC4108_1

PD4101_3PD4103_3

PWR_3D3V_LGATE2

PU4101_5

PU4101_2

PWR_5V3D3V_EN0

5V_PWR 5V_S5

5V_PWR

5V_S515V_S5

PWR_5V3D3V_VREF

3D3V_AUX_S5

PWR_5V3D3V_VREF

3D3V_PWR

PWR_5V3D3V_VREF

PWR_3D3V_DCBATOUTDCBATOUT

3D3V_PWR

3D3V_AUX_S5

3D3V_AUX_S5

3D3V_S5

5V_AUX_S5

3D3V_S5

15V_PWR

PWR_5V_DCBATOUT

PWR_5V_DCBATOUTDCBATOUT

PWR_3D3V_DCBATOUTDCBATOUT

5V_S5

DCBATOUTDCBATOUT

3V_5V_EN 36

Title


Date: Sheet of


QUEEN 15 A005V/3D3V(TPS51123RGER)

A2


<Variant Name>

Title


Date: Sheet of



A2


<Variant Name>

Title


Date: Sheet of



A2


<Variant Name>

ROSA team

VREG3 or VREG5

Design Current = 8A 12.6A<OCP< 14.6A

Design Current = 9.2A 14.5A<OCP< 17A

Close to VFB Pin (pin5) Close to VFB Pin (pin2)

375kHz

500kHz

PWM only

CH2CH1VREF(2V)

OperatingMode

OOA Auto Skip Auto Skip

SKIPSEL

I/P cap: 10U 25V K1206 X5R/ 78.10622.52LInductor: 2.2UH FDVE0630-2R2M=P3 TOKO 21mohm Isat =8.7Arms 68.2R21B.10AO/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00LH/S: FDSS8884 SO-8/ 23mohm/[email protected]/ 84.08884.037L/S: FDS6690AS SO-8/ 12mohm/[email protected]/ 84.06690.E37

GNDVREG3 or VREG5TONSEL

GND

VREF

200kHz

300kHz

400kHz

250kHz

SSID = PWR.Plane.Regulator_5v3p3v

0603 Modify:Change PR4103 to 187K from 100K.

0604 Modify:Change PU4103 to 74.8223.A73.0714 Modify:Change PU4103 to TPS51123 from RT8223MGQW.0720 Modify:Change PR4105 to 2.2ohm from 0ohm from power team Brian updated.

0629 Modify


0701 Modify:PC4127 Default un-stuff.

0719 Modify:Reserved EC4101~EC4106 0.1uF near PTC4101,PC4119 for EMC NEO suggestion.

0719 Modify:Reserved EC417 0.1uF for EMC NEO suggestion.

0721 Modify:Change PU4104 to 84.04800.D37 from power team Brian updated.

0721 Modify:Change PR4106 to 0ohm 0603 from 2.2ohm from power team Brian updated.

0721 Modify:Add PG4127,PG4128 from power team Brian updated.

08040804

0804 Change MOS follow Brian.0901 PU4104 and PU 4105 horizontally mirror.

0810

0913 X01 Modify:Add 2nd source 84.08061.A37 on PU4102,PU4104 base on Brian updated 2nd soruce excel file.

84.07716.037Id=16AQg=7.3nCRdson=13.5~16.5mohm

84.00412.037Id=12AQg=3.8nCRdson=24~30mohm

Mag. 2.20uH 6.5*6.9*3DCR=18~20mohmIdc=8A, Isat=14A

0909 X01 Modify:Change PL4101,PL4102 to 68.2R210.20Bfrom 68.2R210.20Q base on Brian updated.Add 2nd source 68.2R21B.10J on PL4101,PL4102 base on updated 2nd excel file.

0914 X01 Modify:Un-stuff PU4101,PD4105,PR4124,PR4125,PR4101 at X01 stage.

Vz=5.1V

0629 Modify

A00 1224

A00 1224

1 2PG4108 GAP-CLOSE-PWRPG4108 GAP-CLOSE-PWR

12

PC4128SC18P50V2JN-1-GP

DYPC4128SC18P50V2JN-1-GP

DY

12

3

PD4101BAT54S-7F-GP83.00054.Y812nd = 83.0R203.081

PD4101BAT54S-7F-GP83.00054.Y812nd = 83.0R203.081

12

PC4122

SCD

22U10V2KX-1G

P

PC4122

SCD

22U10V2KX-1G

P

12

PR41140R2J-2-GP DY

PR41140R2J-2-GP DY

12

EC41

03SC

D1U

50V3

KX-G

PEC

4103

SCD

1U50

V3KX

-GP


12

PT4104

SE33

0U6D

3VM

-15-

GP

77.53371.04L2nd = 77.93371.011

PT4104

SE33

0U6D

3VM

-15-

GP

77.53371.04L2nd = 77.93371.011

12PC4115

SCD1U25V3KX-GP

PC4115

SCD1U25V3KX-GP


12

PC4116

SC10U

25V6KX-1GP

PC4116

SC10U

25V6KX-1GP

1

2

34

5

6

PU4101

2N7002KDW-GP

84.2N702.A3F

DY

PU4101

2N7002KDW-GP

84.2N702.A3F

DY


12

PR41082D2R5F-2-GP

DY PR41082D2R5F-2-GP

DY

1

2

3

PD4102BAT54-7-F-GP

DYPD4102BAT54-7-F-GP

DY



12



DY

12

PR41120R2J-2-GPDYPR41120R2J-2-GPDY

1 2PR4109 820KR2F-GPDYPR4109 820KR2F-GPDY

12

PC4113SCD

01U50V2KX-1G

P

PC4113SCD

01U50V2KX-1G

P

12

PR41

0414

7KR

2F-G

PPR

4104

147K

R2F

-GP

12

PC4112

SC10U

25V6KX-1GP

PC4112

SC10U

25V6KX-1GP

12PR4117

0R2J-2-GPDYPR4117

0R2J-2-GPDY

12

PC4110

SC10U

25V6KX-1GP

PC4110

SC10U

25V6KX-1GP

12 PR41230R2J-2-GPDY PR41230R2J-2-GPDY

12

PC4109SCD1U25V3KX-GP



12

PR412440K2R2F-GPDYPR412440K2R2F-GPDY

12

PC4107SC1U25V3KX-1-GPPC4107SC1U25V3KX-1-GP

12

PC4121SC330P50V3KX-GPDY

PC4121SC330P50V3KX-GPDY 1

2

PC4123SC560P50V-GPDY PC4123SC560P50V-GPDY


1 2PL4102

IND-2D2UH-46-GP-U68.2R210.20B2nd = 68.2R21B.10J

PL4102



12

PR4125750KR2F-GPDYPR4125750KR2F-GPDY

12



DY



12

EC4107

SCD

1U50

V3KX

-GP

EC4107

SCD

1U50

V3KX

-GP

VBST29

DRVH210

LL211

DRVL212

VO27

VFB25

EN013

TRIP26

VREF3

TONSEL4

VR

EG

38

VIN

16

VBST1 22

DRVH1 21

LL1 20

DRVL1 19

VO1 24

VFB1 2

PGOOD 23

TRIP1 1

GND 15

VR

EG

517

GND 25

ENC 18SKIPSEL14

PU4103

TPS51123RGER-GP

74.51123.073

PU4103

TPS51123RGER-GP

74.51123.0731

2

PC4125

SC4D

7U25

V5KX

-GP

PC4125

SC4D

7U25

V5KX

-GP

12

PC4111

SCD

1U50

V3KX

-GP

PC4111

SCD

1U50

V3KX

-GP

12

PT4102

SE33

0U6D

3VM

-15-

GP

77.53371.04L2nd = 77.93371.011

PT4102

SE33

0U6D

3VM

-15-

GP

77.53371.04L2nd = 77.93371.011

1 2

PG4125

GAP-CLOSE-PWR-3-GP

PG4125

GAP-CLOSE-PWR-3-GP

1 2PL4101

IND-2D2UH-46-GP-U

68.2R210.20B

2nd = 68.2R21B.10J

PL4101

IND-2D2UH-46-GP-U

68.2R210.20B

2nd = 68.2R21B.10J


12

PR41130R0402-PADPR41130R0402-PAD

1 2PR41210R0402-PADPR41210R0402-PAD

1 2PR41060R0603-PADPR41060R0603-PAD


12

PR411610KR2F-2-GP

PR411610KR2F-2-GP

12 PR41200R2J-2-GPDY PR41200R2J-2-GPDY

12

PC4103

SCD

1U25V3KX-G

PPC

4103SC

D1U

25V3KX-GP


12

PD4105MMPZ5231BPT-GP

DY

2nd = 83.PDZ51.AVF83.5R103.E3F

PD4105MMPZ5231BPT-GP

DY

2nd = 83.PDZ51.AVF83.5R103.E3F

12

PC4102

SCD

1U25V3KX-G

PPC

4102SC

D1U

25V3KX-GP

12

PR4110100KR2J-1-GPPR4110100KR2J-1-GP

1 2PR4105

2D2R3-1-U-GP

PR4105

2D2R3-1-U-GP

1 2

PG4101GAP-CLOSE-PWR-3-GP

PG4101GAP-CLOSE-PWR-3-GP




12



12345 6 7 8

SSSGD D D D

PU4104SIS412DN-T1-GE3-GP84.00412.0372nd = 84.08061.A37

SSSGD D D D

PU4104SIS412DN-T1-GE3-GP84.00412.0372nd = 84.08061.A37


12 PC

4119

SCD

1U10V2KX-4G

P

PC4119

SCD

1U10V2KX-4G

P

12



12

PC4101SC10U

25V6KX-1GP

DY

PC4101SC10U

25V6KX-1GP

DY


12

EC41

01SC

D1U

50V3

KX-G

PDY

EC41

01SC

D1U

50V3

KX-G

PDY


12

EC41

02SC

D1U

50V3

KX-G

PEC

4102

SCD

1U50

V3KX

-GP

1 2PG4104 GAP-CLOSE-PWRPG4104 GAP-CLOSE-PWR 1

2

PC4117

SCD

1U50V3KX-G

P

PC4117

SCD

1U50V3KX-G

P

12

3

PD4103BAT54S-7F-GP

83.00054.Y812nd = 83.0R203.081

PD4103BAT54S-7F-GP

83.00054.Y812nd = 83.0R203.081

12

PC4126

SC10

U6D

3V5K

X-1G

P

PC4126

SC10

U6D

3V5K

X-1G

P

12

PR41

03

187K

R2F

-GP

PR41

03

187K

R2F

-GP

12

PG4114GAP-C

LOSE-PW

R-3-G

PPG4114G

AP-CLO

SE-PWR

-3-GP

12

PR4101100KR2F-L1-GPDYPR4101100KR2F-L1-GPDY

12345 6 7 8

SSSGD D D D

PU4105

SI7716ADN-T1-GE3-GP

84.07716.0372nd = 84.08065.B37

SSSGD D D D

PU4105

SI7716ADN-T1-GE3-GP

84.07716.0372nd = 84.08065.B37

12

PR41072D2R5F-2-GP

DYPR4107

2D2R5F-2-GP

DY

12

PR41116K65R2F-GP

PR41116K65R2F-GP


12

PC4127

SC22U

6D3V5M

X-2GP

DYPC4127

SC22U

6D3V5M

X-2GP

DY


1 2PR41020R0402-PADPR41020R0402-PAD


12

PC4104

SC1KP50V2KX-1G

PPC

4104SC

1KP50V2KX-1GP

1 2 3 45678

S S S GDDDD PU4102

SIS412DN-T1-GE3-GP84.00412.0372nd = 84.08061.A37

S S S GDDDD PU4102

SIS412DN-T1-GE3-GP84.00412.0372nd = 84.08061.A37

12

PC4120

SCD

1U10V2KX-4G

P

PC4120

SCD

1U10V2KX-4G

P

12

PG4113

GAP-C

LOSE-PW

R-3-G

P

PG4113

GAP-C

LOSE-PW

R-3-G

P

1 2 3 45678

S S S GDDDD PU4106

SI7716ADN-T1-GE3-GP84.07716.0372nd = 84.08065.B37

S S S GDDDD PU4106

SI7716ADN-T1-GE3-GP84.07716.0372nd = 84.08065.B37

12

PC4114

SC10U

25V6KX-1GP

PC4114

SC10U

25V6KX-1GP

AK

PD4104BZT52C15S-GP

83.15R03.C3F2nd = 83.15R03.E3F

PD4104BZT52C15S-GP

83.15R03.C3F2nd = 83.15R03.E3F

1 2PR41180R0402-PADPR41180R0402-PAD

12


12

PC4124SC18P50V2JN-1-GPDYPC4124SC18P50V2JN-1-GPDY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

95831_VIN

VSUM-

ISEN

3IS

EN2

ISEN

1

IMVP_VR_ON

BOOT2

95831_NTC

UGATE2PHASE2

H_PROCHOT#_C

NTCG

LGATE2

PR42

20_1

ISEN2

ISEN1

ISEN3

95831_COMPG

PC4211_2

PC4221_1

95831_VWG

95831_SCLK

95831_PGOODG

PR42

28_1

ISEN3 PC4210_2

PC4213_1

95831_COMP

PR4218_2

PR4242_2

95831_VDD

9583

1_PR

OG

2

95831_PWM3LGATE1

95831_SDA

95831_PROG1

95831_FB

PHASE1UGATE1BOOT195831_VW

95831_FBG

9583

1_IS

UM

N

95831_VDDP

VSS_AXG_SENSE

95831_IMONG

95831_IMON

VSSSENSE

PR4216_1

PR4214_1

1D05V_VTT

3D3V_S0

3D3V_S0

1D05V_VTT

PWR_VCCCORE1_DCBATOUT

5V_S5

5V_S0

VCC_GFXCORE

ISEN343

ISEN243

ISEN143

H_CPU_SVIDDAT8

VR_SVID_ALERT#8

H_CPU_SVIDCLK8

IMVP_PWRGD27,36

H_PROCHOT#5,27,40

VCCSENSE8

VSSSENSE8

VCC_AXG_SENSE 9

VSS_AXG_SENSE 9

ISPG 44ISNG 44

BOOTG 44

PHASEG 44UGATEG 44

LGATEG 44

BOOT2 43UGATE2 43PHASE2 43

LGATE2 43

LGATE1 43

PHASE1 43UGATE1 43BOOT1 43

PWM3 43

VSUM+ 43

VSUM- 43

D85V_PWRGD48

Title


Date: Sheet of


QUEEN 15 A00ISL95831_CPU_CORE(1/3)

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Close to CPUNTC place near high side MOSFET of Phase1

Place near choke of Phase1

Place near high side MOSFET of Phase1

SSID = CPU.Regulator

0629 Modify

0629 Modify


0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0629 Modify

0707 Modify:Removed PR4233.

0707 Modify:Updated IMONG and IMON circuit from power team Brian.

0707 Modify:Stuff PR4247 NTC Resistor.

0707 Modify:Removed PR4240 GND to 95831_AGND.

0707 Modify:Change all of 9531_AGND to GND for vender suggest.

0719 Modify:Stuff PR4246 NTC resistor.

0719 Modify:Reserved EC4201~EC4203 0.1uF near PR4246(TOP) for EMC NEO suggestion.0721 Modify:Removed EC4201~EC4203.

0719 Modify:Reserved EC4204~EC4207 0.1uF near C1403(TOP),C1507,C1509,C1406,TP_LOCK_LED1 for EMC NEO suggestion.

0721 Modify:Change PR4217 to 1K from 698ohm from power team Brian updated.

0721 Modify:Change PR4213 to 3.16K from 2.32K from power team Brian updated.

0721 Modify:Change PC4227 to 33uF from 47uF from power team Brian updated.Change PC4225 to 0.033uF from 0.068uF from power team Brian updated.

0901

0921Change PU4201 VDD power source to 5V_S5 from5V_S0 to avoid abnormal MVP_PWRGD waveform.

0920 X01 Modify:Change PR4213 to 3.6K from 3.16K from Brian updated.

0920 X01 Modify:Change PR4236 to 3.01K from 3.32Kfrom Brian updated.

0921 X01 Modify:Add PR4216,PC4231 from vender suggestion.

0921 X01 Modify:Add PR4214,PC4230 from vender suggestion.

Only for Dual-core,Qual-core stuff 1K27R(64.12715.6DL)

Only for Dual-core,Qual-core stuff 3K6R(64.36015.6DL)

Only for Dual-core,Qual-core stuff 18K2R(64.18225.LDL)

Only for Dual-core,Qual-core stuff 22KR(64.22025.6DL)

A00 1227

A00 1227

A00 1227

A00 1230

12

PC42

26SC

1U10

V2KX

-1G

PPC

4226

SC1U

10V2

KX-1

GP

1 2PR4212

499R2F-2-GP

PR4212

499R2F-2-GP

1 2PR4217

845R2F-GP DC&QC

PR4217

845R2F-GP DC&QC

1 2PR4246

NTC-470K-9-GP

69.60013.1412nd = 69.60037.021

PR4246

NTC-470K-9-GP

69.60013.1412nd = 69.60037.021

12 PC4202

SC1000P50V3JN-GP-UPC4202SC1000P50V3JN-GP-U

12

PR42430R0402-PADPR42430R0402-PAD

2

1

PC42

01SC

D22

U25

V3KX

-GP

2

1

PC42

01SC

D22

U25

V3KX

-GP

1 2

PC4207

DUMMY-C2

PC4207

DUMMY-C2

1 2PR4210

475KR2F-GP

PR4210

475KR2F-GP

1 2PG4201

DUMMY-C2

PG4201

DUMMY-C2

12PG4202

DUMMY-C2

PG4202

DUMMY-C2

1 2PC4231

SC330P50V2KX-3GP

PC4231

SC330P50V2KX-3GP

1 2PC4221

SC680P50V2KX-2GP

PC4221

SC680P50V2KX-2GP

1 2PC4222

SC1000P50V3JN-GP-U

PC4222

SC1000P50V3JN-GP-U

12


1 2PC4230

SC560P50V-GP

PC4230

SC560P50V-GP

1 2PR4201

75R2F-2-GPDY

PR4201

75R2F-2-GPDY

1 2PR4224

1R2F-GP

PR4224

1R2F-GP

12

PR42

3454

D9R

2F-L

1-G

PPR

4234

54D

9R2F

-L1-

GP

1 2PC4211

SC150P50V2KX-GP

PC4211

SC150P50V2KX-GP

12

PR42422K61R2F-1-GPPR42422K61R2F-1-GP

1 2PC4209

SC39P50V2JN-1GP

PC4209

SC39P50V2JN-1GP

1 2PR42150R0402-PADPR42150R0402-PAD

1 2

PC4214

SCD1U10V2KX-4GP

PC4214

SCD1U10V2KX-4GP

1 2PR4247

NTC-470K-9-GP

69.60013.1412nd = 69.60037.021

PR4247

NTC-470K-9-GP

69.60013.1412nd = 69.60037.021

1 2PR4209

316KR2F-GP

PR4209

316KR2F-GP

1 2PR4239

16K5R2F-2-GP

PR4239

16K5R2F-2-GP

1 2PR4236

3K01R2F-3-GP

PR4236

3K01R2F-3-GP

12PC

4227

SCD

33U

6D3V

2KX-

1-G

P

PC42

27

SCD

33U

6D3V

2KX-

1-G

P

1 2PC4215

SCD22U10V2KX-1GP

PC4215

SCD22U10V2KX-1GP

1 2

PR4226

5K62R2F-GP

PR4226

5K62R2F-GP

12

PR42301K91R2F-1-GP

PR42301K91R2F-1-GP

12PR4219

3K83R2F-GP

PR4219

3K83R2F-GP

1 2PC4213

SC470P50V-2-GP

PC4213

SC470P50V-2-GP

12

PC42

28SC

1U10

V2KX

-1G

PPC

4228

SC1U

10V2

KX-1

GP

1 2PC4210

SC150P50V2KX-GP

PC4210

SC150P50V2KX-GP

12

EC42

09SC

D1U

50V3

KX-G

PDY

EC42

09SC

D1U

50V3

KX-G

PDY

12PR4220

27K4R2F-GP

PR4220

27K4R2F-GP

12

PR4237

DU

MM

Y-R

2

PR4237

DU

MM

Y-R

21

2

PC42

03SC

D01

U50

V2KX

-1G

PPC

4203

SCD

01U

50V2

KX-1

GP

12

PC4204SC47P50V2JN-3GPPC4204SC47P50V2JN-3GP


12

PC42

25SC

D03

3U16

V2KX

-GP

PC42

25SC

D03

3U16

V2KX

-GP

12PR4218

DUMMY-R2

PR4218

DUMMY-R2

12

PR42

4111

KR2F

-L-G

PPR

4241

11KR

2F-L

-GP

12

PR4245NTC-10K-27-GP

2nd = 69.60011.20169.60013.131

PR4245NTC-10K-27-GP

2nd = 69.60011.20169.60013.131

12

PR42

3213

0R2F

-1-G

PPR

4232

130R

2F-1

-GP

12

PR42220R0402-PADPR42220R0402-PAD

1 2PR4216

2KR2F-3-GP

PR4216

2KR2F-3-GP

12


VWG1IMONG2PGOODG3SDA4ALERT#5SCLK6VR_ON7PGOOD8IMON9VR_HOT#10NTC11VW12

CO

MP

13FB

14IS

EN

3/FB

215

ISE

N2

16IS

EN

117

VS

EN

18R

TN19

ISU

MN

20IS

UM

P21

VD

D22

VIN

23P

RO

G1

24

CO

MP

G48

FBG

47V

SE

NG

46R

TNG

45IS

PG

44IS

NG

43N

TCG

42P

RO

G2

41B

OO

TG40

UG

G39

PH

G38

LGG

37

BOOT2 36UG2 35PH2 34

VSSP2 33LG2 32

VDDP 31PWM3 30

LG1 29VSSP1 28

PH1 27UG1 26

BOOT1 25

GN

D49PU4201

ISL95831HRTZ-T-GP

PU4201

ISL95831HRTZ-T-GP

12

PC42

05SC

D04

7U25

V2KX

-GP

PC42

05SC

D04

7U25

V2KX

-GP

1 2

PR4206

DUMMY-R2

PR4206

DUMMY-R2

1 2PR4214

2KR2F-3-GP

PR4214

2KR2F-3-GP

1 2PR4228

27K4R2F-GP

PR4228

27K4R2F-GP

1 2PR42230R2J-2-GPDY PR42230R2J-2-GPDY

12


1 2PR4211

422R2F-2-GP

PR4211

422R2F-2-GP

12

PC4206SC1000P50V3JN-GP-UPC4206SC1000P50V3JN-GP-U

12

PR4205

8K06

R2F

-GP

PR4205

8K06

R2F

-GP 1 2

PC4216

SCD22U10V2KX-1GP

PC4216

SCD22U10V2KX-1GP

1 2PR42250R0402-PADPR42250R0402-PAD

12

PC42

24SC

330P

50V2

KX-3

GP

PC42

24SC

330P

50V2

KX-3

GP

12

PR42

4475

R2F

-2-G

PPR

4244

75R

2F-2

-GP

1 2PR42040R0402-PADPR42040R0402-PAD

1 2PC4220

SC330P50V2KX-3GPDY

PC4220

SC330P50V2KX-3GPDY

1 2PR4235 1K91R2F-1-GPPR4235 1K91R2F-1-GP

1 2PC4219

SC330P50V2KX-3GPDY

PC4219

SC330P50V2KX-3GPDY

12

PC42

29SC

1U10

V2KX

-1G

PPC

4229

SC1U

10V2

KX-1

GP

1 2

PR4213

2K37R2F-GPDC&QC

PR4213

2K37R2F-GPDC&QC

1 2PC4217

SCD22U10V2KX-1GP

PC4217

SCD22U10V2KX-1GP

12


1 2PR4229

3K83R2F-GP

PR4229

3K83R2F-GP

1 2PR42310R0402-PADPR42310R0402-PAD

1 2PR42030R0402-PADPR42030R0402-PAD

1 2PC4208

SC39P50V2JN-1GP

PC4208

SC39P50V2JN-1GP1

2

PR420722KR2F-GPDC&QCPR420722KR2F-GPDC&QC

1 2

PG4203

DUMMY-C2

PG4203

DUMMY-C2

1 2PC4223

SC1000P50V3JN-GP-U

PC4223

SC1000P50V3JN-GP-U

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VCCCORE_LG3

PW

R_V

CC

CO

RE

_VS

UM

-_3

PWR_VCCCORE_BOOT3_1

PWR_VCCCORE_HG3

PW

R_V

CC

CO

RE

_BO

OT3

PWR_VCCCORE_PH3

PWR_FCCM

PWR_VCCCORE_BOOT1_1

PW

R_V

CC

CO

RE

_VS

UM

+_1

PW

R_V

CC

CO

RE

_VS

UM

-_1

PW

R_V

CC

CO

RE

_VS

UM

+_2

UGATE2

LGATE2

PWR_VCCCORE_BOOT2_1

PHASE2

PW

R_V

CC

CO

RE

_VS

UM

-_2

PW

R_V

CC

CO

RE

_VS

UM

+_3

U4306_V

IN-

INA_A1

U4306_V

IN+

INA_A0

PW

R_V

CC

CO

RE

_VS

UM

+_3

PWR_VCCCORE3_DCBATOUT5V_S0


VCC_CORE

VCC_CORE

VCC_CORE


PWR_VCCCORE3_DCBATOUTDCBATOUT_IMVP7



DCBATOUT DCBATOUT_IMVP7

DCBATOUT_IMVP7

DCBATOUT_IMVP7

DCBATOUT

3D3V_VGA_S0

PWM342

VSUM- 42

ISEN1 42

ISEN2 42

ISEN3 42

VSUM+ 42

UGATE142PHASE142

LGATE142

BOOT142

ISEN2 42

ISEN3 42

ISEN1 42

VSUM+ 42

VSUM- 42

ISEN1 42

ISEN3 42

ISEN2 42

VSUM+ 42

VSUM- 42

BOOT242

UGATE242

PHASE242

LGATE242

SMBD_INA219 85,92

SMBC_INA219 85,92 Title


Date: Sheet of


QUEEN 15 A00

ISL95831_CPU_CORE ( 2 of 3 )Custom


DN15ATI

Title


Date: Sheet of


QUEEN 15 A00



DN15ATI

Title


Date: Sheet of


QUEEN 15 A00



DN15ATI

84.00460.037SIR460DPId=40A,Qg=16.8nC,Rdson=4.7~6.1mohm

68.R3610.20A0.36uH, Idc=20A,Isat=25ADCR=1.4 +/-7% mohm

80.3371V.A2L330uF, 2.5V, B2ESR=9m£[, Iripple=3.073A

Vcc_core Iomax=53AOCP>97.5A

84.00462.037SIR462DPId=30A, Qg=8.8nC,Rdson=7.9~10 mohm

FOR NVIDIA VENTURA

0705 Modify

0705 Modify

0705 Modify

0705 Modify 0705 Modify

0705 Modify

0705 Modify

0705 Modify

0719 Modify:Reserved PTC4307 47uF.0721 Modify:Removed PTC4307.

0719 Modify:Change PU4302 part number to 84.00172.037 from 84.07686.037 base on power team Brian suggestion.0726 Modify:Brian updatede PU4302 change to 84.00462.037.







0702 Modify:Change U4306 power source to 3D3V_VGA_S0 from 3D3V_S0.

0705 Modify:R4346 change to PR4320 4m ohm sense Resistor from 3m ohm.

0708 Modify:PR4320 change to BIG SIZE footprint for CPU VENTURA.

0705 Modify:Add PR4321,PR4322,PC4319.

0712 Modify:Change VENTURA solution part number to 74.00900.079 from 74.00219.079.

Would be instead of INA219 by HPA00900

0705 Modify:Removed R4347 sense Resistor base on VENTURA SPEC.

0728

0809

0809

0809

A00 1223 no co-lay

A00 1224

A00 1224

A00 1224

A00 1224

12

R43463K3R2J-3-GPDY

R43463K3R2J-3-GPDY

1 2PG4323

GAP-CLOSE-PWR

PG4323

GAP-CLOSE-PWR

12PR4313

3K65R2F-1-GP

PR4313

3K65R2F-1-GP

1 2PG4311

GAP-CLOSE-PWR

PG4311

GAP-CLOSE-PWR VIN

+1

VIN

-2

GN

D3

VS

4S

CL

5S

DA

6A

07

A1

8U4306

HPA00900AIDCNR-GP

VENTURA

74.00900.079

U4306

HPA00900AIDCNR-GP

VENTURA

74.00900.079

12

PT4303

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

PT4303

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

1 2PR4309

1R2F-GPDY

PR4309

1R2F-GPDY

12345 6 7 8

SSSD D D D

G

PU4304

SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4304

SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

1 2PG4321

GAP-CLOSE-PWR

PG4321

GAP-CLOSE-PWR

1 2PR4310

1R2F-GPDY

PR4310

1R2F-GPDY

1 2PR4302

2D2R3-1-U-GP

PR4302

2D2R3-1-U-GP

1 2PG4308

GAP-CLOSE-PWR

PG4308

GAP-CLOSE-PWR1 2PR4308

2D2R3-1-U-GP

PR4308

2D2R3-1-U-GP

12

PG4301

GA

P-C

LOS

E-P

WR

-3-G

P

PG4301

GA

P-C

LOS

E-P

WR

-3-G

P

1 2PG4313

GAP-CLOSE-PWR

PG4313

GAP-CLOSE-PWR

1 2PR4311

1R2F-GP

PR4311

1R2F-GP

12

PT4309

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

PT4309

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

12PR4319

3K65R2F-1-GP

PR4319

3K65R2F-1-GP

12

PC4316

SC

4D7U

25V

5KX

-GPQC

PC4316

SC

4D7U

25V

5KX

-GPQC

1 2PR4315

1R2F-GPDY

PR4315

1R2F-GPDY

12

PT4306SE47U25VM-11-GP

2nd = 79.47612.60L79.47612.3FL

PT4306SE47U25VM-11-GP

2nd = 79.47612.60L79.47612.3FL

1 2PG4310

GAP-CLOSE-PWR

PG4310

GAP-CLOSE-PWR

12

PG4317

GA

P-C

LOS

E-P

WR

-3-G

P

PG4317

GA

P-C

LOS

E-P

WR

-3-G

P

12

PG4303

GA

P-C

LOS

E-P

WR

-3-G

P

PG4303

GA

P-C

LOS

E-P

WR

-3-G

P

1 2PG4316

GAP-CLOSE-PWR

PG4316

GAP-CLOSE-PWR

12

PG4302

GA

P-C

LOS

E-P

WR

-3-G

P

PG4302

GA

P-C

LOS

E-P

WR

-3-G

P

1 2PG4315

GAP-CLOSE-PWR

PG4315

GAP-CLOSE-PWR

12PG4318

GA

P-C

LOS

E-P

WR

-3-G

P

PG4318

GA

P-C

LOS

E-P

WR

-3-G

P

1 2PR4314

2D2R3-1-U-GP

PR4314

2D2R3-1-U-GP

1 2PR4320

D004R3720F-GP

PR4320

D004R3720F-GP

1 2PL4302

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

PL4302

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

12



12PR4318

10KR2F-2-GP

PR4318

10KR2F-2-GP

12

C4301

SCD1U10V2KX-5GP

VENTURAC4301

SCD1U10V2KX-5GP

VENTURA

12

PC4317

SC

4D7U

25V

5KX

-GP

PC4317

SC

4D7U

25V

5KX

-GP

12

PG4304

GA

P-C

LOS

E-P

WR

-3-G

P

PG4304

GA

P-C

LOS

E-P

WR

-3-G

P

12

PT4301

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

PT4301

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

12



1 2PR4304

1R2F-GPDY

PR4304

1R2F-GPDY

12

PC4313

SC

4D7U

25V

5KX

-GP

PC4313

SC

4D7U

25V

5KX

-GP

1 2PG4314INS43029

GAP-CLOSE-PWR

PG4314INS43029

GAP-CLOSE-PWR

1 2PL4301

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

PL4301

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

12

PC4305

SC

4D7U

25V

5KX

-GP

PC4305

SC

4D7U

25V

5KX

-GP

12345 6 7 8

SSSD D D D

G

PU4306 SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

QC

SSSD D D D

G

PU4306 SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

QC

12

PR4306

10KR2F-2-GP

PR4306

10KR2F-2-GP

1 2PG4320

GAP-CLOSE-PWR

PG4320

GAP-CLOSE-PWR

12

PC4309

SC

4D7U

25V

5KX

-GP

PC4309

SC

4D7U

25V

5KX

-GP

12345 6 7 8

SSSD D D D

G

PU4309 SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

QC

SSSD D D D

G

PU4309 SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

QC

12

PC4301SC

1U10V

2KX

-1GP

PC4301SC

1U10V

2KX

-1GP

1 2PG4322

GAP-CLOSE-PWR

PG4322

GAP-CLOSE-PWR

12

R43473K3R2J-3-GP

DY

R43473K3R2J-3-GP

DY

12345 6 7 8

SSSGD D D D

PU4305SIR462DP-T1-GE3-GP

84.00462.0372nd = 84.08064.A37

SSSGD D D D


84.00462.0372nd = 84.08064.A371 2

PC4319

SCD1U25V2KX-GPVENTURA

PC4319


12PR4307

3K65R2F-1-GP

PR4307

3K65R2F-1-GP

12

PT4304

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

PT4304

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

1 2PR4317

1R2F-GP

PR4317

1R2F-GP

12

PC4311

SC

4D7U

25V

5KX

-GP

PC4311

SC

4D7U

25V

5KX

-GP

1 2PG4312

GAP-CLOSE-PWR

PG4312

GAP-CLOSE-PWR

12

PC4315

SC

4D7U

25V

5KX

-GP

PC4315

SC

4D7U

25V

5KX

-GP

12



1 2PR4305

1R2F-GP

PR4305

1R2F-GP

12345 6 7 8

SSSD D D D

G

PU4303 SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

QC

SSSD D D D

G

PU4303 SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

QC

12

PC4306SC4D7U25V5KX-GPPC4306SC4D7U25V5KX-GP

1 2PG4309

GAP-CLOSE-PWR

PG4309

GAP-CLOSE-PWR

12

PR43010R0402-PADPR43010R0402-PAD

12

PT4308

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

PT4308

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

12345 6 7 8

SSSD D D D

G

PU4307

SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4307

SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

1 2PG4307

GAP-CLOSE-PWR

PG4307

GAP-CLOSE-PWR

12

PC4303

SC

4D7U

25V

5KX

-GP

PC4303

SC

4D7U

25V

5KX

-GP

1 2PR4303

1R2F-GPDY

PR4303

1R2F-GPDY

12

PR432210R2F-L-GPVENTURA


12

PC4304

SC

4D7U

25V

5KX

-GP

PC4304

SC

4D7U

25V

5KX

-GP

1 2PG4305

GAP-CLOSE-PWR

PG4305

GAP-CLOSE-PWR

1 2PR4316

1R2F-GPDY

PR4316

1R2F-GPDY

12

R43453K3R2J-3-GPVENTURA


12345 6 7 8

SSSGD D D D

PU4308

SIR462DP-T1-GE3-GP

84.00462.0372nd = 84.08064.A37

SSSGD D D D

PU4308

SIR462DP-T1-GE3-GP

84.00462.0372nd = 84.08064.A37

12

PR4312

10KR2F-2-GP

PR4312

10KR2F-2-GP

12

PC4314

SC

4D7U

25V

5KX

-GP

PC4314

SC

4D7U

25V

5KX

-GP

12

PC4307

SC

4D7U

25V

5KX

-GP

QCPC4307

SC

4D7U

25V

5KX

-GP

QC

12345 6 7 8

SSSD D D D

G

PU4310

SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4310

SIR

460DP

-T1-GE

3-GP

84.00460.0372nd = 84.08059.037

12

R43443K3R2J-3-GP

VENTURA

R43443K3R2J-3-GP

VENTURA

12

PC4310

SC

4D7U

25V

5KX

-GP

PC4310

SC

4D7U

25V

5KX

-GP

1 2PG4324

GAP-CLOSE-PWR

PG4324

GAP-CLOSE-PWR

12345 6 7 8

SSSGD D D D

PU4302

SIR462DP-T1-GE3-GP

84.00462.0372nd = 84.08064.A37

SSSGD D D D

PU4302

SIR462DP-T1-GE3-GP

84.00462.0372nd = 84.08064.A37

1 2PL4303

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

PL4303

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

12



1 2PG4306

GAP-CLOSE-PWR

PG4306

GAP-CLOSE-PWR

1 2PG4319

GAP-CLOSE-PWR

PG4319

GAP-CLOSE-PWR

12

PC4308

SC

4D7U

25V

5KX

-GP

PC4308

SC

4D7U

25V

5KX

-GP

12

PT4302

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

PT4302

ST3

30U

2VD

M-4

-GP

79.33719.20L2nd = 77.C3371.13L

BO

OT

1

PWM2

GN

D3

LGATE 4V

CC

5

FCCM6

PHASE 7UGATE 8

GN

D9

PU4301

ISL6208CRZ-TGP-U

PU4301

ISL6208CRZ-TGP-U

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_GFXCORE_BOOT_1

PWR

_GFX

CO

RE_

ISP_

R

PWR

_GFX

CO

RE_

ISN

_R

PR4405_2

PR4403_2

PC4408_1

VCC_GFXCORE

PWR_GFXCORE_DCBATOUT

PWR_GFXCORE_DCBATOUT

DCBATOUT_IMVP7

VCC_CORE VCC_CORE PWR_VCCCORE1_DCBATOUT PWR_VCCCORE2_DCBATOUT PWR_VCCCORE3_DCBATOUT VCC_GFXCORE PWR_GFXCORE_DCBATOUT

PHASEG42UGATEG42

LGATEG42

BOOTG42

ISNG 42

ISPG 42

Title


Date: Sheet of



A3


DN15ATI

Title


Date: Sheet of



A3


DN15ATI

Title


Date: Sheet of



A3


DN15ATI

VCC_GFXCOREIomax=33AOCP>50A

84.03503.037BSZ035N03MSId=18A,Qg=27~35nC,Rdson=3.4~4.3mohm

68.R3610.20A0.36uH, Idc=20A, Isat=25ADCR=1.4 +/-7% mohm

80.3371V.A2L330uF, 2.5V, B2ESR=9m£[, Iripple=3.073A

0624 Modify:Removed PU4402 MOSFET.

0629 Modify

0629 Modify

0629 Modify

0705 Modify

EMI/ESD 0715 Modify:Add EC4401~EC4410 for EMC NEO suggestion.

0719 Modify:Change PU4401 part number to 84.00172.037 from 84.07686.037 base on power team Brian suggestion.0720 Modify:Change PU4401 part number to 84.00462.037 from 84.00172.037 base on power team Brian suggestionl.

84.00462.037SIR462DP-T1-GE3-GPId=30A, Qg=8.8nC,Rdson=7.9 mohm

0721 Modify:Removed PC4401

0721 Modify:Change PR4404 to 768ohm from 549ohm from power team Brian updated.

0809

0920 X01 Modify:Change PC4410 to 0.01u from 0.022uFfrom Brian updated.

A00 1224

12345 6 7 8

SSSGD D D D


84.00462.0372nd = 84.08064.A37

SSSGD D D D


84.00462.0372nd = 84.08064.A37

12

EC4405

SCD

1U50V3KX-G

PEC

4405SC

D1U

50V3KX-GP

12

PT4402

ST33

0U2V

DM

-4-G

P

79.33719.20L2nd = 77.C3371.13L

PT4402

ST33

0U2V

DM

-4-G

P

79.33719.20L2nd = 77.C3371.13L

12

PR4408

10KR2F-2-GP

PR4408

10KR2F-2-GP

1 2PR4402

549R2F-GP

DYPR4402

549R2F-GP

DY12



1 2PL4401

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

PL4401

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C1

2





12

PC4410

SCD

01U

16V2

KX-3

GP

PC4410

SCD

01U

16V2

KX-3

GP

12

PC4406

SC4D

7U25

V5KX

-GP

PC4406

SC4D

7U25

V5KX

-GP

12

PC4402

SC4D

7U25

V5KX

-GP

PC4402

SC4D

7U25

V5KX

-GP

12

EC4407

SCD

1U50V3KX-G

PEC

4407SC

D1U

50V3KX-GP


12

PR4406

11KR

2F-L

-GP

PR4406

11KR

2F-L

-GP

12

PC4403

SC4D

7U25

V5KX

-GP

PC4403

SC4D

7U25

V5KX

-GP

12

PC4404

SC4D

7U25

V5KX

-GP

PC4404

SC4D

7U25

V5KX

-GP

12

EC4408

SCD

1U50V3KX-G

P

DY

EC4408

SCD

1U50V3KX-G

P

DY

12

PG4402

GAP

-CLO

SE-P

WR

-3-G

P

PG4402

GAP

-CLO

SE-P

WR

-3-G

P


12

EC4409

SCD

1U50V3KX-G

P

DY

EC4409

SCD

1U50V3KX-G

P

DY

12

PT4403

ST33

0U2V

DM

-4-G

P

79.33719.20L2nd = 77.C3371.13L

PT4403

ST33

0U2V

DM

-4-G

P

79.33719.20L2nd = 77.C3371.13L

12

PC4405

SC4D

7U25

V5KX

-GP

PC4405

SC4D

7U25

V5KX

-GP


12

EC4401

SCD

1U50V3KX-G

P

DY

EC4401

SCD

1U50V3KX-G

P

DY


1 2PR4401

1R3J-L1-GP

PR4401

1R3J-L1-GP

1 2PR4404

768R2F-1-GP

PR4404

768R2F-1-GP

12

PG4401

GAP

-CLO

SE-P

WR

-3-G

P

PG4401

GAP

-CLO

SE-P

WR

-3-G

P

12

PT4401

ST33

0U2V

DM

-4-G

P

79.33719.20L2nd = 77.C3371.13L

PT4401

ST33

0U2V

DM

-4-G

P

79.33719.20L2nd = 77.C3371.13L


12

EC4402

SCD

1U50V3KX-G

P

DY

EC4402

SCD

1U50V3KX-G

P

DY

12

EC4410

SCD

1U50V3KX-G

PEC

4410SC

D1U

50V3KX-GP

12

EC4403

SCD

1U50V3KX-G

PEC

4403SC

D1U

50V3KX-GP

12

PR4407

7K5R2F-1-G

P

PR4407

7K5R2F-1-G

P

12345 6 7 8

SSSD D D D

G

PU4404

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4404

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

12

PC4408

SCD068U16V2KX-GP

DYPC4408

SCD068U16V2KX-GP

DY

12

PR4405NTC-10K-27-GP

2nd = 69.60011.20169.60013.131

PR4405NTC-10K-27-GP

2nd = 69.60011.20169.60013.131

12 PC4411

SCD068U16V2KX-GP

PC4411

SCD068U16V2KX-GP

12345 6 7 8

SSSD D D D

G

PU4403

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4403

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

1 2PR4403

1R2F-GP

PR4403

1R2F-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VTT_SENSE_L

VSS_SENSE_L

PWR_1D05V_VFB

PWR_1D05V_CCMPWR_1D05V_DRVL

PWR_1D05V_VBST_RPWR_1D05V_DRVHPWR_1D05V_VBST

PWR_1D05V_SWPWR_1D05V_VFBPWR_1D05V_EN

PWR_1D05V_TRIP

PWR

_1D

05V_

SNU

B

VSS_SENSE_L

VTT_SENSE_L

1D05V_PWR

5V_S5

PWR_1D05V_DCBATOUT

DCBATOUT PWR_1D05V_DCBATOUT

1D05V_VTT1D05V_PWR

3D3V_S0

VCCIO_SENSE 8

1.05VTT_PWRGD37,48

RUNPWROK19,46,47,93

VSSIO_SENSE 8

Title


Date: Sheet of


QUEEN 15 A00TPS51218_+1.05V_VTT

A3


DN15ATI

Title


Date: Sheet of



A3


DN15ATI

Title


Date: Sheet of



A3


DN15ATI

Id=26.5AQg=40.6~61nC,Rdson=2.6~3.2mohm

TPS51218 for 1D05V

Vout=0.704V*(R1+R2)/R2

Design Current = 9.9A 15.6A<OCP< 18.3A

0617 Modify:Joseph Change PTC4502 to 330uF from 390uF base on layout placement status.0721 Modify:Brian Add PC4511 1uF.Change PTC4502 to 330u 79.33719.L01.

0719 Modify:Change PU4502 part number to 84.00172.037 from 84.07686.037 base on power team Brian suggestion.

84.00172.037BSZ115N03MSCId=20A, Qg=9.8nC,Rdson=8.9 mohm

0719 Modify:Reserved EC4502,EC4503 0.1uF near PG4516(TOP) for EMC NEO suggestion.

0721 Modify:Brian suggest change PU4503 to 84.00460.037.Change PR4506 to 9.76K from 10K from power team Brian updated.

0721 Modify:Change PR4504 to 2.2ohm from 0ohm from power team Brian updated.

0727 Modify:PR4505,PR4508 change to 100ohm from 10ohm.stuff PR4509,PR4510 0ohm from Brian updated.

0809

0909 X01 Modify:Change PL4501 to 68.2R210.20Cfrom IND-D56UH-27-GP base on Brian updated.

Mag. 2.20uH 10*11.5*4DCR=6.7~7mohmIdc=12A, Isat=27A

0901 X01 Modify:Change PTC4502 to 79.3971V.30L from 79.33719.L01 from power team Brian updated.0913 X01 Modify:Add 2nd source 77.93971.02L on PTC4502base on Brian updated 2nd soruce excel file.

09210920 X01 Modify:Change PR4507 to 20K from 20.5Kfrom Brian updated.


1123 X02 Modify:Change PR4501 to 75K from 45.3Kfor 1.05V OCP set to 20A from Brian.

A00 1224A00 1224

A00 1224

12

EC45

01SC

D1U

50V3

KX-G

PEC

4501

SCD

1U50

V3KX

-GP

12

PC4505

SC4D

7U25V5KX-G

P

PC4505

SC4D

7U25V5KX-G

P


12


12

PC4506

SC4D

7U25V5KX-G

P

PC4506

SC4D

7U25V5KX-G

P

12

PR45069K76R2F-1-GP

PR45069K76R2F-1-GP

12

PC4502SCD1U25V3KX-GPPC4502SCD1U25V3KX-GP

1 2PR4502

0R0402-PAD-2-GP

PR4502

0R0402-PAD-2-GP

1 2PR45100R0402-PADPR45100R0402-PAD


12




12

PTC4509

SCD

1U25V3KX-G

P

DYPTC4509

SCD

1U25V3KX-G

P

DY


12

PR4505100R2F-L1-GP-U

PR4505100R2F-L1-GP-U


1 2

PR4501

75KR2F-GP

PR4501

75KR2F-GP


12

PR4514

2D2R5F-2-GPDY

PR4514

2D2R5F-2-GPDY



1 2PR4504

2D2R3-1-U-GP

PR4504

2D2R3-1-U-GP

12

PC4511

SCD

1U10V2KX-4G

P

DY

PC4511

SCD

1U10V2KX-4G

P

DY

1 2PR45090R0402-PADPR45090R0402-PAD

12345 6 7 8

SSSD D D D

G

PU4503

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4503

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

12

EC45

02SC

D1U

50V3

KX-G

PDY

EC45

02SC

D1U

50V3

KX-G

PDY


12

PR4516

10KR2J-3-GP

PR4516

10KR2J-3-GP

12

PC4507

SCD

1U25V3KX-G

P

PC4507

SCD

1U25V3KX-G

P

12

PC4504

SC4D

7U25V5KX-G

P

PC4504

SC4D

7U25V5KX-G

P



12345 6 7 8

SSSGD D D D

PU4502

SIR172DP-T1-GE3-GP

84.00172.0372nd = 84.08065.037

SSSGD D D D

PU4502

SIR172DP-T1-GE3-GP

84.00172.0372nd = 84.08065.037

12

PC4501

SC1K

P50V

2KX-

1GP

DYPC4501

SC1K

P50V

2KX-

1GP

DY

12

PT4502SE390U

2D5VM

-7GP

79.3971V.30L2nd = 77.93971.02L

PT4502SE390U

2D5VM

-7GP

79.3971V.30L2nd = 77.93971.02L

12

PC4508SC

D1U

10V2KX-4GP

PC4508SC

D1U

10V2KX-4GP

12

PC4510SC1000P50V3JN-GP-UDY PC4510SC1000P50V3JN-GP-UDY

DRVL 6V5IN 7SW 8DRVH 9VBST 10GND 11PGOOD1TRIP2EN3VFB4CCM5

PU4501

TPS51218DSCR-GP-U1

PU4501

TPS51218DSCR-GP-U1 12PC4503

SC1U

10V2KX-1GP

PC4503

SC1U

10V2KX-1GP




12

PR450720KR2F-L-GP

PR450720KR2F-L-GP

1 2PL4501

COIL-2D2UH-11-GP68.2R210.20C

2nd = 68.2R21B.10I

PL4501

COIL-2D2UH-11-GP68.2R210.20C

2nd = 68.2R21B.10I


12

PR4508100R2F-L1-GP-UPR4508100R2F-L1-GP-U

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TPS51216_DRVL

PWR

_1D

5V_V

DD

QS

PWR_1D5V_VBST PR46

05_2

PWR_1D5V_DRVH

PWR_1D5V_MODE

PWR_1D5V_TRIP

PWR_1D5V_VTTREF

PWR_1D5V_VDDQS

PWR_1D5V_VREF

PWR_1D5V_REFIN

PR4601_1

PWR_1D5V_SW

PWR_1D5V_EN

TPS51216_PHS_SET

PWR_1D5V_ENPWR_1D5V_VTTREF

1D5V_PWR

+PWR_SRC_1D5V

+PWR_SRC_1D5V

+0D75V_DDR_P 0D75V_S0

DCBATOUT

+0D75V_DDR_P

5V_S5

3D3V_S0

1D5V_PWR 1D5V_S3

1D5V_PWR

DDR_VREF_S3

RUNPWROK19,45,47,93

PM_SLP_S4#19,27,75

0D75V_EN37

Title


Date: Sheet of


QUEEN 15 A00TPS51116_+1.5V_SUS

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

State S3 S5 VDDR VTTREF VTT

S0

S3

S4/S5

Hi Hi

HiLo

Lo Lo

On

On

On

On

On

Off Off Off

Off(Hi-Z)

SSID = PWR.Plane.Regulator_1p5v0p75v

PR5003

200k ohm

300kHz

300kHz

400kHzTracking Discharge

Non-tracking Discharge

Frequency Discharge Mode

100k ohm

68k ohm

47k ohm 400kHz

MODE


0630 modify

0630 Modify:Change 1D5V power soluiton to TPS51216 from TPS51116 follow power team Brian suggest.

0630 Modify:ADD PC4604 1uF0603 on PWR_1D5V_VTTIN.

0630 Modify:Change PC4610 to 0.22u 0402 from 0603 from Brian.

0702 Modify:Add PR4611 0ohm 0603 pad on PWR_1D5V_VTTREF.

0928Change PR4606 to 4.02K from240ohm for fine tune 1.5V outputVoltage.

0719 Modify:Change PU4602 part number to 84.00172.037 from 84.07686.037 base on power team Brian suggestion.

84.00172.037BSZ115N03MSCId=20A, Qg=9.8nC,Rdson=8.9 mohm

0721 Modify:Removed PR4615,PR4616 and connect 0D75V_EN to VTTEN directly.

0721 Modify:Removed PR4615,PR4616 and connect 0D75V_EN to VTTEN directly.

0721 Modify:un-stuff PC4617 from power team Brian updated.

0721 Modify:Change PR4602 to 68K from 6.2K from power team Brian updated.

84.00460.037SiR460DP-T1-GE3Id=40A, Qg=16.8nC,Rdson=4.7~6.1 mohm

0913 X01 Modify:Add 2nd source 68.R681A.10Q on PL4601base on Brian updated 2nd soruce excel file.

68.R6810.20GId=22~39ADCR=2.4~2.7mohmSize=10X11.5X4

0902 X01 Modify:Change PTC4602 to 79.3971V.30L from79.22719.20L sync with DQ15-NVAdd 2nd source 77.93971.02L on PTC4602.

79.3971V.30L390uF, 2.5V,6.3X5.7ESR=10m£[, Iripple=3.87A

0920 X01 Modify:Change PR4602 to 110K from 68Kfrom Brian updated.

A00 1224

A00 1224

12

PR46

06

4K02

R2F

-GP

PR46

06

4K02

R2F

-GP

1 2PG4622GAP-CLOSE-PWRPG4622GAP-CLOSE-PWR


12PC

4615

SCD

1U10

V2KX

-4G

P

PC46

15

SCD

1U10

V2KX

-4G

P

12

PR46

0211

0KR

2F-G

PPR

4602

110K

R2F

-GP

1 2PR46110R0603-PADPR46110R0603-PAD

12

PR46122D2R5F-2-GPDY PR46122D2R5F-2-GPDY

1 2PR4607

0R0402-PAD-2-GP

PR4607

0R0402-PAD-2-GP


12

PC46

01SC

1U10

V3KX

-3G

PPC

4601

SC1U

10V3

KX-3

GP


12

PC4610SCD22U6D3V2KX-1GPPC4610SCD22U6D3V2KX-1GP

12

PG46

07G

AP-C

LOSE

-PW

R-3

-GP

PG46

07G

AP-C

LOSE

-PW

R-3

-GP

12

PC46

09SC

10U

25V6

KX-1

GP

PC46

09SC

10U

25V6

KX-1

GP

12

PC4622SC330P50V2KX-3GPDY PC4622SC330P50V2KX-3GPDY


12

PC46

02SC

D01

U16

V2KX

-3G

PPC

4602

SCD

01U

16V2

KX-3

GP

1 2PG4601

GAP-CLOSE-PWR

PG4601

GAP-CLOSE-PWR


12

PC46

12SC

10U

25V6

KX-1

GP

PC46

12SC

10U

25V6

KX-1

GP

12

EC46

01SC

D1U

50V3

KX-G

PDY

EC46

01SC

D1U

50V3

KX-G

PDY



12PC

4617

SC10

U6D

3V5M

X-3G

P

DY

PC46

17

SC10

U6D

3V5M

X-3G

P

DY

12PG4605

GAP-CLOSE-PWR

PG4605

GAP-CLOSE-PWR

1 2PR4605

2D2R3J-2-GP

PR4605

2D2R3J-2-GP

12PG4606

GAP-CLOSE-PWR

PG4606

GAP-CLOSE-PWR

12

PC4606SCD1U10V2KX-5GPDYPC4606SCD1U10V2KX-5GPDY

12

PC46

11SC

10U

25V6

KX-1

GP

PC46

11SC

10U

25V6

KX-1

GP



1 2PG4602

GAP-CLOSE-PWR

PG4602

GAP-CLOSE-PWR

12

PC46

03SC

D1U

25V3

KX-G

PPC

4603

SCD

1U25

V3KX

-GP

12PC

4616

SC10

U6D

3V5M

X-3G

P

PC46

16

SC10

U6D

3V5M

X-3G

P

12

PT4602

SE39

0U2D

5VM

-7G

P

79.3971V.30L2nd = 77.93971.02L

PT4602

SE39

0U2D

5VM

-7G

P

79.3971V.30L2nd = 77.93971.02L




12345 6 7 8

SSSD D D D

G

PU4603

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

SSSD D D D

G

PU4603

SIR460D

P-T1-GE3-G

P

84.00460.0372nd = 84.08059.037

1 2PL4601

IND-D68UH-51-GP-U

68.R6810.20G2nd = 68.R681A.10Q

PL4601

IND-D68UH-51-GP-U

68.R6810.20G2nd = 68.R681A.10Q


12

PR460310KR2F-2-GPPR460310KR2F-2-GP

12

PR46

01

47KR

2F-G

P

PR46

01

47KR

2F-G

P

VTT 3

VREF6

VTTS 1

V5IN 12

VTTIN 2

PGND 10

PGOOD20

VDDQS 9

MODE19

VTTGND 4

VBST 15

DRVH 14

SW 13

DRVL 11

GND7

GND21

EN/PSV16

VTTEN17

REFIN8

TRIP18

VTTREF5

PU4601

TPS51216RUKR-GP

74.51216.073

PU4601

TPS51216RUKR-GP

74.51216.073

12PG4604

GAP-CLOSE-PWR

PG4604

GAP-CLOSE-PWR

12PG4603

GAP-CLOSE-PWR

PG4603

GAP-CLOSE-PWR




12

PR460420KR2J-L2-GPPR460420KR2J-L2-GP

12

PC46

14SC

4D7U

25V5

KX-G

PPC

4614

SC4D

7U25

V5KX

-GP

12

PR46

08

200K

R2F

-L-G

P

PR46

08

200K

R2F

-L-G

P


12

PC46

21SC

D1U

10V2

KX-4

GP

PC46

21SC

D1U

10V2

KX-4

GP

12345 6 7 8

SSSGD D D D


84.00172.0372nd = 84.08065.037

SSSGD D D D


84.00172.0372nd = 84.08065.037

12

PC46

13SC

D1U

50V3

KX-G

PPC

4613

SCD

1U50

V3KX

-GP

12

PC46

20SC

4D7U

6D3V

5KX-

3GP

PC46

20SC

4D7U

6D3V

5KX-

3GP

1 2

PC4619SCD1U25V3KX-GPPC4619SCD1U25V3KX-GP

12

PC46

04SC

1U10

V3KX

-3G

PPC

4604

SC1U

10V3

KX-3

GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

51331_FB_1

51331_COMP

51331_PS

51331_EN

51331_SW

PR4709_1

51331_VBST 51331_VBST_1

PC4712_1

PG4710_1

51331_FB_1 51331_FB

3D3V_S5

1D8V_RUN_PWR 1D8V_S0

3D3V_S5

1D8V_RUN_PWR3D3V_S0

PM_SLP_S3#19,27,36,37,75

RUNPWROK19,45,46,93

Title


Date: Sheet of


QUEEN 15 A00TPS51311 for 1D8V_S0

A3


DN15ATI Whistler

Title


Date: Sheet of



A3


DN15ATI Whistler

Title


Date: Sheet of



A3


DN15ATI Whistler

SSID = PWR.Plane.Regulator_1D8V_S0

TPS51311 PWM for 1D8V_S0

+1.8V_RUNDesign current = 2.7985A

0629 Modify

0629 Modify

0902 X01 Modify:Change PR4712 to 10K from 0ohm and stuff PC4717 for fine tune 1D8V_S0 ramp up sequence.

0920 X01 Modify:stuff PC4714 22uF from Brian updated.

12

PR471110KR2F-2-GP

PR471110KR2F-2-GP

12


1 2PR4709

5K9R2F-GP

PR4709

5K9R2F-GP

12

PC4717SC1U6D3V2KX-GPPC4717SC1U6D3V2KX-GP

12



1 2PG4706

GAP-CLOSE-PWR

PG4706

GAP-CLOSE-PWR

VBST 4

VIN 13

SW#5 5

MODE8

PGOOD3

AGND11

RES2

FB10

COMP9

VDD12

EN1 SW#6 6SW#7 7

VIN 14

PGND 15PGND 16PGND17

PU4702

TPS51311RGTR-GP

74.51311.073

PU4702

TPS51311RGTR-GP

74.51311.073

12



12

PC47

16SC

10U

6D3V

5MX-

3GP

PC47

16SC

10U

6D3V

5MX-

3GP

12

PG47

10G

AP-C

LOSE

-PW

R-3

-GP

PG47

10G

AP-C

LOSE

-PW

R-3

-GP

1 2PR47100R0603-PADPR47100R0603-PAD

1 2PC4701 SC100P50V2JN-3GPPC4701 SC100P50V2JN-3GP

12

PR471340D2R2F-GP

PR471340D2R2F-GP

12

PC47

15SC

10U

6D3V

5MX-

3GP

PC47

15SC

10U

6D3V

5MX-

3GP

1 2PG4707

GAP-CLOSE-PWR

PG4707

GAP-CLOSE-PWR


12PC4710

SC2200P50V2KX-2GP

PC4710

SC2200P50V2KX-2GP

1 2PR4712

10KR2J-3-GP

PR4712

10KR2J-3-GP

1 2PG4709

GAP-CLOSE-PWR

PG4709

GAP-CLOSE-PWR

12



12



12

PR470857K6R2F-GP

DY PR470857K6R2F-GP

DY1 2

PL4701


PL4701

IND-2D2UH-46-GP-U68.2R210.20B2nd = 68.2R21B.10J 1

2

PC4714

SC22U

6D3V5M

X-2GP

PC4714

SC22U

6D3V5M

X-2GP

1 2PG4708

GAP-CLOSE-PWR

PG4708

GAP-CLOSE-PWR

12

PC47

18SC

10U

6D3V

5MX-

3GP

PC47

18SC

10U

6D3V

5MX-

3GP

1 2PR4714100KR2J-1-GP

DYPR4714100KR2J-1-GP

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VCCSA_SLEW

PWR_VCCSA_BST_R

PWR

_VC

CSA

_SN

UB

PWR_VCCSA_BST

PWR_VCCSA_V5DRV

PWR_VCCSA_FB

PWR_VCCSA_VIN

APL5916_EN

PWR_VCCSA_EN

PWR

_VCC

SA_CO

MP_1

PWR

_VCC

SA_VREF

PQ48

01_D

PWR

_VCC

SA_CO

MP

PQ4801_G

PQ4801_5

PWR_VCCSA_SW

PWR_VCCSA_VOUT

PWR_VCCSA_VID1PWR

_VCC

SA_PGO

OD

PWR_VCCSA_VID0

3D3V_S0

VCCSA_PWR

0D85V_S0

1D05V_VTT

5V_S5

5V_S5

5V_S5

0D85V_S0

3D3V_S0

3D3V_S0

0D85V_S0

0D85V_S0

D85V_PWRGD42

1.05VTT_PWRGD37,45

1.05VTT_PWRGD 37,45

VCCSA_SEL 9

H_FC_C22 9

D85V_PWRGD 42

VCCSA_SEL 9

VCCUSA_SENSE 9

Title


Date: Sheet of


QUEEN&NIRVANA 15 A00TPS51461_VCCSA

A2


<Core Design>

Title


Date: Sheet of



A2


<Core Design>

Title


Date: Sheet of



A2


<Core Design>

0.725V

0.675V

VCCSAVID0

H

VID1

L

L

H

L 0.8V

0.9V

H

H

L


TPS51461 for VCCSA

Iomax=6AOCP>9AVCCSA=0.85V

Vout=0.8*(1+R1/R2)

APL5916 for VCCSA

VCCSA_PWRVCCSA_SEL

H

0.9V

0.8V

L

R2

R1

1112 X02 Modify:set TPS51461 PWM solution dummy field for VCCSA_PWM and APL5916 LDO solution dummyfield for VCCSA_LDO. defualt stuff VCCSA_LDO atST stage.

20100614 V1.1for CRB board

1118 X02 Modify:Change PTC4801 to 100u(77.21071.07L)from 150u from power team Brian updated.1122 X02 Modify:Updated VCCSA_LDO circuit from Powerteam Brian updated.

68.R4710.10MId=17.5~26ADCR=4~4.2mohmSize=6.5X6.9X3

1112 X02 Modify:CO-LAY APL5916 related circuit for VCCSA LDOsolution.

1 2PG4810

GAP-CLOSE-PWRVCCSA_LDO

PG4810


12

PC4803

SC22U

6D3V5M

X-2GP

VCCSA_PWM

PC4803

SC22U

6D3V5M

X-2GP

VCCSA_PWM

12

PC4819

SC10U

6D3V5M

X-3GP

VCCSA_LDO

PC4819

SC10U

6D3V5M

X-3GP

VCCSA_LDO

1 2PR4812

1KR2F-3-GPDYPR4812

1KR2F-3-GPDY

12

PC4805

SC22U

6D3V5M

X-2GP

VCCSA_PWM

PC4805

SC22U

6D3V5M

X-2GP

VCCSA_PWM

1 2 3456

PQ48012N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

DYPQ48012N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

DY

1 2PG4811


PG4811


1 2PR4811

100R2F-L1-GP-U

VCCSA_PWM

PR4811

100R2F-L1-GP-U

VCCSA_PWM

12

PC4820

SC10

U6D

3V5M

X-3G

PVCCSA_LDOPC4820

SC10

U6D

3V5M

X-3G

PVCCSA_LDO

12

PR481680K6R2F-GP DY

PR481680K6R2F-GP DY

12

PC4812

SC4D

7U25V5KX-G

P

VCCSA_PWMPC4812

SC4D

7U25V5KX-G

P

VCCSA_PWM

1 2PG4803


PG4803


12

EC48

01SC

D1U

50V3

KX-G

PDY

EC48

01SC

D1U

50V3

KX-G

PDY

12

PC4821SC1U6D3V2KX-GP

DYPC4821

SC1U6D3V2KX-GP

DY

12

PR481810KR2F-2-GP DY

PR481810KR2F-2-GP DY

12

PR48094K7R2J-2-GP

VCCSA_PWMPR48094K7R2J-2-GP

VCCSA_PWM

12

PC4807

SCD

1U25V3KX-G

P

VCCSA_PWMPC4807

SCD

1U25V3KX-G

P

VCCSA_PWM

1 2PG4804


PG4804


1 2PG4812


PG4812


12


VCCSA_PWMPC4802SCD22U10V2KX-1GP

VCCSA_PWM

12

PR48061R2F-GP

VCCSA_PWMPR48061R2F-GP

VCCSA_PWM

12

PC4822

SC10

U6D

3V5M

X-3G

P

VCCSA_LDO

PC4822

SC10

U6D

3V5M

X-3G

P

VCCSA_LDO

12

PC4808

SCD

1U25V3KX-G

P

DYPC4808

SCD

1U25V3KX-G

P

DY

1 2PR48010R0402-PADVCCSA_PWMPR48010R0402-PADVCCSA_PWM

1 2PG4806


PG4806


1 2

PL4801

IND-D47UH-22-GP

68.R4710.10M2nd = 68.R4710.10V

VCCSA_PWM

PL4801

IND-D47UH-22-GP

68.R4710.10M2nd = 68.R4710.10V

VCCSA_PWM

12


VCCSA_LDOPC4824SC1U6D3V2KX-GP

VCCSA_LDO

12


VCCSA_PWMPC4817SC3300P50V3KX-1GP

VCCSA_PWM

12

PC4806

SC22U

6D3V5M

X-2GP

VCCSA_PWM

PC4806

SC22U

6D3V5M

X-2GP

VCCSA_PWM

1 2PG4805


PG4805


1 2PG4802


PG4802


1 2PR48100R0402-PAD

VCCSA_PWM

PR48100R0402-PAD

VCCSA_PWM

12

PC4813

SC4D

7U25V5KX-G

P

VCCSA_PWM

PC4813

SC4D

7U25V5KX-G

P

VCCSA_PWM

12


DY PC4826SCD1U10V2KX-4GP

DY

12

PR481410KR2F-2-GPVCCSA_LDO

PR481410KR2F-2-GPVCCSA_LDO

12

PC4815

SC4D

7U25V5KX-G

P

VCCSA_PWMPC4815

SC4D

7U25V5KX-G

P

VCCSA_PWM

12

PR481580K6R2F-GP

VCCSA_LDOPR4815

80K6R2F-GP

VCCSA_LDO1 2

PG4808


PG4808


1 2PR48040R0402-PAD

VCCSA_PWMPR48040R0402-PAD

VCCSA_PWM

12

PC4825

SC10U

6D3V5M

X-3GP

VCCSA_LDO

PC4825

SC10U

6D3V5M

X-3GP

VCCSA_LDO1 2

PR4817 0R2J-2-GP

VCCSA_LDOPR4817 0R2J-2-GP

VCCSA_LDO

12

PC4814SC1U

10V2KX-1GP

VCCSA_PWMPC4814SC

1U10V2KX-1G

P

VCCSA_PWM

1 2


VCCSA_PWM


VCCSA_PWM

12 PC

4816

SC2D

2U10

V3KX

-1G

P

VCCSA_PWM

PC48

16SC

2D2U

10V3

KX-1

GP

VCCSA_PWM

1 2PG4807


PG4807


1 2PG4801


PG4801


12

PTC4801

ST10

0U6D

3VBM

-7G

PDYPTC4801

ST10

0U6D

3VBM

-7G

PDY

12


DYPC4810

SC1U6D3V2KX-GP

DY

12


VCCSA_PWMPC4801SCD01U50V2KX-1GP

VCCSA_PWM

GN

D1

VR

EF

2C

OM

P3

SLE

W4

VO

UT

5M

OD

E6

SW#7 7SW#8 8SW#9 9SW#10 10SW#11 11BST 12

EN

13V

ID0

14V

ID1

15P

GO

OD

16V

5FIL

T17

V5D

RV

18

PGND19PGND20

PGND21VIN22VIN23

VIN24GND25

PU4801

TPS51461RGER-GP

74.51461.043

PCB Footprint = QFN24-G2D25H40

VCCSA_PWM

PU4801

TPS51461RGER-GP

74.51461.043

PCB Footprint = QFN24-G2D25H40

VCCSA_PWM

1 2PG4809


PG4809


12

PR48194K7R2J-2-GP

VCCSA_LDO

PR48194K7R2J-2-GP

VCCSA_LDO

1 2PR48070R0603-PAD

VCCSA_PWM

PR48070R0603-PAD

VCCSA_PWM

12

PC4804

SC22U

6D3V5M

X-2GP

VCCSA_PWM

PC4804

SC22U

6D3V5M

X-2GP

VCCSA_PWM

GN

D1

FB 2

VOUT 3VOUT 4

VIN 5

VC

NTL

6

POK7

EN8

VIN 9

PU4802APL5916KAI-TRL-GP74.05916.031

VCCSA_LDO

PU4802APL5916KAI-TRL-GP74.05916.031

VCCSA_LDO

12

PR48024K99R2F-L-GP

VCCSA_PWMPR48024K99R2F-L-GP

VCCSA_PWM

12

PR48032D2R5F-2-GPDYPR48032D2R5F-2-GPDY

1 2PR48050R0402-PAD VCCSA_PWMPR48050R0402-PAD VCCSA_PWM

12


1 2

PR4813

10KR2J-3-GP

DYPR4813

10KR2J-3-GP

DY

1 2PR48080R0402-PAD

VCCSA_PWMPR48080R0402-PAD

VCCSA_PWM

12

PC4818

SC100P50V2JN

-3GP

VCCSA_LDO

PC4818

SC100P50V2JN

-3GP

VCCSA_LDO

LCDVDD_EN

USB_CAMERA#USB_CAMERA

LCD_TST_C

LCD_BRIGHTNESS

LVDSA_DATA0#LVDSA_DATA0

LVDSA_CLK

LCD_TST_CLCD_BRIGHTNESS

LVDSA_CLK#LVDSA_DATA2#

LVDSA_DATA1#LVDSA_DATA1

LVDSA_DATA2

BLON_OUT_C

USB_PN0_CUSB_PP0_C

USB_CAMERAUSB_CAMERA#

USB_PP0_C

USB_PN0_C

LCD_TST_CBLON_OUT_C

LCDVDD 3D3V_S0

DCBATOUT_LCD DCBATOUT

3D3V_CAMERA_S03D3V_S0

DCBATOUT_LCD

LCDVDD3D3V_S0

3D3V_CAMERA_S0

3D3V_S0

5V_S0TPNL_5V

LCD_TST_EN27

LVDS_VDD_EN17

LVDSA_DATA1 17LVDSA_DATA1# 17

LVDSA_DATA2# 17LVDSA_DATA2 17

L_BKLT_CTRL 17

LVDSA_CLK# 17LVDSA_CLK 17

LVDSA_DATA0 17LVDSA_DATA0# 17LVDS_DDC_DATA_R 17LVDS_DDC_CLK_R 17

LVDS_DDC_CLK_R17LVDS_DDC_DATA_R17

AUD_DMIC_CLK 29AUD_DMIC_IN0 29

USB_PP1218

USB_PN1218

USB_PP018

USB_PN018

LCD_TST 27BLON_OUT 27

Title


Date: Sheet of


QUEEN 15 A00LCD Connector

A3


DN15ATI Whistler

Title


Date: Sheet of



A3


DN15ATI Whistler

Title


Date: Sheet of



A3


DN15ATI Whistler

SSID = VIDEO

LCD POWER for ROSA

Layout 40 mil

0902 X01 Modify:Add 2nd source 74.09724.09F on U4901 sync with Annie.

SSID = VIDEO

0909 X01 Modify:Change LCD1 to 20.F1816.030 for 30pin Re-assign LCD1 pin define base on Roy updatedcable pin define list.

Camera Power

LVDS CONNECTOR

For EMI requestClose to LVDS connector

0913 X01 Modify:Reserved EC4910~EC4915 on LVDS signalfor EMC suggestion.

TOUCH PANELCLOSED TO LVDS CONN LCD1

0916 X01 Modify:Change TPNL1 to 20.F1621.004 from Double updated EMN&DXF.0917 X01 Modify:Add 2nd source 20.F1561.004;3rd source20.F1686.004 on TPNL1 from updated connector list.

1122 X02 Modify:stuff C4908 0.1uF from EMC Neo suggestion.

1122 X02 Modify:Change TR4902 CM choke to 69.10103.041 and un-stuff R4908,R4909 from EMC Neo Suggestion.

1122 X02 Modify:Change RN4901 to 100ohm 4p from 8pfor improve layout place.


1122 X02 Modify:Swap TR4901 pin4,3 and pin2,1 each otherbase on Connie swap report.Change TR4901 CM choke to 69.10103.041 and un-stuff R4911,R4912 from EMC Neo Suggestion.Change R4911,R4912 to 0603 from 0402.

A00 1229

A00 1230

A00 0103 not co-lay

EN1GND2OUT3 IN#4 4

IN#5 5

U4901

G5285T11U-GP

74.05285.07F2nd = 74.09724.09F

U4901

G5285T11U-GP

74.05285.07F2nd = 74.09724.09F

12

C49

05SC

D1U

50V3

KX-G

PC

4905

SCD

1U50

V3KX

-GP

1

2

3

D4901

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

D4901

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

12 C4902

SC1U6D3V2KX-GP

C4902

SC1U6D3V2KX-GP

12

R49

0549

K9R

2F-L

-GP

R49

0549

K9R

2F-L

-GP

12

EC4914

SC33

P50V

2JN

-3G

P

DYEC4914

SC33

P50V

2JN

-3G

P

DY

1 2

34

TR4901

FILTER-4P-6-GP

69.10103.041

TPNL

2nd = 69.10084.071

TR4901

FILTER-4P-6-GP

69.10103.041

TPNL

2nd = 69.10084.071

12 3

4RN4901

SRN100J-3-GP

RN4901

SRN100J-3-GP

12 C

4910

SCD

1U10

V2KX

-4G

PTPNL

C49

10SC

D1U

10V2

KX-4

GPTPNL

1 2F49020R0603-PADF49020R0603-PAD

1 2R4907100KR2J-1-GP

R4907100KR2J-1-GP

1 TP4904TPAD14-GPTP4904TPAD14-GP

12 C49

04SC

1KP5

0V2K

X-1G

PC

4904

SC1K

P50V

2KX-

1GP

1

234

5

6

TPNL1

ACES-CON4-17-GP-U

20.F1621.004

TPNL

2nd = 20.F1561.0043rd = 20.F1686.004

TPNL1

ACES-CON4-17-GP-U

20.F1621.004

TPNL

2nd = 20.F1561.0043rd = 20.F1686.004

12

C49

11SC

10U

6D3V

5KX-

1GPTPNL

C49

11SC

10U

6D3V

5KX-

1GPTPNL

1 234

RN9403SRN2K2J-1-GP

RN9403SRN2K2J-1-GP

12


12R4902 33R2J-2-GPR4902 33R2J-2-GP

12

EC4901

SC33

P50V

2JN

-3G

PDY

EC4901

SC33

P50V

2JN

-3G

PDY

12

C49

01SC

D1U

10V2

KX-5

GP

DY C49

01SC

D1U

10V2

KX-5

GP

DY

12

EC4911

SC33

P50V

2JN

-3G

P

DYEC4911

SC33

P50V

2JN

-3G

P

DY

12

EC49

09SC

D1U

50V3

KX-G

PEC

4909

SCD

1U50

V3KX

-GP

12

EC4906

SCD

1U50V3KX-G

P

DY

EC4906

SCD

1U50V3KX-G

P

DY

12

EC4902

SC33

P50V

2JN

-3G

P

DYEC4902

SC33

P50V

2JN

-3G

P

DY

12

C4908SC4D

7U6D

3V3KX-GP

C4908SC4D

7U6D

3V3KX-GP

12

EC4913

SC33

P50V

2JN

-3G

P

DYEC4913

SC33

P50V

2JN

-3G

P

DY

1 2

R4904

0R0402-PAD-2-GPTPNLR4904

0R0402-PAD-2-GPTPNL

12

EC4915

SC33

P50V

2JN

-3G

P

DYEC4915

SC33

P50V

2JN

-3G

P

DY

12

C4907SC4D

7U6D

3V3KX-GP

C4907SC4D

7U6D

3V3KX-GP

12 EC

4908SC

D1U

50V3KX-GP

DY

EC4908

SCD

1U50V3KX-G

P

DY

12F4901

POLYSW-1D1A24V-GP-U

69.50007.A312nd = 69.50007.A41

F4901

POLYSW-1D1A24V-GP-U

69.50007.A312nd = 69.50007.A41

12 EC

4907SC

D1U

50V3KX-GP

EC4907

SCD

1U50V3KX-G

P

12

EC4903

SCD

1U10

V2KX

-5G

PDYEC4903

SCD

1U10

V2KX

-5G

PDY

12

EC4910

SC5D

6P50

V2C

N-1

GP

DYEC4910

SC5D

6P50

V2C

N-1

GP

DY

12

3 4

TR4902

FILTER-4P-6-GP

69.10103.0412nd = 69.10084.071

TR4902

FILTER-4P-6-GP

69.10103.0412nd = 69.10084.071

12

EC4904

SC5D

6P50

V2C

N-1

GP DY

EC4904

SC5D

6P50

V2C

N-1

GP DY

12

EC4905

SC5D

6P50

V2C

N-1

GP DY

EC4905

SC5D

6P50

V2C

N-1

GP DY

1

23456789101112131415161718192021222324252627282930

31

32

NP1

NP2

LCD1

PS-CON30-GP

20.F1816.0302nd = 20.F1860.030

LCD1

PS-CON30-GP

20.F1816.0302nd = 20.F1860.030

12

EC4912

SC5D

6P50

V2C

N-1

GP

DYEC4912

SC5D

6P50

V2C

N-1

GP

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00CRT Connector

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI_CLK

HDMI_DATA0HDMI_DATA0#

DDC_DATA_HDMIDDC_CLK_HDMI

HDMI_DATA1

HDMI_DATA2HDMI_DATA2#

HDMI_DATA1#

HDMI_CLK#

HDMI_PLL_GND

HDMI_PLL_GND

HDMI_DATA2_R_CHDMI_DATA2_R_C#



HDMI_CLK_R_CHDMI_CLK_R_C#

GPU_HDMI_DATA

DDC_DATA_HDMI

DDC_CLK_HDMIGPU_HDMI_CLK

HDMI_OE#

HPD_HDMI_CON

HDMI_DATA0_R_C_CON

HDMI_DATA0_R_C#_CONHDMI_DATA0_R_C#

HDMI_DATA0_R_C

HDMI_CLK_R_C_CON

HDMI_CLK_R_C#_CONHDMI_CLK_R_C#

HDMI_CLK_R_C

HDMI_DATA2_R_C_CON


HDMI_DATA2_R_C

HDMI_DATA1_R_C_CON


HDMI_DATA1_R_C

HDMI_DATA0_R_C_CON

HDMI_CLK_R_C#_CON

HDMI_DATA1_R_C#_CON

HDMI_DATA2_R_C_CON

HDMI_DATA2_R_C#_CON

HDMI_DATA0_R_C#_CONHDMI_CLK_R_C_CON

HDMI_DATA1_R_C_CONDDC_DATA_HDMI

HDMI_HPD_E

HDMI_HPD_B

HPD

_HD

MI_

CO

N

3D3V_VGA_S0

5V_CRT_S0_R

3D3V_VGA_S0

3D3V_S0

5V_CRT_S0_R

3D3V_VGA_S0 5V_S0

3D3V_S0

3D3V_S0

HDMI_CLK#85HDMI_CLK85

HDMI_DATA0#85HDMI_DATA085



GPU_HDMI_DATA85

GPU_HDMI_CLK85

HDMI_IN# 27

GPU_HDMI_HPD 85

PEX_RST# 83,85,86

HDMI_IN#27

HDMI_HPD_DET 85

Title


Date: Sheet of


QUEEN 15 A00HDMI Level Shifter/Connector

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = VIDEO

Close to HDMI Connector

HDMI Level Shifter & CONNECTORHDMI CONN

Routing Guidelines:CTRLDATA must be routed longer than CTRLCLK within 1000 mils (25.4 mm). The total delay on CTRLDATA should be longer than CTRLCLK.

0629 Modify:Utilize Q5104 2N7002 instead of PCA9509 Level shifter base on Intel DG recommand on HDMI DDC.

0630 SWAP RN51060630 SWAP RN5107

0707 Modify:Add Q5101,R5109,R5127 for HDMI_IN# to KBC.

0714 Modify:Stuff R5109 20K PH to 3D3V_S0.

A00 1223 HDMI leakage

0716 Modify:Add F5101 1A FUSE for DELL suggesiton.0720 Modify:Stuff F5101 FUSE from DELL suggestion.

0721 Modify:Change HDMI1 part number to 22.10296.271 from 22.10296.211 base on ME latest EMN and DXF.

0726 For NV

0806

0810

0831 X01 Modify:Change HDMI1 part number to 22.10296.311 from22.10296.271 base on ME Double updated.0910 X01 Modify:Change HDMI1 part number to 22.10296.331 from22.10296.311 base on ME Double updated.

0913 X01 Modify:Add R5101~R5108and reserved TR5101~TR5104 on all of HDMI differential pair for EMC suggestion.

0923 SWAP

0927

0629 Modify

X02 10.28

X02 1110A00

A00 1228

A00 1229

12

R511210KR2J-3-GPR511210KR2J-3-GP

12

C5102

SCD

1U10

V2KX

-5G

P

C5102

SCD

1U10

V2KX

-5G

P

G S

D

Q51032N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q51032N7002K-2-GP84.2N702.J312ND = 84.2N702.031

1

234567891011121314151617181921

22

23

20

HDMI1

SKT-HDMI23-2-GP-U1

22.10296.3312nd = 22.10296.311

HDMI1

SKT-HDMI23-2-GP-U1

22.10296.3312nd = 22.10296.311

12


12

R51101MR2F-GP

R51101MR2F-GP

G S

D

Q51012N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DY Q51012N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DY

1

2

34

5

6

Q5104

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q5104

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F


123 4

RN5116SRN2K2J-1-GPOptimus



1 2R5104

0R0402-PAD-2-GP

R5104

0R0402-PAD-2-GP


1 2R5101

0R0402-PAD-2-GP

R5101

0R0402-PAD-2-GP

1 2C5110 SCD1U10V2KX-5GPC5110 SCD1U10V2KX-5GP 3

1

2

Q5102PMBS3904-1-GP

84.03904.L062nd = 84.03904.P113rd = 84.03904.T11

DYQ5102PMBS3904-1-GP

84.03904.L062nd = 84.03904.P113rd = 84.03904.T11

DY1 2C5107 SCD1U10V2KX-5GPC5107 SCD1U10V2KX-5GP

1 2R5105

0R0402-PAD-2-GP

R5105

0R0402-PAD-2-GP

1 2 3 45678

RN5106SRN470J-5-GPRN5106SRN470J-5-GP

1AFTP5101TPAD14-GP AFTP5101TPAD14-GP



1 2R5107

0R0402-PAD-2-GP

R5107

0R0402-PAD-2-GP

1 2R5125 0R2F-N1-GPDYR5125 0R2F-N1-GPDY

123 4

RN5101SRN2K2J-1-GPRN5101SRN2K2J-1-GP

1 2R5103

0R0402-PAD-2-GP

R5103

0R0402-PAD-2-GP

1 2R5102

0R0402-PAD-2-GP

R5102

0R0402-PAD-2-GP

1 2 3 45678

RN5107SRN470J-5-GPRN5107SRN470J-5-GP

1 2 3456

Q51052N7002KDW-GPQ51052N7002KDW-GP

12R5116 1KR2F-L-GPR5116 1KR2F-L-GP

12

R510920KR2J-L2-GPDY R510920KR2J-L2-GPDY

12


1 2R5106

0R0402-PAD-2-GP

R5106

0R0402-PAD-2-GP

12

R51140R0402-PAD-2-GP

R51140R0402-PAD-2-GP

1 2R5127 0R0402-PADR5127 0R0402-PAD

12

R5115

0R2J-2-GP

DYR5115

0R2J-2-GP

DY


1 2R5108

0R0402-PAD-2-GP

R5108

0R0402-PAD-2-GP

1 2R5111 1KR2F-L-GPR5111 1KR2F-L-GP

12


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

LVDS_SwitchA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

LVDS_SwitchA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

LVDS_SwitchA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ITP/Fan ConnectorA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ITP/Fan ConnectorA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ITP/Fan ConnectorA3


<Core Design>

SSID = User.Interface

(Blanking)

ODD_PWR_5V

HDD1_20HDD1_21HDD1_22

SATA_ODD_PWRGTSATA_ODD_DA#

SATA_RX4-_CSATA_RX4+_C

SATA_TXN4_CSATA_TXP4_C


SATA_RXP0_CSATA_RXN0_C

SATA_ODD_DA#_C

SATA_ODD_DA#_C

SATA_ODD_PWRGT SATA_ODD_DA#

OD

D_PW

RG

T#

3D3V_S0

5V_S0

5V_S0ODD_PWR_5V

ODD_PWR_5V

3D3V_S0

5V_S0

3D3V_S0

SATA_ODD_PRSNT# 22

FFS_INT279

SATA_ODD_PWRGT22

SATA_TXP4 21

SATA_RXN4 21

SATA_TXN4 21

SATA_RXP4 21

SATA_TXN021SATA_TXP021

SATA_RXP021SATA_RXN021

SATA_ODD_DA# 18

Title


Date: Sheet of


QUEEN 15 A00HDD/ODD

A3


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00HDD/ODD

A3


<Variant Name>

Title


Date: Sheet of


QUEEN 15 A00HDD/ODD

A3


<Variant Name>

SATA HDD ConnectorSSID = SATA

ODD Connector

SATA Zero Power ODD

100 mil

08100901 Add 2nd.0906 Add 3rd.

0614 Modify:Change ODD1 connector part number to 22.10300.421 base on ME EMN and DXF.0707 Modify:Change ODD1 connector part number to62.10065.E01 base on latest EMN and DXF.

SUPPORT ZERO SATA ODD

20100625 V1.2

0629 Modify:Move R5601 PH 10K to RN5601 PH.

0629 Modify:Move R5601 PH 10K to RN5601 PH.

20100625 V1.2

SATA_RX- and SATA_RX+ TraceLength match within 20 milMars:Exchange ODD and ESATA differential pair each other.

0629 Modify:Move All of 0.01uF cap closed to ODD connector base on Layout guideline.

0629 Modify:Move All of 0.01uF cap closed to HDDconnector base on Layout guideline.20100625 V1.2

0707 Modify:Change Q5601 to DUAL 2N7002 for isolate MD/DA signal between PCH and ODD.

When the drive is powered on, the FET to the MD/DA pin drive is OFF.When the drive is powered off, the FET to the MD/DA pin is ON

1123 X02 Modify:stuff EC5601 180pF from RFfine tune result.

A00 delete 62.10065.121

12 C5613SCD01U16V2KX-3GP C5613SCD01U16V2KX-3GP


12

R5605100KR2J-1-GPR5605100KR2J-1-GP

12

C5601

SCD

1U10

V2KX

-5G

P

DYC5601

SCD

1U10

V2KX

-5G

P

DY

12

C5605

SC10

U10

V5ZY

-1G

P

C5605

SC10

U10

V5ZY

-1G

P




12

C5604

SC10

U6D

3V5K

X-1G

P

DYC5604

SC10

U6D

3V5K

X-1G

P

DY


1

234567

89

10111213141516171819202122

23

24

NP1

NP2

HDD1

TYCO-CON22-1-GP-U2

20.F1011.0222nd = 62.10065.081

HDD1

TYCO-CON22-1-GP-U2

20.F1011.0222nd = 62.10065.081

GND1 IN#22 IN#33 EN/EN#4 OC# 5OUT#6 6OUT#7 7OUT#8 8

U5601G547F1P81U-GP

2ND = 74.02191.07974.00547.C79

U5601G547F1P81U-GP

2ND = 74.02191.07974.00547.C79

12 C5614SCD01U16V2KX-3GP C5614SCD01U16V2KX-3GP



12


12



P1P2P3P4P5P6

8

9

NP1

NP2

S1

S2S3S4S5S6S7

ODD1

SKT-SATA7P-6P-40-GP-U

62.10065.E01

3rd = 62.10065.D612nd = 62.10065.D01

ODD1

SKT-SATA7P-6P-40-GP-U

62.10065.E01

3rd = 62.10065.D612nd = 62.10065.D01


1 2 3456

Q56012N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

Q56012N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

12

C5610SC10U6D3V5KX-1GP

C5610SC10U6D3V5KX-1GP

123

4RN5601

SRN10KJ-5-GP

RN5601

SRN10KJ-5-GP

12

C5606

SCD

1U10

V2KX

-5G

P

C5606

SCD

1U10

V2KX

-5G

P

12 R56020R2J-2-GP DY R56020R2J-2-GP DY

12

EC5601SC180P50V2JN-1GPEC5601SC180P50V2JN-1GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB_PP8_CUSB_PN8_C5V_USB1_S3

USB_PN8_CUSB_PP8_C


SATA_RXN5_CSATA_RXP5_C

USB_PP8_RUSB_PN8_R

CB

ESATA1_D1USB_PP8_C

USB_PN8_C

USB_PP8_R

USB_PN8_R

5V_S5

5V_USB1_S3

USBCHARGER_CB0 27

SATA_TXN521SATA_TXP521

SATA_RXN521SATA_RXP521


USBDET_CON# 27

Title


Date: Sheet of


QUEEN 15 A00

ESATAA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ESATAA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ESATAA3


<Core Design>

ESATA CONN

SSID = ESATA

close to ESATA1

Switch Control Bit:CB=0 (AM):auto detection charger identification active.CB=1 (PM):connect DP/DM to TDP/TDM.

0803 Modify:Change U5702 USB CHARGER circuit to PI5USB14550 from MAX14556.

0629 Modify:Move All of 0.01uF cap closed to ESATA connector base on Layout guideline.0706 Modify:Change ESATA1 part number to 22.10321.F71 base on latest EMN and DXF.0713 Modify:Add USBDET_CON# on ESATA1 pin15 for USB temporary detect solution ESATA1 CONNshould be searched for detect type connector.0719 Modify:ME Double provide temporary foxconn ESATA conn22.10290.141 for SSI stage function test.

E-SATA USB 2.0 Combo CE/H=-0.16/2.83mm with detect function

0629 Modify

USB CHARGER

S0 S10 00

01

111

Auto

D+/- connects to Y+/-

0806

0809

0809

0831

1122 X02 Modify:Change TR5701CM choke to 69.10103.041 and un-stuff R5718,R5719 from EMC Neo Suggestion.1123 X02 Modify:Change R5718,R5719 to 0603 from 0402.

A00 1229



1

AFTP5715

AFTE14P-GP

AFTP5715

AFTE14P-GP1

AFTP5716

AFTE14P-GP

AFTP5716

AFTE14P-GP


VBUS1

D-2 D+3

GND 4GND 5A+6

A-7GND 8

B-9 B+10 GND 11GND 14GND 15GND 16GND 17

DT1 12DT2 13

ESATA1

SKT-ESATA-USB-11P-6-GP-U

2nd = 22.10339.26122.10321.W11

ESATA1

SKT-ESATA-USB-11P-6-GP-U

2nd = 22.10339.26122.10321.W11

S01D+2D-3GND4A+5

A- 6VDD 7Y- 8Y+ 9S1 10GND 11

U5702

PI5USB14550AZEE-GP

U5702

PI5USB14550AZEE-GP

12

C5701

SCD

1U10

V2KX

-4G

P

C5701

SCD

1U10

V2KX

-4G

P

1 2

34

TR5701

FILTER-4P-6-GP

69.10103.041

2nd = 69.10084.071

TR5701

FILTER-4P-6-GP

69.10103.041

2nd = 69.10084.0711

AFTP5717AFTE14P-GPAFTP5717AFTE14P-GP

1 2R5721

0R0402-PAD

R5721

0R0402-PAD

1

AFTP5703

AFTE14P-GP

AFTP5703

AFTE14P-GP

1 2R5722 0R0402-PADR5722 0R0402-PAD


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AUD_SPK_L+_CAUD_SPK_R-_C

AUD_SPK_L-_C

AUD_SPK_R+_C

AUD_SPK_L+_CAUD_SPK_L-_C

AUD_SPK_R-_C

AUD_SPK_R+_C

AUD_SPK_L-29AUD_SPK_L+29AUD_SPK_R-29

AUD_SPK_R+29

Title


Date: Sheet of


QUEEN 15 A00

SPEAKER CONNA4


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

SPEAKER CONNA4


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

SPEAKER CONNA4


<Core Design>

SSID = AUDIO

0913 X01 Modify:Change SPK1 to 20.F0772.004 from20.F1647.004 from Double updated.0914 X01 Modify:Re-assign SPK1 pin define base on Roy updated excel file for 20.F0772.0041110 X02 Modify:

Add 2nd 20.F1804.004 on SPK1 from ME updated connector list.

1122 X02 Modify:stuff EC5801~EC5804 470pF from EMCNeo suggestion.

A00

1 2R5803 0R0402-PAD-2-GPR5803 0R0402-PAD-2-GP

1 2R5801 0R0402-PAD-2-GPR5801 0R0402-PAD-2-GP

12

EC

5801

SC

470P

50V

-2-G

PE

C58

01S

C47

0P50

V-2

-GP

1 2R5804 0R0402-PAD-2-GPR5804 0R0402-PAD-2-GP

432

15

6

SPK1

ACES-CON4-7-GP-U

20.F0772.0042nd = 20.F1804.004

SPK1

ACES-CON4-7-GP-U

20.F0772.0042nd = 20.F1804.004

12

EC

5802

SC

470P

50V

-2-G

PE

C58

02S

C47

0P50

V-2

-GP


12

EC

5803

SC

470P

50V

-2-G

PE

C58

03S

C47

0P50

V-2

-GP


12

EC

5804

SC

470P

50V

-2-G

PE

C58

04S

C47

0P50

V-2

-GP


1 2R5802 0R0402-PAD-2-GPR5802 0R0402-PAD-2-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RTC_PWR

+RTC_VCC

SPI_SOSPI_WP#

SPI_HOLD_0#

RTC_PWRRTC_PWRRTC_PWRRTC_PWR

3D3V_S5

3D3V_S5

3D3V_S5

RTC_AUX_S5

+RTC_VCC

3D3V_AUX_S5

SPI_CLK_R 21,27SPI_SO_R21,27

SPI_SI_R 21,27

SPI_CS0#_R21,27

RTC_DET# 22

Title


Date: Sheet of


QUEEN 15 A00Flash/RTC

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = Flash.ROM

Width=20mils

SSID = RBATT

SPI FLASH ROM (4M byte) for PCH

0615 Modify:Change RTC1 connector part number to 62.70001.051base on ME EMN and DXF.

0629 Modify:Change U6001 part number to 72.25320.C01 base on Sourcer provide recommand ROM list.

0701 Modify:Change RN6001 4.7K to R6003,R6004,R6005 4.7K 0402 for layout routing.

VccRTC is now connected to VccDSW3_3 through the Schottky diode instead of the 3.3V Sus well.

Notes:The total SPI interface signal between EC and PCH can¡¦t not exceed 6500mil. The mismatch between SPI signal must be within 500mil

0917 X01 Modify:EC6001 change to 10p from 4.7p anddefault stuff from Neo suggestion.

X02

X02

1111 X02 Modify:Add Q6002,R6007 fo FACTORY RTC detect function

X02 1111

A00 1224 Update RTC1

12

EC6002SC4D7P50V2CN-1GP

DYEC6002SC4D7P50V2CN-1GP

DY

12

C6003SC1U6D3V2KX-GP

C6003SC1U6D3V2KX-GP

1 2R6006

100R2J-2-GPDYR6006

100R2J-2-GPDY

12

R600710MR2J-L-GPR600710MR2J-L-GP

12

R60044K7R2J-2-GPR60044K7R2J-2-GP

12

R60034K7R2J-2-GP

R60034K7R2J-2-GP

G

S

D

Q6002

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031Q6002

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

1 2R60021KR2J-1-GPR60021KR2J-1-GP

12

EC6001SC10P50V2JN-4GP

DY EC6001SC10P50V2JN-4GP

DY


2

1

3

Q6001

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

Q6001

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

12

C6002

SCD

1U10

V2KX

-5G

P

C6002

SCD

1U10

V2KX

-5G

P

1 2R6001 33R2J-2-GPR6001 33R2J-2-GP

CS#1DO2WP#3VSS4 DI 5CLK 6HOLD# 7VCC 8

U6001

W25Q32BVSSIG-1-GP

2nd = 72.25320.C013rd = 72.25P32.C01

72.25Q32.A01

U6001

W25Q32BVSSIG-1-GP

2nd = 72.25320.C013rd = 72.25P32.C01

72.25Q32.A01

12

EC6003

SC4D

7P50

V2C

N-1

GP

DYEC6003

SC4D

7P50

V2C

N-1

GP

DY

12

R60054K7R2J-2-GPR60054K7R2J-2-GP

12

C6001

SC10

U6D

3V5K

X-1G

P

DYC6001

SC10

U6D

3V5K

X-1G

P

DY


PWR1GND2NP1NP1NP2NP2

RTC1

BAT-330DG02PSS0301CE-GP-U

62.70001.0512nd = 62.70014.0013rd = 62.70001.061

RTC1

BAT-330DG02PSS0301CE-GP-U

62.70001.0512nd = 62.70014.0013rd = 62.70001.061

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

5V_USB1_S35V_S5

5V_USB2_S3

USB_OC#8_9 18

USB_PWR_EN#27

USB_OC#0_1 18

USB2_CRT_ON#22

Title


Date: Sheet of


QUEEN&NIRVANA 15 A00

USB Power SW


<Core Design>

Title


Date: Sheet of



USB Power SW


<Core Design>

Title


Date: Sheet of



USB Power SW


<Core Design>

Support 2A

at least 80 mil

at least 80 mil

at least 160 mil

CRT Board and COMBO USB PowerSSID = USB

1122 X02 Modify:Change U6101 to dual USB power switch from singlefor Layout limitation and placement.1123 X02 Modify:Change U6101 1st(74.02182.071);2nd(74.00546.A7D);3rd(74.02062.079) from Sourcer Harrison suggestion.

1123 X02 Modify:Removed C6105,C6103.

A00 122112

C6101SCD

1U10V2KX-5G

P

C6101SCD

1U10V2KX-5G

P

12

C6103SCD

1U10V2KX-5G

P

C6103SCD

1U10V2KX-5G

P

12

TC6101ST100U6D3VAM-3-GP

80.10715.B1L2nd = 77.C1071.20L

TC6101ST100U6D3VAM-3-GP

80.10715.B1L2nd = 77.C1071.20L

12

C6104SC1U10V2KX-1GP

C6104SC1U10V2KX-1GP

12

C6102SC1U10V2KX-1GP

C6102SC1U10V2KX-1GP

GND1IN2EN1#3EN2#4 FLG2 5OUT2 6OUT1 7FLG1 8

U6101

AP2182SG-13-GP

3rd = 74.02062.079

2nd = 74.00546.A7D74.02182.071

U6101

AP2182SG-13-GP

3rd = 74.02062.079

2nd = 74.00546.A7D74.02182.071

12

TC61

02SC

10U

6D3V

5KX-

1GP

TC61

02SC

10U

6D3V

5KX-

1GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BT_ACT3D3V_S0

WLAN_ACTBLUETOOTH_EN

USB_PP3USB_PN3

BLUETOOTH_GPIO5

BDC_ON

BT_LED

USB_PP3

BLUETOOTH_DET#

WLAN_ACT

BLUETOOTH_EN

BT_ACT

USB_PN3

BLUETOOTH_GPIO3

BT_ACT

WLAN_ACTBLUETOOTH_EN

BT_LED

WLAN_WWAN_LED#

3D3V_S0

USB_PP318USB_PN318

BLUETOOTH_EN27,82WLAN_ACT82

BT_ACT82

WLAN_WWAN_LED#68,82

Title


Date: Sheet of


QUEEN 15 A00

BluetoothA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

BluetoothA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

BluetoothA3


<Core Design>


Bluetooth Module conn.

x01 change tolerant 20091118

0709 Modify:PM confirmed there is no stand-alone BT module, so DY BT1 connector, add BT enable signal and 5V_S5 power option on WLAN connector pin 51.0712 Modify:Stuff BT relatek component to verify function.

0721 Modify:Change C6301 to 78.22510.5BL follow common parts data base.0722 Modify:

Add Q6301 and combine BT_LED to WLAN_WWAN_LED#.

A00 1224 Update BT1

12

EC63

01SC

220P

50V2

KX-3

GP

DYEC

6301

SC22

0P50

V2KX

-3G

PDY

1AFTP6311AFTP63111

2

R63

0110

0KR

2J-1

-GP

DY R63

0110

0KR

2J-1

-GP

DY

12

C6301SC2D2U6D3V3MX-1-GP

DY

C6301SC2D2U6D3V3MX-1-GP

DY1 AFTP6306AFTP6306

1AFTP6312AFTP6312

1AFTP6301AFTP6301

1AFTP6307AFTP6307

1AFTP6309AFTP6309

1AFTP6308AFTP6308

1 2R6303

0R2J-2-GPDYR6303

0R2J-2-GPDY

1AFTP6310AFTP6310

1AFTP6313AFTP6313

12

R63

0210

KR2J

-3-G

P

DY R63

0210

KR2J

-3-G

P

DY

1AFTP6302AFTP6302

1AFTP6304AFTP63041AFTP6305AFTP6305

G

S

D

Q6301

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DYQ6301

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DY

15NP12

468101214NP216

1

3579

1113

BT1

HRS-CONN14D-GP-U1

DY

2nd = 20.F1500.01420.F0987.014

BT1

HRS-CONN14D-GP-U1

DY

2nd = 20.F1500.01420.F0987.014

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Biometric_USBPPBiometric_USBPN3D3V_S0

Biometric_USBPPBiometric_USBPN

Biometric_USBPP

Biometric_USBPN

3D3V_S0

USB_PP218

USB_PN218

Title


Date: Sheet of


QUEEN 15 A00

RESERVEDA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

RESERVEDA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

RESERVEDA3


<Core Design>

Finger Printer Connector

0615 Modify:Change FP1 connector part number to 20.K0320.004 base on ME EMN and DXF.0630 Modify:Change FP1 connector part number to 20.K0320.006base on ME EMN and DXF.0707 Modify:Reassign Figer print pin define base on EXCEL FILE.0713 Modify:Reassign Figer print pin define base on EXCEL FILE.Removed FP_DET# on FP1.

0707 Modify:Add FP_DET# signal on FP1 pin1.0715 Modify:Add FP_DET# signal on FP1 pin1.0806 Swap pin.0810 Change to 4 pin.0827 Change to 6 pin.

0917 X01 Modify:stuff TR6401 and un-stuff R6403,R6404at X01 stage from EMC Neo suggestion.

1123 X02 Modify:Add C6402 0.1uF,C6403 180pF and stuff C640147pF from RF fine tune result.

A00 1229

12

EC64

02SC

D1U

10V2

KX-4

GP

EC64

02SC

D1U

10V2

KX-4

GP 1

2

EC64

03SC

180P

50V2

JN-1

GP

EC64

03SC

180P

50V2

JN-1

GP

1

23456

7

8

FP1

ACES-CON6-13-GP

20.K0320.006

DN15

2nd = 20.K0382.006

FP1

ACES-CON6-13-GP

20.K0320.006

DN15

2nd = 20.K0382.006

1AFTP42 DYAFTP42 DY

12

EC64

01SC

47P5

0V2J

N-3

GP

EC64

01SC

47P5

0V2J

N-3

GP

1AFTP43 DYAFTP43 DY1AFTP44 DYAFTP44 DY

1 2R64030R2J-2-GP

DN15R6403

0R2J-2-GP

DN15

1 2R6404

0R2J-2-GPDN15

R6404

0R2J-2-GPDN15

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

RESERVEDA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

RESERVEDA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

RESERVEDA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KBC_PWRBTN#_CPOWER_SW_LED_CPOWER_SW_LED_B

POWER_SW_LED_C

POWER_SW_LED_B

FPOWER_LED_ALED_PWRPWRLED#_C

HDD_LED_ASATA_LED#_C

SATA_LED_R

WHITE_LED_BAT BAT_WHITE

BAT_AMBERAMBER_LED_BAT

AMBER_LED_BAT#WHITE_LED_BAT#

Q6804_BTP_LOCK_LED_R TP_LOCK_LED_A

Q6806_B

WLAN_LED_A WLAN_LED_R

KBC_PWRBTN#_CPOWER_SW_LED_CPOWER_SW_LED_B

KBC_PWRBTN#_C

POWER_SW_LED_BPOWER_SW_LED_C

5V_S5

5V_S5

5V_S5

5V_S0

5V_S0

5V_S0

TP_LOCK_LED#27

KBC_PWRBTN#27

PWRLED#27SATA_LED#21

BATT_WHITE_LED#27

WLAN_WWAN_LED#63,82

CHG_AMBER_LED#27

Title


Date: Sheet of


QUEEN 15 A00LED Bard/Power Button

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>


FRONT POWER LED

TPLOCK LED

WLAN_LED

SATA HDD LED(White)

NEED confirm with ME actual HDD_LED part number.

NEED confirm with ME actual FPOWER_LED part number.

Battery LED2(WHITE_LED)

Battery LED1(AMBER_LED)

WHITE

ORANGE


Need change to LOW actived from KBC GPIO





0629 Modify

0629 Modify


0706 Modify:WLAN__LED# rename to WLAN_WWAN_LED#.

0706 Modify:Add PWRBTN2 for DQ15,PWRBTN1 FOR DN15.

0706 Modify:Change FPOWER_LED part number to 83.01221.R70 base on latest EMN and DXF.

0706 Modify:Change HDD_LED part number to 83.01221.R70 base on latest EMN and DXF.

0706 Modify:Change TP_LOCK_LED part number to 83.19217.J70 base on latest EMN and DXF.

0706 Modify:Change TP_LOCK_LED1 part number to 83.19217.J70 base on latest EMN and DXF.

0706 Modify:Change WLAN_LED part number to 83.01221.R70 base on latest EMN and DXF.

0715 Modify:Removed PWR_BTN_LED# control circuit base on Dell feedback.

0923 X01 Modify:Add 2nd source 83.00110.J70 on FPOWERLED1HDDLED1,WLANLED1 from Sourcer Anya suggestion.

0923 X01 Modify:Add 2nd source 83.00110.J70 on FPOWERLED1HDDLED1,WLANLED1 from Sourcer Anya suggestion.

0923 X01 Modify:Add 2nd source 83.00327.D70 on CHARGERLED1from Sourcer Anya suggestion.

0923 X01 Modify:Add 2nd source 83.00190.Z70 on TPLOCKLED1TPLOCKLED2 from Sourcer Anya suggestion.

X02 1116

A00 20110103

A00 delete 83.01108.070

A00 1223

A00 1223

A00 1223

A00 1223

A00 1223

A00 20110103

A00 1223

A00 1229 delete Liteon for package



A00 20110103

1 AFTP6803AFTP6803

EB

C

R1

R2

Q6805

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6805

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

A KTPLED2

LED-Y-57-GP83.01921.P702nd = 83.00190.S7A

DN15TPLED2

LED-Y-57-GP83.01921.P702nd = 83.00190.S7A

DN151 2R6813

390R2J-1-GP

R6813

390R2J-1-GP

12

3

AK

WLED1

LED-W-27-GP

83.01221.R702nd = 83.00110.R70

AK

WLED1

LED-W-27-GP

83.01221.R702nd = 83.00110.R70

1

234

5

6

PWRBT1

ACES-CON4-10-GP-U

20.K0320.004

DQ15

2nd = 20.K0382.004

PWRBT1

ACES-CON4-10-GP-U

20.K0320.004

DQ15

2nd = 20.K0382.004

12 3

4RN6802

SRN15KJ-3-GP

RN6802

SRN15KJ-3-GP

EB

C

R1

R2

Q6808

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6808

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

1 2R6808 1KR2J-1-GPR6808 1KR2J-1-GP

12 EC

6803

SC22

0P50

V2KX

-3G

P

DY

EC68

03SC

220P

50V2

KX-3

GP

DY

A KTPLED1

LED-Y-57-GP83.01921.P702nd = 83.00190.S7A

DQ15TPLED1

LED-Y-57-GP83.01921.P702nd = 83.00190.S7A

DQ15

1 2R6811 1KR2J-1-GPR6811 1KR2J-1-GP

1 2R6806 390R2J-1-GPR6806 390R2J-1-GP

EB

C

R1

R2

Q6801

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6801

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

12 EC

6807

SC22

0P50

V2KX

-3G

P

DY

EC68

07SC

220P

50V2

KX-3

GP

DY

1 2R6801 390R2J-1-GPR6801 390R2J-1-GP

1 2R6803 390R2J-1-GPR6803 390R2J-1-GP

1 2R6802 100R2J-2-GPR6802 100R2J-2-GP

12 3

4RN6801

SRN15KJ-3-GP

RN6801

SRN15KJ-3-GP

EB

C

R1

R2

Q6807

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6807

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

EB

C

R1

R2

Q6804

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6804

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

1

234

5

6

PWRBT2

ACES-CON4-10-GP-U

20.K0320.004

DN15

2nd = 20.K0382.004

PWRBT2

ACES-CON4-10-GP-U

20.K0320.004

DN15

2nd = 20.K0382.004

1 2

3

A K

FPLED1

LED-W-27-GP

83.01221.R702nd = 83.00110.R70

A K

FPLED1

LED-W-27-GP

83.01221.R702nd = 83.00110.R70

1 AFTP6802AFTP6802

12EC

6811

SC22

0P50

V2KX

-3G

P

DY

EC68

11SC

220P

50V2

KX-3

GP

DY

1

23

WHITE

ORANGE

+

+-

CHLED1

LED-OW-8-GP

83.01222.X802nd = 83.00327.D70

WHITE

ORANGE

+

+-

CHLED1

LED-OW-8-GP

83.01222.X802nd = 83.00327.D70

1 AFTP6801AFTP6801

1 2R681415KR2J-1-GP

R681415KR2J-1-GP

12

EC6801

SC220P50V2KX-3GPDYEC6801

SC220P50V2KX-3GPDY

1 2R680715KR2J-1-GP

R680715KR2J-1-GP

1 2R6812 390R2J-1-GPR6812 390R2J-1-GP1

2 EC68

10SC

220P

50V2

KX-3

GP

DY

EC68

10SC

220P

50V2

KX-3

GP

DY

EB

C

R1

R2

Q6806

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6806

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

1 2R6815390R2J-1-GPR6815390R2J-1-GP

12

EC6809SC220P50V2KX-3GPDY EC6809SC220P50V2KX-3GPDY

1 2

3

A K

HDLED1

LED-W-27-GP

83.01221.R702nd = 83.00110.R70

A K

HDLED1

LED-W-27-GP

83.01221.R702nd = 83.00110.R70

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KCOL13

KCOL4

KROW7

KCOL10

KCOL3

KROW5

KCOL12

KCOL5

KCOL11

KCOL8

KROW2

KCOL0

KROW0

KCOL9

KCOL6

KROW4

KCOL2

KROW3

KCOL15

KCOL14

KCOL7

TPDATA

TP_VDDTPCLK

KROW6

KCOL1

KROW1

KCOL16

CAP_LED_R

CAP_LED_RCAP_LED_QQ6902_B

KB_LED_DET_C

KB_BL_CTR

L#

+5V_KB_BL

KB_BL_CTRL#KB_LED_DET_C

TP_VDD

CAP_LED_R

TP_VDD

5V_S0TP_VDD

3D3V_S0

CAP_LED_R

5V_S5

+5V_KB_BL5V_S0

KROW[0..7] 27

KCOL[0..16] 27

KB_DET# 21

TPCLK27TPDATA27

CAP_LED27

KB_LED_BL_DET18

KB_BL_CTRL27

Title


Date: Sheet of


QUEEN 15 A00Key Board/Touch Pad

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

SSID = Touch.Pad

Internal KeyBoard Connector

TouchPad Connector

SSID = KBC

KB Backlight Connector

0624 Modify:Removed TP LOCKED CONTROL combin with KEYBOARD Function KEY.

0630 Modify:Change TPAD1 part number to 20.K0320.006 base on ME updated EMN&DXF.0712 Modify:Change TPAD1 part number to 20.K0320.004 from 20.K0320.006.

0630 Modify:Change KB1 part number to 20.K0565.030 base on ME updated EMN and DXF.

CAP_LED:(Default HIGH actived)Connect to KB driving internal LED directly.(MAX 25mA)

0707 Modify:Change TPAD1 pin define to follow TOUCH PAD DATASHEET.0713 Modify:Change TPAD1 pin define to follow TOUCH PAD DATASHEET.

0713 Modify:Change TPAD1 power source to 3D3V_S0 from 5V_S0 base on DELL latest spec A02.

0715 Modify:Add R6908,R6909 for TPAD1 co-lay power option.


0915 X01 Modify:un-stuff R6907 and stuff R6905,Q6902,R6906for 5V drive CAP LED.

CAP LED CONTROLHigh Active from KBC GPIO.

0624 Modify:Change KB Backlight control all of related circuit component column to VOSTRO from DY.0708 Modify:R6904 change to 51K 0402 from 100ohm for KB_LED_BL_DET to PCH GPIO.updated KBLIT1 pin define base on KB DATA SHEET.

MAX 260mA

0901 X01 Modify:Change KBLIT1 to 20.K0320.004 from 20.K0218.004 base on ME updated X01 DXF&EMN.Re-assign KBLIT1 pin define sync with DQ15_NV.0914 X01 Modify:Add 2nd source 20.K0382.004 on KBLIT1 base on updated connector list.0923 X01 Modify:Change KBLIT1 part number to 20.K0589.004and re-assign pin define base on Roy updated.

0927

X02 1116

1AFTP51AFTP51

1 2R6908

0R2J-2-GPDYR6908

0R2J-2-GPDY

12

C6903SC33P50V2JN-3GP

DY C6903SC33P50V2JN-3GP

DY1

2

R6903

100K

R2J

-1-G

PDN15R6903

100K

R2J

-1-G

PDN15

1AFTP49AFTP49

G

DS

Q6901P8503BMG-GP

DN1584.P8503.0312nd = 84.03404.C31

Q6901P8503BMG-GP

DN1584.P8503.0312nd = 84.03404.C31

12


1AFTP75AFTP75

1AFTP52AFTP52

1 2R6904

51KR2J-1-GPDN15

R6904

51KR2J-1-GPDN15

1 2R6909

0R2J-2-GP

R6909

0R2J-2-GP

1AFTP57AFTP57

1

23456789101112131415161718192021222324252627282930

31

32

KB1

JAE-CON30-7-GP

20.K0565.0302nd = 20.K0592.030

KB1

JAE-CON30-7-GP

20.K0565.0302nd = 20.K0592.030

1

234

5

6TPAD1

ACES-CON4-10-GP-U

20.K0320.0042nd = 20.K0382.004

TPAD1

ACES-CON4-10-GP-U

20.K0320.0042nd = 20.K0382.004

1AFTP50AFTP50

1 2F6901

FUSE-D5A6V-2-GPDY

F6901

FUSE-D5A6V-2-GPDY

1 234


1AFTP47AFTP47

1 AFTP45AFTP45

1AFTP65AFTP65

1AFTP54AFTP54

1AFTP68AFTP68

1AFTP60AFTP60

1AFTP72AFTP72

12


DN15


DN15

1AFTP59AFTP59

1AFTP48AFTP48

1

2346

5KBLIT1

ACES-CON4-34-GP

20.K0589.004

DN15

2nd = 20.K0613.004

KBLIT1

ACES-CON4-34-GP

20.K0589.004

DN15

2nd = 20.K0613.0041

AFTP82AFTP82

1AFTP73AFTP73

1AFTP46AFTP46

1 2R6906 1KR2J-1-GPR6906 1KR2J-1-GP

1 2 R69020R2J-2-GP

DN15

R69020R2J-2-GP

DN15

1AFTP71AFTP71

1AFTP62AFTP62

12

C6902SC33P50V2JN-3GP

DYC6902SC33P50V2JN-3GP

DY

EB

C

R1

R2

Q6902

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

R1

R2

Q6902

PDTA143ET-GP

84.00143.M112nd = 84.02143.0113rd = 84.00143.N11

1AFTP56AFTP56

1 2R6907 100R2J-2-GPDYR6907 100R2J-2-GPDY

1AFTP61AFTP61

1AFTP66AFTP66

1AFTP58AFTP58

1AFTP77AFTP77

1AFTP53AFTP53

12

R6901100KR2J-1-GP

DN15

R6901100KR2J-1-GP

DN15

1AFTP67AFTP67

1AFTP70AFTP70

1AFTP78AFTP78

1AFTP55AFTP55

1AFTP64AFTP64

1 2R6905

15KR2J-1-GP

R6905

15KR2J-1-GP

1AFTP74AFTP74

12

C6906SCD

1U10V2KX-5G

P

DYC6906SC

D1U

10V2KX-5GP

DY

1AFTP63AFTP63

1AFTP76AFTP76

1AFTP69AFTP69

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LID_CLOSE#3D3V_S5

3D3V_S5

LID_CLOSE# 27

Title


Date: Sheet of


QUEEN 15 A00Hall Sensor

A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

0729

0804 swap

1110 X02 Modify:Add 2nd 20.F0962.010 on HALL1 from ME updated connector list.

1

23456

789

10

11

12

13

14

15

16

NP

1N

P2

HALL1

TCN-CONN10C-GP

20.F1655.010

2nd = 20.F0962.010

HALL1

TCN-CONN10C-GP

20.F1655.010

2nd = 20.F0962.0101

AFTP84 AFTE14P-GPAFTP84 AFTE14P-GP

1

AFTP85

AFTE14P-GP

AFTP85

AFTE14P-GP1AFTP83 AFTE14P-GPAFTP83 AFTE14P-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3D3V_S0

PLT_RST#5,18,27,75,82,83LPC_FRAME#21,27

LPC_AD021,27LPC_AD121,27LPC_AD221,27LPC_AD321,27

CLK_PCI_LPC18

Title


Date: Sheet of


QUEEN 15 A00

Dubug connectorA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Dubug connectorA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Dubug connectorA3


<Core Design>

A00 1229 DB1 change to ZZ.00PAD.Y41(solder kmask type) and keep un-stuffat X-Build stage

111

23456789

1012

DB1

PAD-10P-177042-GP

ZZ.00PAD.Y41

DY

DB1

PAD-10P-177042-GP

ZZ.00PAD.Y41

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SP2

SP4

SP9

SP12

SP5

SP14

SP6

SP1

SP13

SP7

SP3

SP10

XD_D7

SP8

SP11

XD_CD#

3D3V_CARD_S0

3D3V_CARD_S0

SP632SP132

SP332SP432

SP532SP732

SP1432

SP832

SP1232SP932

SP832

SP232

SP932

SP532

SP1032

SP132

SP1132

SP1232SP1332

XD_CD# 32SP1 32SP2 32SP3 32SP4 32SP5 32SP6 32SP7 32

SP8 32SP9 32SP10 32SP11 32SP12 32SP13 32SP14 32XD_D7 32

Title


Date: Sheet of


QUEEN 15 A00

SD/XD/MS/MMC Card CONNA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

SSID = SDIO

SD/XD/MS/MMC+ Card ReaderClose to CARD1

For EMI Reserved

0906 X01 Modify:Change CARD1 to 20.I0129.001 from 62.10051.931from ME double updated latest DXF&EMN on X01.

1119 X02 Modify:Add 2nd 20.I0135.001 on HALL1 from ME updated connector list.

12 EC

7407

SC22

0P50

V2KX

-3G

P

DY

EC74

07SC

220P

50V2

KX-3

GP

DY

12

C74

03SC

D01

U16

V2KX

-3G

PC

7403

SCD

01U

16V2

KX-3

GP

12 EC

7417

SC22

0P50

V2KX

-3G

P

DY

EC74

17SC

220P

50V2

KX-3

GP

DY

12 EC

7408

SC22

0P50

V2KX

-3G

P

DY

EC74

08SC

220P

50V2

KX-3

GP

DY

12 C

7402

SCD

1U10

V2KX

-5G

P

DY C74

02SC

D1U

10V2

KX-5

GP

DY

12 EC

7405

SC22

0P50

V2KX

-3G

P

DY

EC74

05SC

220P

50V2

KX-3

GP

DY

12 EC

7416

SC22

0P50

V2KX

-3G

P

DY

EC74

16SC

220P

50V2

KX-3

GP

DY

12 EC

7410

SC22

0P50

V2KX

-3G

P

DY

EC74

10SC

220P

50V2

KX-3

GP

DY

12

C74

05

SC10

U6D

3V5M

X-3G

P

DY C74

05

SC10

U6D

3V5M

X-3G

P

DY

12

C74

04SC

2D2U

6D3V

3MX-

1-G

PC

7404

SC2D

2U6D

3V3M

X-1-

GP

SD_CDP1SD_WPP2

SD_DAT1P3

MMC_DATA7P5

MS_GND P6

SD_GND P7

MMC_DATA6P8

MS_BSP9

SD_CLKP10

MS_DATA1P11

SD_VCCP13

MS_DATA2P14

SD_GND P15

MS_INSP16

MMC_DATA5P17

MS_DATA3P18

SD_CMDP19

MS_SCLKP20

MMC_DATA4P21

MS_VCCP22

SD_DATA3P23

MS_GND P24

SD_DAT2P25

SD_WP_COM/SDIO_GND P26SD_CD_COM/SDIO_GND P27

XD_CD 1XD_R/B 2XD_RE 3XD_CE 4

XD_CLE 5XD_ALE 6XD_WE 7

XD_WP_IN 8

XD_GND 9

XD_D0 10XD_D1 11XD_D2 12XD_D3 13XD_D4 14XD_D5 15XD_D6 16XD_D7 17

XD_VCC18

XD_GND 19

SD_DAT0P4

MS_DATA0P12

NP1 NP1NP2 NP2

CARD1

CARD-PUSH-46P-1-GP-U

20.I0129.0012nd = 20.I0135.001

CARD1

CARD-PUSH-46P-1-GP-U

20.I0129.0012nd = 20.I0135.001

12 EC

7409

SC22

0P50

V2KX

-3G

P

DY

EC74

09SC

220P

50V2

KX-3

GP

DY

12 EC

7413

SC22

0P50

V2KX

-3G

P

DY

EC74

13SC

220P

50V2

KX-3

GP

DY

12 EC

7411

SC22

0P50

V2KX

-3G

P

DY

EC74

11SC

220P

50V2

KX-3

GP

DY

12 EC

7403

SC22

0P50

V2KX

-3G

P

DY

EC74

03SC

220P

50V2

KX-3

GP

DY1

2 EC74

14SC

220P

50V2

KX-3

GP

DYEC

7414

SC22

0P50

V2KX

-3G

P

DY

12 EC

7404

SC22

0P50

V2KX

-3G

P

DY

EC74

04SC

220P

50V2

KX-3

GP

DY

12 EC

7415

SC22

0P50

V2KX

-3G

P

DY

EC74

15SC

220P

50V2

KX-3

GP

DY

12 EC

7406

SC22

0P50

V2KX

-3G

P

DY

EC74

06SC

220P

50V2

KX-3

GP

DY

12 EC

7402

SC22

0P50

V2KX

-3G

P

DY

EC74

02SC

220P

50V2

KX-3

GP

DY

12 C

7401

SCD

1U10

V2KX

-5G

P

DY C74

01SC

D1U

10V2

KX-5

GP

DY

12 EC

7412

SC22

0P50

V2KX

-3G

P

DY

EC74

12SC

220P

50V2

KX-3

GP

DY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1D5V_S0

PCIE_WAKE#_CON

USB_PP13_RUSB_PN13_R

3D3V_S0

PM_SLP_S4#PM_SLP_S3#

CLK_PCIE_NEW_CCLK_PCIE_NEW#_C

3D3V_S5

PLT_RST#

SMB_DATASMB_CLKCLK_PCIE_NEW_REQ#_CON

PCIE_TXN8_CONPCIE_TXP8_CON

PCIE_RXP8_CONPCIE_RXN8_CON

PCIE_TXP8_CON

CLK_PCIE_NEW_REQ#_CON

PCIE_TXN8_CON

SMB_CLKSMB_DATA

PM_SLP_S3#PM_SLP_S4#

USB_PP13_RUSB_PN13_R

CLK_PCIE_NEW_CCLK_PCIE_NEW#_C

PCIE_RXN8_CONPCIE_RXP8_CON

PLT_RST#

PCIE_WAKE#_CON

PCIE_RXP8PCIE_RXN8

CLK_PCIE_NEW_REQ#PCIE_WAKE#

CLK_PCIE_NEW#_CCLK_PCIE_NEW_C PCIE_TXN8_CON

PCIE_TXP8_CON

USB_PP13_R

USB_PN13_R

3D3V_S5

1D5V_S0

3D3V_S0

PM_SLP_S3#19,27,36,37,47PM_SLP_S4#19,27,46

PCIE_WAKE#27,82

CLK_PCIE_NEW#20CLK_PCIE_NEW20

PCIE_RXN820

PCIE_TXP820

PCIE_TXN820

PCIE_RXP820

CLK_PCIE_NEW_REQ#20

SMB_DATA20SMB_CLK20

PLT_RST#5,18,27,71,82,83

USB_PN1318

USB_PP1318

Title


Date: Sheet of


QUEEN 15 A00

Express CardA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Express CardA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Express CardA3


<Core Design>

0913 X01 Modify:Rename NEW1 pin24,25 to USB_PP13_R&USB_PN13_R.Rename NEW1 pin8,9 to CLK_PCIE_NEW_C&CLK_PCIE_NEW#_C

0824 X01 Modify:Due to our NEW1 change to Express card to bottom side so re-assign NEW1 pin define same as DQ15-NV.0906 X01 Modify:Add 2nd source 20.K0382.026 on NEW1 base on updated connector list.

SB-25

1D5V_S0_CARD Max. 650mA, Average 500mA.3D3V_S0_CARD Max. 1300mA, Average 1000mA3D3V_S5_CARDAUX Max. 275mA

For EMI

0913 X01 Modify:Add R7503,R7504 and reserved EC7501,EC7502 on CLK_PCIE_NEW &CLK_PCIE_NEW# for EMC suggestion.0921 X01 Modify:Add R7505~R7508 0ohm and reserved EC7503~EC7506on PCIE_TX8&RX8 signal base on EMC Lance suggestion.Add R7509,R7510 0ohm and reserved EC7507,EC7508on CLK_PCIE_NEW_REQ#&PCIE_WAKE# signal baseon EMC Lance suggestion.

1122 X02 Modify:Change TR7501 CM choke to 69.10103.041 and un-stuff R7501,R7502 from EMC Neo Suggestion.Change R7501,R7502 to 0603 from 0402.

A00 1229

1AFTP108AFTE14P-GP AFTP108AFTE14P-GP


12

EC7505


SC4D7P50V2CN-1GPDY

1 2R7505 0R2J-2-GP

DN15R7505 0R2J-2-GP

DN15

1 2R7510 0R2J-2-GP

DN15R7510 0R2J-2-GP

DN15


1 2R7508 0R2J-2-GP

DN15R7508 0R2J-2-GP

DN15


1

23456789

1011121314151617181920212223242526

27

28

NEW1

ACES-CON26-6GP-U

20.K0320.026

DN15

2nd = 20.K0382.026

NEW1

ACES-CON26-6GP-U

20.K0320.026

DN15

2nd = 20.K0382.026


1 2R7504 0R2J-2-GP

DN15R7504 0R2J-2-GP

DN15

12

3 4

TR7501

FILTER-4P-6-GP

69.10103.041

DN15

2nd = 69.10084.071

TR7501

FILTER-4P-6-GP

69.10103.041

DN15

2nd = 69.10084.071

1AFTP119AFTE14P-GP AFTP119AFTE14P-GP1AFTP118AFTE14P-GP AFTP118AFTE14P-GP




1 2R7506 0R2J-2-GP

DN15R7506 0R2J-2-GP

DN15

12

EC7501


SC4D7P50V2CN-1GPDY1AFTP117AFTE14P-GP AFTP117AFTE14P-GP 1

2

EC7504

SC4D7P50V2CN-1GPDY

EC7504

SC4D7P50V2CN-1GPDY

12

EC7502

SC4D7P50V2CN-1GPDY

EC7502

SC4D7P50V2CN-1GPDY

1 2R7509 0R2J-2-GP

DN15R7509 0R2J-2-GP

DN15


1 2R7507 0R2J-2-GP

DN15R7507 0R2J-2-GP

DN151 2

R7503 0R2J-2-GPDN15

R7503 0R2J-2-GPDN15





12

EC7503


SC4D7P50V2CN-1GPDY


12

EC7507


SC4D7P50V2CN-1GPDY1AFTP116AFTE14P-GP AFTP116AFTE14P-GP

12

EC7508

SC4D7P50V2CN-1GPDY

EC7508

SC4D7P50V2CN-1GPDY

12

EC7506

SC4D7P50V2CN-1GPDY

EC7506

SC4D7P50V2CN-1GPDY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FFS_INT2_R

FALL_INT2

HDD_FALL_SDO

HDD_FALL_INT1PCH_SMBCLK

PCH_SMBDATA

5V_S03D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

FFS_INT2 56

FFS_INT2_R 18

PCH_SMBDATA14,15,20,82

HDD_FALL_INT1 18

PCH_SMBCLK14,15,20,82

Title


Date: Sheet of


QUEEN 15 A00

Free Fall Sensor A3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Free Fall Sensor A3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Free Fall Sensor A3


<Core Design>

Note(1) Keep all signals are the same trace width. (included VDD, GND).(2) No VIA under IC bottom.


Free Fall SensorNote- no via, trace, under the sensor (keep out area around 2mm)- stay away from the screw hole or metal shield soldering joints- design PCB pad based on our sensor LGA pad size (add 0.1mm)- solder stencil opening to 90% of the PCB pad size- mount the sensor near the center of mass of the NB as possible as you can

09/0422(#1) Just pull +3.3V_RUN ~ Ref. Rothschild(#2) FAE/ DY is ok, chip internal pull-up resistors(#3) From spec, Slave ADdress(SAD) is 001110xb Pull HIGH SAD is 0011101b Pull GND SAD is 0011100b

0701 Modify:Change G-SENSOR U7901 back to DE351DLTR8.0705 Modify:Change DUMMY column to:MAIN source->ADI solution.second source->ST solution.

0706 Modify:R2220 and R7904 double PH.

0802

12


12

R7903100KR2J-1-GPDY R7903100KR2J-1-GPDY

1234 5 6

Q79012N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

DYQ7901

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

DY

12

R790610KR2J-3-GP

DY R790610KR2J-3-GP

DY

SCL/SPC14

SDA/SDI/SDO13

SDO12

CS7

RESERVED#33

VD

D6

VD

D_I

O1

INT1 8

INT2 9

GND 2GND 4GND 5GND 10RESERVED#1111

U7901

DE351DLTR8-GP

74.00351.0B3

DY

U7901

DE351DLTR8-GP

74.00351.0B3

DY

1 2R7901

100KR2J-1-GPDY

R7901

100KR2J-1-GPDY

12


12

C7901SC10U6D3V5MX-3GP

DYC7901SC10U6D3V5MX-3GP

DY

12

C7902SCD1U10V2KX-4GPDY C7902SCD1U10V2KX-4GPDY

1 2R79050R2J-2-GPDYR79050R2J-2-GPDY

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

ReservedA3


<Core Design>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CRT_REDCRT_GREEN

CRT_DDC_DATACRT_DDC_CLK

CRT_BLUE

MEDIA1_2MEDIA1_3

MEDIA1_1

MEDIA1_2MEDIA1_1

MEDIA1_35V_S5

DATA_RECOVERY#INSTANT_ON#

MEDIA_BTN3#

CRT_VSYNC_CONCRT_HSYNC_CON

CRT_DDC_DATACRT_DDC_CLK

CRT_GREEN

CRT_BLUE

CRT_RED

MEDIA_LED1#MEDIA_LED2#MEDIA_LED3#

MEDIA_LED1#MEDIA_LED2#MEDIA_LED3#

CRT_VSYNC_CONCRT_HSYNC_CON

5V_S5

5V_CRT_S0_R 5V_CRT_S0 5V_S0

5V_S53D3V_S5

AD+AD+

3D3V_S0

5V_CRT_S0_R

5V_S5

AUD_AGND

3D3V_S5

3D3V_S0

1D5V_S05V_S5

5V_USB2_S3

3D3V_S5

CRT_GREEN17CRT_BLUE17

CRT_RED17

CRT_DDC_CLK17CRT_DDC_DATA17

MEDIA_LED1# 27

INSTANT_ON# 27DATA_RECOVERY# 27MEDIA_BTN3# 27

PSID_EC27RCID27

USB_PP118USB_PN118


PCIE_RXP320PCIE_RXN320

PCIE_TXN220

PCIE_RXP220

PCIE_TXP220

PCIE_RXN220


PCIE_TXP420PCIE_TXN420

PCIE_TXN520


PCIE_TXP520

PCH_SMBCLK14,15,20,79PCH_SMBDATA14,15,20,79

USB_PP1118USB_PN1118

USB_PP418USB_PN418

WLAN_ACT63USB3_PEGB_CLKREQ#20

CLK_PCIE_WWAN_REQ#20

PCIE_CLK_LAN_REQ#20

USB30_SMI#18

CLK_PCIE_WLAN# 20CLK_PCIE_WLAN 20

CLK_PCIE_WWAN# 20CLK_PCIE_WWAN 20

WLAN_WWAN_LED# 63,68PM_LAN_ENABLE 27PLT_RST# 5,18,27,71,75,83

BT_ACT 63

CLK_PCIE_USB3# 20CLK_PCIE_USB3 20

3G_EN 22

E51_TXD 27E51_RXD 27WIFI_RF_EN 27

CLK_PCIE_WLAN_REQ# 20

PCIE_WAKE# 27,75BLUETOOTH_EN 27,63

CLK_PCIE_LAN 20CLK_PCIE_LAN# 20

AUD_HP1_JD# 29EXT_MIC_JD# 29MIC_IN_L 29MIC_IN_R 29

AUD_HP1_JACK_R2 29AUD_HP1_JACK_L2 29

USB3_PWR_ON27

CRT_HSYNC17CRT_VSYNC17

MEDIA_LED2# 27MEDIA_LED3# 27

Title


Date: Sheet of


QUEEN 15 A00

IO Board ConnectorA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

0625 Modify:Change CRTBD1 part number to 20.F0957.030 from 20.F1521.030 base on EMN updated part number.0720 Modify:Change CRTBD1 connector to 20.F1121.040 from 30pin base on ME Double provide final solution.0721 Modify:re-assign CRTBD1 pin define to follow Joseph release PIN define.

0810

High active

0814

0913 X01 Modify:Change R8201~R8203 to 470ohm from 100ohm.Add RN8209 PH 5V_S5 on MEDIA_LED1~3# forPWM OD mode.

CRT Board Connector0906 X01 Modify:Add 2nd source 20.F0085.040 on CRTBD1 base on updated connector list.0915 X01 Modify:Re-assign CRTBD1 pin define base on EMC suggestion.

IO Board CONN 80 pin

0916 X01 Modify:Keep original X00 IOBD1 pin define.0917 X01 Modify:Change IOBD1 part number to 20.F1849.080base on Double updated latest DXF&EMN.0920 X01 Modify:Re-assign IOBD1 pin define due to updated connector pin define is different as before.Add R8206,R8207 to isolated AGND and DGND.

1110 X02 Modify:Add 2nd 20.K0465.008 on MEDIA1 from ME updated connector list.1112 X02 Modify:change Media resistor from 430 ohm to 1K on both DQ/DN15(R8201, R8202, R8203)for Media button LED light spot issue

X02 1116

1112 X02 Modify:Dell required us to disable PCIE port of WWAN slot,If PCIE port 1 is disabled, it will cause all PCIE port disabled,so change WWAN to PCIE port 3 from port1at ST stage.

1122 X02 Modify:stuff EC8201,EC8202 0.1u(closed H3) between GND and GND from EMC Neo suggestion.stuff EC8206 between 3D3V_S5 and GND fromEMC Neo suggestion.

X02 1122

1119 X02 Modify:Reserved EC8203~EC8205 470p on all of MEDIA_LED# signal from EMC Neo suggestion.

A00 12241120 X02 Modify:Add RN8205 base on HSYNC&VSYNC report.

1120 X02 Modify:Reserved R8211,R8212 0ohm 0805 on CRTBD1pin37,39 to separate EATA and CRT USB power in ST build.

1122 X02 Modify:Swap RN8205 pin4,3 and pin2,1 each other base on Connie swap report.

1123 X02 Modify:Removed R8211,R8212 and connect 5V_USB2_S3 to CRTBD1 pin 37 directly.


A00

A00

A00

A00 1224

A00 1229

A00 0103 add 3rd T-conn(20.F1932.040) at XBuild batch run

1 2R8211

0R3J-0-U-GPDY

R8211

0R3J-0-U-GPDY

2 1

D8201

CH551H-30PT-GP2ND = 83.R5003.H8H3rd = 83.5R003.08F83.R5003.C8F

D8201

CH551H-30PT-GP2ND = 83.R5003.H8H3rd = 83.5R003.08F83.R5003.C8F


1AFTP8203AFTP82031AFTP8204AFTP8204

1 2R8205 10KR2J-3-GPDYR8205 10KR2J-3-GPDY1 2R8208 10KR2J-3-GPDYR8208 10KR2J-3-GPDY

1AFTP8206AFTP8206

12

EC8201

SCD

1U50V3KX-G

PEC

8201SC

D1U

50V3KX-GP

1AFTP8205AFTP8205

12

EC8202

SCD

1U50V3KX-G

PEC

8202SC

D1U

50V3KX-GP

1 2

F8201FUSE-1D1A6V-4GP-U69.50007.6912nd = 69.50007.771

F8201FUSE-1D1A6V-4GP-U69.50007.6912nd = 69.50007.771

1AFTP8207AFTP8207

1 2R82060R0603-PAD-2-GP

R82060R0603-PAD-2-GP

1AFTP8202AFTP8202

1

357911131517192123252729

2

468

1012141618202224262830

31333537394143454749515355575961636567697173757779

32343638404244464850525456586062646668707274767880

NP1

NP281

82

IOBD1

ACES-CONN80D-1-GP

20.F1849.0802nd = 20.F1908.080

IOBD1

ACES-CONN80D-1-GP

20.F1849.0802nd = 20.F1908.080

1 2R82070R0603-PAD-2-GP

R82070R0603-PAD-2-GP

1

3579111315171921232527293133353739

42

2

468

10121416182022242628303234363840

4143

44

45

46

NP

1N

P2

CRTBD1

ACES-CONN40D-GP

20.F1121.0402nd = 20.F0085.0403rd = 20.F1932.040

CRTBD1

ACES-CONN40D-GP

20.F1121.0402nd = 20.F0085.0403rd = 20.F1932.040

1 2EC8203 SC470P50V-2-GPEC8203 SC470P50V-2-GP1 2EC8204 SC470P50V-2-GPEC8204 SC470P50V-2-GP

12

EC8206

SCD

1U50V3KX-G

PEC

8206SC

D1U

50V3KX-GP

1

2345678

9

10

MEDIA1

ACES-CON8-19-GP

20.K0320.0082nd = 20.K0465.008

MEDIA1

ACES-CON8-19-GP

20.K0320.0082nd = 20.K0465.008

1 2R82011KR2J-1-GP

R82011KR2J-1-GP1

2 34


1 2EC8205 SC470P50V-2-GPEC8205 SC470P50V-2-GP

12 3

4RN8205

SRN22-3-GP

RN8205

SRN22-3-GP

1AFTP8201AFTP8201

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEX_TESTMODE

PEX_TERMP

STRAP_3V3STRAP_MIOB

HDCP_CLK

HDCP_SDA

GPU_ROM_CS#

GPU_ROM_SOGPU_ROM_SI

GPU_ROM_SCLK

GPU_ROM_SOGPU_ROM_SCLK

GPU_ROM_SISTRAP0

STRAP2STRAP1

VIO_PLLVDD

XTALSSIN

XTALOUT

XTALOUTBUFF

CEC

PEX_RST#PLT_RST#

NV_PEG_CLKREQ#

XTALOUT_R

XTALIN

PEX_RST#

HDCP_CLKHDCP_SDA

PEX_PLLVDD

PEG_RXP2PEG_RXN2

PEG_RXP14

PEG_RXN11

PEG_RXN13

PEG_RXP15

PEG_RXP12

PEG_RXN15

PEG_RXP13

PEG_RXP11

PEG_RXN12

PEG_RXN14

PEG_C_RXP12PEG_C_RXN12


PEG_TXP9PEG_TXN9


PEG_TXP4PEG_TXN4

PEG_RXN8

PEG_RXP9PEG_RXN9

PEG_RXP8

PEG_RXP10PEG_RXN10

PEG_TXP15PEG_TXN15

PEG_TXP14PEG_TXN14

PEG_TXP13PEG_TXN13


PEG_TXP12PEG_TXN12


PEG_TXP11PEG_TXN11

PEG_C_RXP15

PEG_TXP5PEG_TXN5

PEG_TXP10PEG_TXN10


PEG_TXP0PEG_TXN0


PEG_C_RXN15


PEG_TXP6PEG_TXN6

PEG_TXN1PEG_TXP1





PEG_TXP7PEG_TXN7

PEG_TXP2PEG_TXN2

PEG_RXN7PEG_RXP7

PEG_RXP6PEG_RXN6



PEG_RXP5PEG_RXN5

PEG_TXP8PEG_TXN8


PEG_TXP3PEG_TXN3

PEG_RXP4PEG_RXN4

PEG_RXP3PEG_RXN3

PEG_RXP0PEG_RXN0

PEG_RXP1PEG_RXN1

STRAP0STRAP1STRAP2

PEXTSTCLK_OUTPEXTSTCLK_OUT#

NV_PEG_CLKREQ#

1V_VGA_S0

1V_VGA_S0

3D3V_VGA_S03D3V_VGA_S0

3D3V_S5

3D3V_VGA_S0

1V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0 3D3V_VGA_S0

3D3V_VGA_S0

1V_VGA_S0

CLK_PCIE_VGA20CLK_PCIE_VGA#20

DGPU_HOLD_RST#18

PLT_RST#5,18,27,71,75,82

PEG_RXP[0..15]4PEG_RXN[0..15]4

PEG_TXP[0..15]4PEG_TXN[0..15]4

VGA_SENSE 92

GND_SENSE 92

CLK_27M_VGA20

PEG_CLKREQ# 20

DGPU_PWROK22,92,93

PEX_RST# 51,85,86

Title


Date: Sheet of


A00N12P(1/6)_PEG

A2

83 108Tuesday, January 04, 2011QUEEN 15

<Variant Name>

Title


Date: Sheet of


A00N12P(1/6)_PEG

A2


<Variant Name>

Title


Date: Sheet of


A00N12P(1/6)_PEG

A2


<Variant Name>

Logical Strap Bit MappingResistor Pull-up Pull-down 5Kohms 1000 0000 10Kohms 1001 0001 15Kohms 1010 0010 20Kohms 1011 0011 25Kohms 1100 0100 30Kohms 1101 0101 35Kohms 1110 0110 45Kohms 1111 0111

USER[0]=1USER[1]=1USER[2]=1USER[3]=1

3GIO_PADCFG[0]=03GIO_PADCFG[1]=13GIO_PADCFG[2]=13GIO_PADCFG[3]=0

PCI_DEVID[0]=0PCI_DEVID[1]=0PCI_DEVID[2]=1PCI_DEVID[3]=0

VGA_DEVICE =1SMB_ALT_ADDR =0FB_0_BAR_SIZE =0XCLK_417 =0

for Samsung VRAM(64Mx16) (0x3)RAM_CFG[0]=1RAM_CFG[1]=1RAM_CFG[2]=0RAM_CFG[3]=0

PEX_PLL_EN_TERM =0SLOT_CLK_CFG =1SUB_VENDOR =0PCI_DEVID[4] =1

GPU_ROM_SI

GPU_ROM_SO

GPU_ROM_SCLK

STRAP0

STRAP1

STRAP2

for Hynix VRAM(64Mx16) (0x2)RAM_CFG[0]=0RAM_CFG[1]=1RAM_CFG[2]=0RAM_CFG[3]=0

Near BALLS Near BGA

N12P-GE N12P-GV1 N12M-GE N11P-GE N11P-GS[0] 1 1 TBD 1 0[1] 0 1 0 0[2] 1 1 0 0[3] 0 0 0 0

Need check panel resolution1366x768

GPU_ROM_SCLK: DIS_DID_HN12P-GE PH = 15K(64.15025.6DL), PL = NCN12P-GV1 PH = 15K(64.15025.6DL), PL = NCN12M-GE PH = TBD, PL = TBDN11P-GE-A1 PH = 15K(64.15025.6DL), PL = NCN11P-GS-A1 PH = 15K(64.15025.6DL), PL = NC

STRAP 2: DIS_DID_LN12P-GE PH = NC, PL = 30K(64.30025.6DL)N12P-GV1 PH = NC, PL = 15K(64.15025.6DL)N12M-GE PH = TBD, PL = TBDN11P-GE-A1 PH = TBD, PL = 10KN11P-GS-A1 PH= NC, PL = 4.99K

Near BALLS

Near BALLS Near BGA

Stuff PD on XTAL_SSIN andXTAL_OUTBUFF when EXT_SS is notused.

STRAPPING MODE TABLE

PIN NAME MULTI-LEVEL BINARY PRODUCTION BINARY BRINGUP

MULTI_STRAP_REF1_GND

MULTI_STRAP_REF0_GND

40.2K TO GND

40.2K TO GND

40.2K TO GND

NC

NC

NC

for Hynix VRAM(128Mx16) (0x6)RAM_CFG[0]=0RAM_CFG[1]=1RAM_CFG[2]=1RAM_CFG[3]=0

for Samsung VRAM(128Mx16) (0x7)RAM_CFG[0]=1RAM_CFG[1]=1RAM_CFG[2]=1RAM_CFG[3]=0

Notebook configure.

N12P-GE N12P-GV1 N12M-GE N11P-GE N11P-GS[4] 1 1 TBD 1 1

GPU_ROM_SIHynix 64x16 = PL 15KSamsung 64x16 = PL 20K

120mA

150mA

Near BALLS

0723

0723

0728

0728

0728

0901

0xDF5

0818De-cap

0818De-cap

0818De-cap

0818De-cap

0927

1009

X02 11/29

A00A00

1 2 C8306 SCD1U10V2KX-5GPOptimus C8306 SCD1U10V2KX-5GPOptimus

1 2 R830530KR2F-GP

DIS_DID_L

R830530KR2F-GP

DIS_DID_L

12

C8355

SC10U

6D3V3M

X-GP

Optimus

C8355

SC10U

6D3V3M

X-GP

Optimus

12

C8352SC1U

6D3V2KX-G

P

Optimus

C8352SC1U

6D3V2KX-G

P

Optimus1

2

C8357SC1U

6D3V2KX-G

P

Optimus

C8357SC1U

6D3V2KX-G

P

Optimus

12

R830340K2R2F-GP

Optimus

R830340K2R2F-GP

Optimus

12

C8344SCD

1U10V2KX-5G

P

DYC8344SC

D1U

10V2KX-5GP

DY




12

C8349SC1U

6D3V2KX-G

P

Optimus

C8349SC1U

6D3V2KX-G

P

Optimus


1 2 R832634K8R2F-1-GPDYR832634K8R2F-1-GPDY



12

C8351SCD

1U10V2KX-5G

P

Optimus

C8351SCD

1U10V2KX-5G

P

Optimus



1 2R8315 200R2F-L-GPDYR8315 200R2F-L-GPDY


12

C8362SC4D

7U6D

3V3KX-GP

Optimus

C8362SC4D

7U6D

3V3KX-GP

Optimus

12

R831310KR2J-3-GP

Optimus

R831310KR2J-3-GP

Optimus

1 2R8323

0R0402-PAD-2-GP

Optumus

R83230R0402-PAD-2-GP

Optumus

1 2 R83252KR2J-1-GPDY

R83252KR2J-1-GPDY

G

S

D

PQ83092N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DYPQ83092N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DY

12

R830610KR2J-3-GPOptimus


1 2 R831215KR2F-GPDIS_SAM_HYX

R831215KR2F-GPDIS_SAM_HYX


12

C8334SCD

1U10V2KX-5G

P

DYC8334SC

D1U

10V2KX-5GP

DY



1 234

RN8301SRN4K7J-8-GP Optimus

RN8301SRN4K7J-8-GP Optimus

12

R83012K49R2F-GPOptimus


12

C8345SCD

1U10V2KX-4G

P

Optimus

C8345SCD

1U10V2KX-4G

P

Optimus

1 2 R830745K3R2F-L-GPOptimusR830745K3R2F-L-GPOptimus


1 2

L8303

EBMS160808A121-GP

Optimus

2ND = 68.00119.10168.00375.101

L8303

EBMS160808A121-GP

Optimus

2ND = 68.00119.10168.00375.101

1 2 R831015KR2F-GPDIS_DID_H

R831015KR2F-GPDIS_DID_H


12

C8348

SC10U

6D3V3M

X-GP

Optimus

C8348

SC10U

6D3V3M

X-GP

Optimus

1 2 C8301 SCD1U10V2KX-5GPOptimus C8301 SCD1U10V2KX-5GPOptimus1 2 C8303 SCD1U10V2KX-5GPOptimus C8303 SCD1U10V2KX-5GPOptimus

12

C8364SC4D

7U6D

3V3KX-GP

Optimus

C8364SC4D

7U6D

3V3KX-GP

Optimus

12

R831810KR2J-3-GP

Optimus

R831810KR2J-3-GP

Optimus

12

R83201MR2F-GPR83201MR2F-GP

12

C8360SCD

1U10V2KX-4G

P

DYC8360SC

D1U

10V2KX-4GP

DY

12

C8350SC4D

7U6D

3V3KX-GP

DYC8350SC

4D7U

6D3V3KX-G

P

DY

12

C8343SCD

1U10V2KX-4G

P

Optimus

C8343SCD

1U10V2KX-4G

P

Optimus

1 2 R831610KR2F-2-GPOptimus

R831610KR2F-2-GPOptimus


12

C8330SCD

1U10V2KX-5G

P

DYC8330SC

D1U

10V2KX-5GP

DY

1 2 R831115KR2F-GPDY

R831115KR2F-GPDY

12

C8361SC10U

6D3V5KX-1G

P

Optimus

C8361SC10U

6D3V5KX-1G

P

Optimus

1 2R8322

0R2J-2-GP

DYR8322

0R2J-2-GP

DY


1 2R8302

0R2J-2-GPDYR8302

0R2J-2-GPDY

B1

A2

GND3 Y 4

VCC 5

U8301

74LVC1G08GW-1-GP73.01G08.L04

2nd = 73.7SZ08.DAH

DY

U8301

74LVC1G08GW-1-GP73.01G08.L04

2nd = 73.7SZ08.DAH

DY

PEX_RX15#AP34 PEX_RX15AR34

PEX_TX15#AP32 PEX_TX15AN32

PEX_RX14#AR32 PEX_RX14AR31

PEX_TX14#AM32 PEX_TX14AM31

PEX_RX13#AP31 PEX_RX13AN31


PEX_RX12#AN29 PEX_RX12AP29

PEX_TX12#AL29 PEX_TX12AK29


PEX_TX11#AK28 PEX_TX11AL28




PEX_TX9#AM26 PEX_TX9AL26



















PEX_REFCLK#AR17 PEX_REFCLKAR16

PEX_TSTCLK_OUT#AJ18 PEX_TSTCLK_OUTAJ17

PEX_CLKREQ#AR13

PEX_RST#AM16

TESTMODE AP35

PEX_TERMP AG21

NC#AG20 AG20

PEX_PLLVDD AG14

GND_SENSE#E35 E35GND_SENSE#R7 R7GND_SENSE#AD19 AD19VDD_SENSE#AD20 AD20VDD_SENSE#P7 P7VDD_SENSE#D35 D35

VDD33 J9VDD33 J13VDD33 J12VDD33 J11VDD33 J10

NC#Y4 Y4NC#V6 V6NC#U7 U7

NC#E5 E5NC#D7 D7NC#D6 D6

NC#C7 C7

NC#AK15 AK15NC#AJ5 AJ5NC#AG6 AG6NC#AF6 AF6NC#AD6 AD6NC#AC5 AC5NC#AB7 AB7NC#AB4 AB4NC#AA4 AA4NC#A7 A7NC#A2 A2

NC#F7 F7PEX_SVDD_3V3 AG19

PEX_IOVDDQ AL16PEX_IOVDDQ AK26PEX_IOVDDQ AK23PEX_IOVDDQ AK20PEX_IOVDDQ AK18PEX_IOVDDQ AJ27PEX_IOVDDQ AJ25PEX_IOVDDQ AJ24PEX_IOVDDQ AJ22PEX_IOVDDQ AJ21PEX_IOVDDQ AJ19PEX_IOVDDQ AJ15PEX_IOVDDQ AJ14PEX_IOVDDQ AG26PEX_IOVDDQ AG25

PEX_IOVDDQ AG24PEX_IOVDDQ AG23PEX_IOVDDQ AG22PEX_IOVDDQ AG18PEX_IOVDDQ AG17PEX_IOVDDQ AG16PEX_IOVDDQ AG15PEX_IOVDDQ AG13PEX_IOVDDQ AG12PEX_IOVDDQ AG11

PEX_IOVDD AK27PEX_IOVDD AK24PEX_IOVDD AK21PEX_IOVDD AK17PEX_IOVDD AK16

NC#E7 E7NC#F4 F4NC#G5 G5

NC#H32 H32

NC#AL7 AL7NC#B7 B7

NC#P6 P6

NC#D5 D5

PCI_EXPRESS1 OF 16VGA2A

N12P-GE-A1-GP

OPTIMUS

PCI_EXPRESS1 OF 16VGA2A

N12P-GE-A1-GP

OPTIMUS


41 2

3

X8301XTAL-27MHZ-85-GP

MUXLESS2nd = 82.30034.6513rd = 82.30034.681

82.30034.641 X8301XTAL-27MHZ-85-GP

MUXLESS2nd = 82.30034.6513rd = 82.30034.681

82.30034.641

12

C8347SCD

1U10V2KX-5G

P

Optimus

C8347SCD

1U10V2KX-5G

P

Optimus

12

C8341SCD

1U10V2KX-5G

P

Optimus

C8341SCD

1U10V2KX-5G

P

Optimus 12



1 2 R830834K8R2F-1-GPOptimusR830834K8R2F-1-GPOptimus

12



12C8353 SC15P50V2JN-2-GP

Optimus

C8353 SC15P50V2JN-2-GP

Optimus

XTAL_SSIND2

SP_PLLVDDAF9 VID_PLLVDDAD9 PLLVDDAE9

XTAL_OUT B2

XTAL_OUTBUFF D1

XTAL_INB1

XTAL_PLL14 OF 16VGA2N

N12P-GE-A1-GP

OPTIMUS

XTAL_PLL14 OF 16VGA2N

N12P-GE-A1-GP

OPTIMUS

12

C8338SC1U

6D3V2KX-G

P

DYC8338SC

1U6D

3V2KX-GP

DY

1 2 R83272KR2J-1-GPDY

R83272KR2J-1-GPDY



12

C8342SC1U

6D3V2KX-G

P

Optimus

C8342SC1U

6D3V2KX-G

P

Optimus

1 2 R831710KR2F-2-GPDY

R831710KR2F-2-GPDY

12

C8356SC22U

6D3V5M

X-2GP

DY

C8356SC22U

6D3V5M

X-2GP

DY

12

C8358SC4D

7U6D

3V3KX-GP

Optimus

C8358SC4D

7U6D

3V3KX-GP

Optimus

12

C8339SCD

1U10V2KX-5G

P

Optimus

C8339SCD

1U10V2KX-5G

P

Optimus

12

C8326SCD

1U10V2KX-5G

POptimus

C8326SCD

1U10V2KX-5G

POptimus

MULTI_STRAP_REF1_GNDM9 MULTI_STRAP_REF0_GNDN9

CECAB5

NC#J25J25 NC#J26J26

GND K9GND AK14

NC#C5 C5BUFRST# A4

NC#A5 A5

I2CH_SDA G6

I2CH_SCL F6

ROM_SCLK D4ROM_SO C4ROM_SI D3

ROM_CS# C3

STRAP0 W5STRAP1 W7STRAP2 V7

MISC213 OF 16VGA2M

N12P-GE-A1-GP

OPTIMUS

MISC213 OF 16VGA2M

N12P-GE-A1-GP

OPTIMUS


12C8354 SC15P50V2JN-2-GP

Optimus

C8354 SC15P50V2JN-2-GP

Optimus

12

C8340SCD

1U10V2KX-5G

P

Optimus

C8340SCD

1U10V2KX-5G

P

Optimus



12

R83210R2J-2-GP

Optimus

R83210R2J-2-GP

Optimus

1 2R8314 100KR2J-1-GPDY

R8314 100KR2J-1-GPDY

12

C8317

SC4D

7U6D

3V3KX-GPOptimus

C8317

SC4D

7U6D

3V3KX-GPOptimus

1 2L8301

0R0603-PAD-2-GP

Optiums

L8301

0R0603-PAD-2-GP

Optiums



12

C8346SCD

1U10V2KX-4G

P

Optimus

C8346SCD

1U10V2KX-4G

P

Optimus

1 2 R830910KR2F-2-GPDYR830910KR2F-2-GPDY


12

R8324

10KR2J-3-G

P

OptimusR8324

10KR2J-3-G

P

Optimus

12

C8359SC4D

7U6D

3V3KX-GP

Optimus

C8359SC4D

7U6D

3V3KX-GP

Optimus

12

C8363SC1U

6D3V2KX-G

P

Optimus

C8363SC1U

6D3V2KX-G

P

Optimus


12

C8321SCD

1U10V2KX-5G

P

Optimus

C8321SCD

1U10V2KX-5G

P

Optimus


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBAD31

FBAD17

FBAD19FBAD18

FBAD21

FBAD23FBAD22

FBAD20

FBAD16

FBAD25

FBAD27FBAD26

FBAD29FBAD30

FBAD28

FBAD24

FBAD15

FBAD47

FBAD33

FBAD35FBAD34

FBAD37

FBAD39FBAD38

FBAD36

FBAD32

FBAD41

FBAD43FBAD42

FBAD45FBAD46

FBAD44

FBAD40

FBAD1

FBAD3FBAD2

FBAD5

FBAD7FBAD6

FBAD4

FBAD0

FBAD9

FBAD11FBAD10

FBAD13FBAD14

FBAD12

FBAD8

FBAD63

FBAD49

FBAD51FBAD50

FBAD53

FBAD55FBAD54

FBAD52

FBAD48

FBAD57

FBAD59FBAD58

FBAD61FBAD62

FBAD60

FBAD56

FBA_CLK1#

FBA_CLK0FBA_CLK0#FBA_CLK1

FBA_DEBUG0

FBCAL_PD_VDDQ

FBCAL_PU_GNDFB_VREF

FBB_CLK1#

FBB_CLK0FBB_CLK0#FBB_CLK1

FBC_DEBUG0

FB_CAL_TERM_GND

FBA_CMD_20

FBBD0FBBD1FBBD2FBBD3FBBD4FBBD5FBBD6FBBD7FBBD8

FBBD12FBBD13FBBD14FBBD15

FBBD9FBBD10FBBD11

FBBD16


FBBD17FBBD18FBBD19

FBBD24


FBBD25FBBD26FBBD27

FBBD32


FBBD56


FBBD57FBBD58FBBD59

FBBD33

FBBD40


FBBD41FBBD42FBBD43

FBBD34FBBD35

FBBD48


FBBD49FBBD50FBBD51

FBA_DEBUG1 FBC_DEBUG1

FB_PLLAVDD0

FB_PLLAVDD1

FBA_CMD_0FBA_CMD_3FBA_CMD_19FBA_CMD_16

FBB_CMD_16FBB_CMD_19FBB_CMD_20FBB_CMD_0

FBB_CMD_3

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1V_VGA_S0

1V_VGA_S0

FBADQM689FBADQM789

FBADQSP689FBADQSP789




FBADQM288FBADQM388

FBAD[32..63]89

FBAD[0..31]88

FBADQSN689FBADQSN789




FBADQM088FBADQM188

FBADQM489FBADQM589

FBA_CLK1 89FBA_CLK0# 88FBA_CLK0 88

FBA_CLK1# 89

FBA_CMD_9 88,89

FBA_CMD_24 88,89

FBA_CMD_18 89FBA_CMD_19 89

FBA_CMD_10 88,89

FBA_CMD_25 88,89

FBA_CMD_5 88,89

FBA_CMD_8 88,89

FBA_CMD_0 88

FBA_CMD_21 88,89FBA_CMD_22 88,89

FBA_CMD_20 88,89

FBA_CMD_2 88

FBA_CMD_12 88FBA_CMD_13 88,89

FBA_CMD_6 88,89

FBA_CMD_3 88

FBBDQM691FBBDQM791

FBBDQSP691FBBDQSP791




FBBDQM290FBBDQM390

FBBD[32..63]91

FBBD[0..31]90

FBBDQSN691FBBDQSN791




FBBDQM090FBBDQM190

FBBDQM491FBBDQM591

FBB_CLK1 91FBB_CLK0# 90FBB_CLK0 90

FBB_CLK1# 91

FBB_CMD_16 91

FBB_CMD_27 90

FBB_CMD_9 90,91

FBB_CMD_24 90,91

FBB_CMD_18 91FBB_CMD_19 91

FBB_CMD_10 90,91

FBB_CMD_25 90,91

FBB_CMD_5 90,91

FBB_CMD_8 90,91

FBB_CMD_0 90

FBB_CMD_21 90,91FBB_CMD_22 90,91

FBB_CMD_20 90,91

FBB_CMD_2 90

FBB_CMD_12 90FBB_CMD_13 90,91

FBB_CMD_11 90,91

FBB_CMD_6 90,91

FBB_CMD_3 90

FBA_CMD_26 88,89

FBA_CMD_28 88,89FBA_CMD_29 88,89FBA_CMD_30 89

FBB_CMD_26 90,91

FBB_CMD_28 90,91


FBA_CMD_11 88,89

FBA_CMD_16 89

FBA_CMD_27 88

FBA_CMD_15 88,89

FBA_CMD_23 88,89

FBB_CMD_15 90,91

FBB_CMD_23 90,91

FBA_CMD_14 89

FBA_CMD_4 88,89

FBB_CMD_14 91

FBB_CMD_4 90,91

FBA_CMD_7 88,89 FBB_CMD_7 90,91

Title


Date: Sheet of


A00

N12P(2/6)_MEMORYCustom


<Variant Name>

Title


Date: Sheet of


A00



<Variant Name>

Title


Date: Sheet of


A00



<Variant Name>

Differential write clocksfor GDDR5 for Frame Buffers.Reference for read and writedata.

Near BALLS

Near BGA

Mode E is necessary for DDR3that require compatibilitywith previous generationGPUs (GB1-128) and onlyapplies to GB2-128 package.

ODTx & CKEx & RST termination.

ODTx & CKEx & RST termination.

GB1-128 do not need.

0723

0802 swap

0810

0818De-cap

0818De-cap

0818De-cap

0818De-cap

1009

A00

A00

12

C8410SC

4D7U

6D3V

3KX

-GP

DYC8410S

C4D

7U6D

3V3K

X-G

P

DY


12

C8409SC

D01U

50V2K

X-1G

P

Optimus

C8409SC

D01U

50V2K

X-1G

P

Optimus

NC#J27J27

FBA_WCK3#AE29 FBA_WCK3AD29 FBA_WCK2#AH29 FBA_WCK2AG29 FBA_WCK1#M29 FBA_WCK1L29 FBA_WCK0#R29 FBA_WCK0P29

FBA_DQS_RN7AC34 FBA_DQS_RN6AJ35 FBA_DQS_RN5AJ31 FBA_DQS_RN4AD32 FBA_DQS_RN3N32 FBA_DQS_RN2H31 FBA_DQS_RN1G35 FBA_DQS_RN0L35

FBA_DQS_WP7AC33 FBA_DQS_WP6AJ34 FBA_DQS_WP5AJ32 FBA_DQS_WP4AE31 FBA_DQS_WP3N31 FBA_DQS_WP2J32 FBA_DQS_WP1H35 FBA_DQS_WP0L34

FBA_DQM7AF35 FBA_DQM6AL34 FBA_DQM5AL32 FBA_DQM4AF32 FBA_DQM3P30 FBA_DQM2J30 FBA_DQM1H34 FBA_DQM0P32

FBA_D63AC35 FBA_D62AB32 FBA_D61AE33 FBA_D60AE34 FBA_D59AE35 FBA_D58AF34 FBA_D57AE32 FBA_D56AF33 FBA_D55AM35 FBA_D54AM34 FBA_D53AL35 FBA_D52AJ33 FBA_D51AH32 FBA_D50AH34 FBA_D49AH35 FBA_D48AH33 FBA_D47AH30 FBA_D46AJ30 FBA_D45AK32 FBA_D44AK30 FBA_D43AL33 FBA_D42AM33 FBA_D41AL31 FBA_D40AN33 FBA_D39AD30 FBA_D38AC32 FBA_D37AE30 FBA_D36AF30 FBA_D35AF31 FBA_D34AH31 FBA_D33AG32 FBA_D32AG30 FBA_D31R30 FBA_D30R32 FBA_D29P31 FBA_D28M30 FBA_D27N30 FBA_D26M32 FBA_D25L30 FBA_D24L31 FBA_D23K31 FBA_D22H30 FBA_D21K32 FBA_D20K30 FBA_D19G32 FBA_D18G30 FBA_D17F30 FBA_D16G31 FBA_D15E33 FBA_D14E34 FBA_D13G33 FBA_D12G34 FBA_D11H33 FBA_D10K34 FBA_D9K33 FBA_D8K35 FBA_D7P34 FBA_D6P33 FBA_D5P35 FBA_D4N35 FBA_D3N34 FBA_D2L33 FBA_D1N33 FBA_D0L32

FB_PLLAVDD AF27FB_DLLAVDD AG27

FBA_DEBUG0 T30

FBA_CLK1# AC30FBA_CLK1 AC31FBA_CLK0# T31FBA_CLK0 T32

FBA_CMD30 W29

FBA_CMD14 T33

FBA_CMD20 AB33

FBA_CMD16 AB30

FBA_CMD5 U33

FBA_CMD0 U30

FBA_CMD11 U35

FBA_CMD1 V30

FBA_CMD9 W34

FBA_CMD25 Y35

FBA_CMD10 U34

FBA_CMD28 Y31

FBA_CMD12 U32

FBA_CMD22 Y33

FBA_CMD19 AA32

FBA_CMD17 AA30

FBA_CMD6 W32

FBA_CMD27 Y34

FBA_CMD29 Y30

FBA_CMD18 AB31

FBA_CMD4 T35

FBA_CMD13 T34

FBA_CMD15 W30

FBA_CMD7 W33

FBA_CMD26 W35

FBA_CMD23 AB34FBA_CMD24 AB35

FBA_CMD21 Y32

FBA_CMD2 U31

FBA_CMD8 W31

FBA_CMD3 V32

FBVDDQ J29FBVDDQ J24FBVDDQ J23FBVDDQ J22FBVDDQ J21FBVDDQ J20FBVDDQ J17FBVDDQ J16FBVDDQ J15FBVDDQ J14FBVDDQ H29FBVDDQ G9FBVDDQ G8FBVDDQ G22FBVDDQ G18FBVDDQ G17FBVDDQ E21FBVDDQ B18FBVDDQ AJ28FBVDDQ AE27FBVDDQ AD27FBVDDQ AC27FBVDDQ AB29FBVDDQ AB27FBVDDQ AA31FBVDDQ AA29FBVDDQ AA27

FBA_DEBUG1 T29

FBA_CMD31 Y29

FB_DLLAVDD J19FB_PLLAVDD J18

FBA2 OF 16VGA2B

N12P-GE-A1-GP

OPTIMUS

FBA2 OF 16VGA2B

N12P-GE-A1-GP

OPTIMUS

12

C8426SC

1U6D

3V2K

X-G

P

OptimusC8426S

C1U

6D3V

2KX

-GP

Optimus


1234 5

678

RN8402

SRN10KJ-6-GP

OptimusRN8402

SRN10KJ-6-GP

Optimus

FBB_WCK3#G25 FBB_WCK3G24 FBB_WCK2#G28 FBB_WCK2G27 FBB_WCK1#G12 FBB_WCK1G11 FBB_WCK0#G15 FBB_WCK0G14

FBB_DQS_RN7A26 FBB_DQS_RN6A31 FBB_DQS_RN5D31 FBB_DQS_RN4F26 FBB_DQS_RN3E14 FBB_DQS_RN2D9 FBB_DQS_RN1B10 FBB_DQS_RN0B14

FBB_DQS_WP7B26 FBB_DQS_WP6A32 FBB_DQS_WP5D32 FBB_DQS_WP4E26 FBB_DQS_WP3D14 FBB_DQS_WP2E10 FBB_DQS_WP1A10 FBB_DQS_WP0C14

FBB_DQM7D28 FBB_DQM6A34 FBB_DQM5D34 FBB_DQM4D27 FBB_DQM3D15 FBB_DQM2F11 FBB_DQM1D10 FBB_DQM0A16

FBB_D63A25 FBB_D62B25 FBB_D61D25 FBB_D60C26 FBB_D59C28 FBB_D58A28 FBB_D57B28 FBB_D56A29 FBB_D55B34 FBB_D54B35 FBB_D53B32 FBB_D52C32 FBB_D51B31 FBB_D50C29 FBB_D49C31 FBB_D48B29 FBB_D47E29 FBB_D46D30 FBB_D45F29 FBB_D44C33 FBB_D43E31 FBB_D42D33 FBB_D41F32 FBB_D40E32 FBB_D39E25 FBB_D38D24 FBB_D37F25 FBB_D36D26 FBB_D35E28 FBB_D34F28 FBB_D33F27 FBB_D32D29 FBB_D31F17 FBB_D30F16 FBB_D29E16 FBB_D28F15 FBB_D27F14 FBB_D26F13 FBB_D25E13 FBB_D24D12 FBB_D23E11 FBB_D22D11 FBB_D21D8 FBB_D20F12 FBB_D19F9 FBB_D18F10 FBB_D17F8 FBB_D16E8 FBB_D15A8 FBB_D14B8 FBB_D13C8 FBB_D12C10 FBB_D11A11 FBB_D10C11 FBB_D9B11 FBB_D8C13 FBB_D7D16 FBB_D6A17 FBB_D5B16 FBB_D4C16 FBB_D3A14 FBB_D2A13 FBB_D1D13 FBB_D0B13

FB_CAL_TERM_GND M27

FB_CAL_PU_GND L27

FB_CAL_PD_VDDQ K27

FBB_DEBUG0 G19

FBB_CLK1# E23FBB_CLK1 D23FBB_CLK0# D17FBB_CLK0 E17

FBB_CMD9 D20FBB_CMD8 B19FBB_CMD7 E20FBB_CMD6 B17FBB_CMD5 C19FBB_CMD4 F19

FBB_CMD30 A20

FBB_CMD3 C17

FBB_CMD29 A22FBB_CMD28 B22FBB_CMD27 C22FBB_CMD26 B23FBB_CMD25 D22FBB_CMD24 A23FBB_CMD23 D21FBB_CMD22 E22FBB_CMD21 F21FBB_CMD20 C23

FBB_CMD2 D18

FBB_CMD19 C25FBB_CMD18 F23FBB_CMD17 F24FBB_CMD16 F22FBB_CMD15 G21FBB_CMD14 B20FBB_CMD13 F20FBB_CMD12 C20FBB_CMD11 D19FBB_CMD10 A19

FBB_CMD1 E19FBB_CMD0 F18

FBVDDQ Y27FBVDDQ W27FBVDDQ V34FBVDDQ V29FBVDDQ V27FBVDDQ U29FBVDDQ U27FBVDDQ T27FBVDDQ R27FBVDDQ P27FBVDDQ N27

FBB_DEBUG1 G16

FBB_CMD31 G20

FBB3 OF 16VGA2C

N12P-GE-A1-GP

OPTIMUS

FBB3 OF 16VGA2C

N12P-GE-A1-GP

OPTIMUS

12

C8424SC

D01U

50V2K

X-1G

P

Optimus

C8424SC

D01U

50V2K

X-1G

P

Optimus

1 2

L8401

0R0603-PAD-2-GP

OptimusL8401

0R0603-PAD-2-GP

Optimus

1 2R8404 40D2R2F-GP

OptimusR8404 40D2R2F-GP

Optimus


1 2R8401

10KR2J-3-GPOptimus

R8401

10KR2J-3-GPOptimus

12

C8414SC

D1U

10V2K

X-4G

P

Optimus

C8414SC

D1U

10V2K

X-4G

P

Optimus

12

C8419SC

D1U

10V2K

X-5G

P

Optimus

C8419SC

D1U

10V2K

X-5G

P

Optimus

1 2R8403

10KR2J-3-GPOptimus

R8403

10KR2J-3-GPOptimus

1 2R8405 40D2R2F-GP


Optimus

1 2

L8402

0R0603-PAD-2-GP

OptimusL8402

0R0603-PAD-2-GP

Optimus


12

C8422SC

D01U

50V2K

X-1G

P

DYC8422S

CD

01U50V

2KX

-1GP

DY

12

C8413SC

4D7U

6D3V

3KX

-GP

Optimus

C8413SC

4D7U

6D3V

3KX

-GP

Optimus

12

C8421SC

D1U

10V2K

X-5G

P

Optimus

C8421SC

D1U

10V2K

X-5G

P

Optimus

1234 5

678

RN8401

SRN10KJ-6-GP

OptimusRN8401

SRN10KJ-6-GP

Optimus

12

C8412SC

1U6D

3V2K

X-G

P

Optimus

C8412SC

1U6D

3V2K

X-G

P

Optimus

12

C8411SC

4D7U

6D3V

3KX

-GP

OptimusC8411S

C4D

7U6D

3V3K

X-G

P

Optimus

1TP8415TPAD14-GP

TP8415TPAD14-GP

12

C8423SC

D1U

10V2K

X-4G

P

Optimus

C8423SC

D1U

10V2K

X-4G

P

Optimus

1 2R8402 60D4R2F-GP


Optimus

12

C8425

SC

1U6D

3V2K

X-G

P

Optimus

C8425

SC

1U6D

3V2K

X-G

P

Optimus

12

C8415SC

1U6D

3V2K

X-G

P

Optimus

C8415SC

1U6D

3V2K

X-G

P

Optimus

12

C8417SC

D1U

10V2K

X-5G

P

Optimus

C8417SC

D1U

10V2K

X-5G

P

Optimus

12

C8420SC

D1U

10V2K

X-5G

P

Optimus

C8420SC

D1U

10V2K

X-5G

P

Optimus

12

C8418SC

D1U

10V2K

X-5G

P

Optimus

C8418SC

D1U

10V2K

X-5G

P

Optimus

12

C8416SC

4D7U

6D3V

3KX

-GP

Optimus

C8416SC

4D7U

6D3V

3KX

-GP

Optimus

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IFPCD_PLLVDD

IFPC_RSET

IFPCD_IOVDD

IFPCD_PLLVDD

IFPCD_IOVDD

IFPD_RSET

DACB_VDDDACA_VDD

U8501_2GPU_HDMI_HPD

NV_I2CA_SCLNV_I2CA_SDA

NV_I2CA_SCLNV_I2CA_SDA

SMBC_INA219_CSMBD_INA219_C

IFPAB_IOVDD

IFPAB_PLLVDD

IFPEF_IOVDD

IFPEF_PLLVDD

IFPAB_PLLVDD

IFPAB_IOVDD

IFPAB_IOVDD

IFPEF_PLLVDD

IFPEF_IOVDD

IFPEF_IOVDD

3D3V_VGA_S0

1V_VGA_S0

3D3V_S0

3D3V_VGA_S0

3D3V_VGA_S0

GPU_HDMI_CLK 51GPU_HDMI_DATA 51

HDMI_DATA0 51HDMI_DATA0# 51



HDMI_CLK 51HDMI_CLK# 51

HDMI_HPD_DET51

9025_PGOOD_1V93

PEX_RST#51,83,86

SMBD_INA219 43,92SMBC_INA219 43,92

GPU_HDMI_HPD 51

Title


Date: Sheet of


A00N12P(3/6)_DAC

A2


<Variant Name>

Title


Date: Sheet of


A00N12P(3/6)_DAC

A2


<Variant Name>

Title


Date: Sheet of


A00N12P(3/6)_DAC

A2


<Variant Name>

If either IFPC or IFPD is used, then the whole IFPCD interface isconsidered as being used. This is because IFPC and IFPD share onemacro design so one IO interface cannot be independently disabled.

In Optimus mode the GPU does not drive certaininterfaces. These interfaces should be treated asunused and appropriate terminations per the GPU designguide should be applied th the signal or the powersupply block.

If a DAC interface is not required, it should be disabled by:1. Adding a pull-down to the DACx_VDD with a 10 kilohm resistor to GND.2. All other DAC I/O pins can be left floating.

The following guidelines only apply to a fully unused IFP macro:1. Pull down IFPxy_IOVDD with 10 kilohm resistor.2. Pull down IFPxy_PLLVDD with 10 kilohm resistor.3. The other IO pins can be NC; this includes unused data lines.

NEED CHECK PAGE 51.

Optimus systems with HDMI connected to GPU. (Option A).

Ventura I2C must connect to I2CB_SCL & I2CB_SDA.

220mA

280mA

0723NV suggest un-used I2C pull-up.

0804 swap

0927

0927

220ohm@100MHz ESR=0.05

300ohm@100MHz ESR=0.25

1009

10.28

X02 1110



A00

A00

A00

A00

A00

12

C8505SC1U

6D3V2KX-G

P

Optimus

C8505SC1U

6D3V2KX-G

P

OptimusIFPC_IOVDDAJ8

IFPC_RSETAK7

IFPC_PLLVDDAJ9

GPIO1 K2

IFPC_L0 AM7IFPC_L0# AM6

IFPC_L1 AL5IFPC_L1# AM5

IFPC_L2 AM3IFPC_L2# AM4

IFPC_L3 AP1IFPC_L3# AR2

IFPC_AUX_I2CW_SCL AP2IFPC_AUX_I2CW_SDA# AN3

IFPC8 OF 16VGA2H

N12P-GE-A1-GP

OPTIMUS

IFPC8 OF 16VGA2H

N12P-GE-A1-GP

OPTIMUS

12

C8516SC4D

7U6D

3V3KX-GP

Optimus

C8516SC4D

7U6D

3V3KX-GP

Optimus

12

R85152K2R2J-2-GP

VENTURAR85152K2R2J-2-GP

VENTURA

1 2

L8502

0R0603-PAD-2-GPOptimus

L8502


12

C8507SCD

1U10V2KX-5G

P

Optimus

C8507SCD

1U10V2KX-5G

P

Optimus

12


12 3

4

RN8501

SRN2K2J-1-GP

Optimus

RN8501

SRN2K2J-1-GP

Optimus

12 R85130R2J-2-GPDYR85130R2J-2-GPDY

IFPB_IOVDDAG10

IFPA_IOVDDAG9

IFPAB_RSETAJ11

IFPAB_PLLVDDAK9

GPIO0 K1

IFPB_TXC AP13IFPB_TXC# AN13

IFPB_TXD7 AN11IFPB_TXD7# AP11

IFPB_TXD6 AR11IFPB_TXD6# AR10

IFPB_TXD5 AP10IFPB_TXD5# AN10

IFPB_TXD4 AN8IFPB_TXD4# AP8

IFPA_TXC AM11IFPA_TXC# AM12

IFPA_TXD3 AK11IFPA_TXD3# AL11

IFPA_TXD2 AK10IFPA_TXD2# AL10

IFPA_TXD1 AM10IFPA_TXD1# AM9

IFPA_TXD0 AM8IFPA_TXD0# AL8

IFPAB7 OF 16VGA2G

N12P-GE-A1-GP

OPTIMUS

IFPAB7 OF 16VGA2G

N12P-GE-A1-GP

OPTIMUS

12

C8511SC4D

7U6D

3V3KX-GP

Optimus

C8511SC4D

7U6D

3V3KX-GP

Optimus

12 R85100R2J-2-GPDYR85100R2J-2-GPDY

12

R850310KR2J-3-GP

Optimus R850310KR2J-3-GP

Optimus

B1

A2

GND3 Y 4

VCC 5

U8501

74LVC1G08GW-1-GP

2ND = 73.7SZ08.DAH73.01G08.L04

DYU8501

74LVC1G08GW-1-GP

2ND = 73.7SZ08.DAH73.01G08.L04

DY

IFPF_IOVDDAD7

IFPE_IOVDDAE7

IFPEF_RSETAL1

IFPEF_PLLVDDAJ6

GPIO21 K6

IFPF_L0 AL2IFPF_L0# AL3

IFPF_L1 AJ3IFPF_L1# AJ2

IFPF_L2 AJ1IFPF_L2# AH1

IFPF_L3 AH2IFPF_L3# AH3

IFPF_AUX_I2CZ_SCL AF3IFPF_AUX_I2CZ_SDA# AF2

GPIO15 L1

IFPE_L0 AH6IFPE_L0# AH5

IFPE_L1 AH4IFPE_L1# AG4

IFPE_L2 AF4IFPE_L2# AF5

IFPE_L3 AE6IFPE_L3# AE5

IFPE_AUX_I2CY_SCL AE4IFPE_AUX_I2CY_SDA# AD4

IFPEF9 OF 16VGA2I

N12P-GE-A1-GP

OPTIMUS

IFPEF9 OF 16VGA2I

N12P-GE-A1-GP

OPTIMUS

12

R85081KR2F-3-GPOptimusR85081KR2F-3-GPOptimus

DACB_RSETAH7

DACB_VREFAK6

DACB_VDDAG7

DACB_BLUE AJ4

DACB_GREEN AL4

DACB_RED AK4

DACB_VSYNC AM2DACB_HSYNC AM1

I2CB_SDA G2I2CB_SCL G3DACB

6 OF 16VGA2F

N12P-GE-A1-GP

OPTIMUS

DACB6 OF 16VGA2F

N12P-GE-A1-GP

OPTIMUS

1 234

RN8502SRN10KJ-5-GPOptimusRN8502SRN10KJ-5-GPOptimus

1 2R8512 0R0402-PAD-2-GPVENTURA

R8512 0R0402-PAD-2-GPVENTURA

1 234


12

C8512SCD

1U10V2KX-5G

P

Optimus

C8512SCD

1U10V2KX-5G

P

Optimus

12

C8508SCD

1U10V2KX-5G

P

Optimus

C8508SCD

1U10V2KX-5G

P

Optimus

12

R850710KR2J-3-GPOptimusR850710KR2J-3-GPOptimus

12



IFPD_IOVDDAK8

IFPD_RSETAB6

IFPD_PLLVDDAC6

GPIO19 L7

IFPD_L0 AR8IFPD_L0# AR7

IFPD_L1 AP7IFPD_L1# AN7

IFPD_L2 AN5IFPD_L2# AP5

IFPD_L3 AR5IFPD_L3# AR4

IFPD_AUX_I2CX_SCL AP4IFPD_AUX_I2CX_SDA# AN4

IFPD5 OF 16VGA2E

N12P-GE-A1-GP

OPTIMUS

IFPD5 OF 16VGA2E

N12P-GE-A1-GP

OPTIMUS

12

C8506SC1U

6D3V2KX-G

P

DYC8506SC

1U6D

3V2KX-GP

DY

DACA_RSETAK13

DACA_VREFAK12

DACA_VDDAJ12

DACA_BLUE AL14

DACA_GREEN AM14

DACA_RED AM15

DACA_VSYNC AL13DACA_HSYNC AM13

I2CA_SDA G4I2CA_SCL G1DACA

4 OF 16VGA2D

N12P-GE-A1-GP

OPTIMUS

DACA4 OF 16VGA2D

N12P-GE-A1-GP

OPTIMUS

1 2R8511 0R0402-PAD-2-GP

VENTURAR8511 0R0402-PAD-2-GP

VENTURA12

R85142K2R2J-2-GP

VENTURA

R85142K2R2J-2-GP

VENTURA

1 2

L8503


L8503


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SMBC_THERM_NVSMBD_THERM_NV

PWRCNTL_0

NV_OVERTEMP#NV_GPIO9

PWRCNTL_1

MIOA_CLKIN_NC

MIOB_CLKIN_NC

NV_LCD_EDID_CLKNV_LCD_EDID_DAT

SMBC_THERM_NV

SMBD_THERM_NV

MIOB_VDDQ

NV_OVERTEMP#NV_GPIO9

MIOB_CLKIN_NC

MIOA_CLKIN_NC

JTAG_TCK_VGA

JTAG_TRST#

NV_TMSNV_TDINV_TDO

NV_GPIO7

PWR_LEVEL

GPU_GPIO23

PWR_LEVEL

MIOA_VDDQ

NV_OVERTEMP#

Q8602_G

P2800_VGA_DXN

P2800_VGA_DXP

3D3V_VGA_S0

3D3V_VGA_S0 3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

PWRCNTL_0 92PWRCNTL_1 92

SML1_CLK 20,27

SML1_DATA 20,27

JTAG_TCK_VGA20

AC_PRESENT 19,27


PEX_RST# 51,83,85

Title


Date: Sheet of


A00N12P(5/6)_MIO/ GPIO

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

MIOx_CLKIN signals shouldhave 10K pull-downresistors.

MIOA/B Support

GB1-192

GB2-128

Package MIOA MIOB

15-bit, available TBD

Not available Not available

0728

GPIO121 - > AC mode.0 -> Battery mode.

0723

0728 Reserve for N12M.

0728 Reserve for N12M.

0915

0915

0915

A00 1231 add probe point

12

C8601SCD

1U10V2KX-4G

P

DYC8601SC

D1U

10V2KX-4GP

DY

123 4

RN8606SRN10KJ-5-GP

Optimus

RN8606SRN10KJ-5-GP

Optimus

12R8606

0R2J-2-GP

DYR8606

0R2J-2-GP

DY

NC#AF1AF1

NC#AA6AA6

NC#AA7AA7

NC#Y9Y9 NC#W9W9 NC#AB9AB9 NC#AA9AA9

NC#AE1 AE1NC#W4 W4NC#V4 V4

NC#Y5 Y5NC#W2 W2NC#W1 W1NC#W3 W3

NC#Y6 Y6NC#W6 W6NC#U6 U6NC#AE2 AE2NC#AE3 AE3NC#AC3 AC3NC#AC2 AC2NC#AC1 AC1NC#AC4 AC4NC#AB1 AB1NC#AB2 AB2NC#AB3 AB3NC#Y3 Y3NC#Y2 Y2NC#Y1 Y1

11 OF 16VGA2K

N12P-GE-A1-GP

OPTIMUS

11 OF 16VGA2K

N12P-GE-A1-GP

OPTIMUS

1 2

R8602 0R2J-2-GP

DYR8602 0R2J-2-GP

DY


JTAG_TRST#AP16 JTAG_TDOAN16 JTAG_TDIAN14 JTAG_TMSAR14 JTAG_TCKAP14

THERMDPB5

THERMDNB4

GPIO23 M6GPIO22 L6

GPIO20 L5

GPIO18 M4GPIO17 L4GPIO16 L2

GPIO14 J6GPIO13 J4GPIO12 H7GPIO11 K5GPIO10 K4GPIO9 J7GPIO8 H6GPIO7 H5GPIO6 H4GPIO5 H1GPIO4 H2GPIO3 H3GPIO2 K3

I2CC_SDA E4I2CC_SCL E3

I2CS_SDA E1I2CS_SCL E2

GPIO24 M7

MISC112 OF 16VGA2L

N12P-GE-A1-GPOPTIMUS

MISC112 OF 16VGA2L

N12P-GE-A1-GPOPTIMUS

12

R860310KR2J-3-GP

Optimus

R860310KR2J-3-GP

Optimus


1

2

3 4

5

6

Q8601

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

OptimusQ8601

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

Optimus1

2

C8603

SCD1U10V2KX-4GPDYC8603

SCD1U10V2KX-4GPDY


123 4



12

C8602SCD

1U10V2KX-4G

P

DYC8602SC

D1U

10V2KX-4GP

DY

12

R860510KR2J-3-GP

Optimus

R860510KR2J-3-GP

Optimus

1

2

3

D8601

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

D8601

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

NC#N5N5

NC#T5T5

NC#U5U5

NC#U9U9 NC#T9T9 NC#R9R9 NC#P9P9

NC#N4 N4NC#T4 T4NC#R4 R4

NC#N2 N2NC#L3 L3NC#N3 N3NC#P5 P5

NC#N6 N6NC#T6 T6NC#R6 R6NC#U3 U3NC#U2 U2NC#U1 U1NC#U4 U4NC#T1 T1NC#T2 T2NC#T3 T3NC#P3 P3NC#P2 P2NC#P1 P1NC#P4 P4NC#N1 N1

10 OF 16VGA2J

N12P-GE-A1-GP

OPTIMUS

10 OF 16VGA2J

N12P-GE-A1-GP

OPTIMUS

1TP8611

TPAD14-GPTP8611

TPAD14-GP

12 3

4

RN8601

SRN10KJ-5-GPOptimus

RN8601

SRN10KJ-5-GPOptimus


123

4

RN8605

SRN2K2J-1-GPOptimus

RN8605

SRN2K2J-1-GPOptimus

1 2

R8601 0R2J-2-GP

DYR8601 0R2J-2-GP

DY

123 4


G

S

D

Q8602

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DYQ8602

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

DY

12

R860410KR2J-3-GP

Optimus

R860410KR2J-3-GP

Optimus

1TP8612

TPAD14-GPTP8612

TPAD14-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VGA_CORE VGA_CORE

VGA_COREVGA_CORE

Title


Date: Sheet of


A00N12P(6/6)_POWER

A3


<Variant Name>

Title


Date: Sheet of


A00N12P(6/6)_POWER

A3


<Variant Name>

Title


Date: Sheet of


A00N12P(6/6)_POWER

A3


<Variant Name>

0728

Under GPU

0728

Near GPU

0818De-cap

0818De-cap

VDDP19 VDDP17 VDDP15 VDDP13 VDDP11 VDDM24 VDDM22 VDDM20 VDDM18 VDDM16 VDDM14 VDDM12 VDDL25 VDDL24 VDDL23 VDDL22 VDDL21 VDDL20 VDDL19 VDDL18 VDDL17 VDDL16 VDDL15 VDDL14 VDDL13 VDDL12 VDDL11 VDDAD24 VDDAD22 VDDAD18 VDDAD16 VDDAD14 VDDAD12 VDDAC25 VDDAC24 VDDAC23 VDDAC22 VDDAC21 VDDAC20 VDDAC19 VDDAC18 VDDAC17 VDDAC16 VDDAC15 VDDAC14 VDDAC13 VDDAC12 VDDAC11 VDDAB25 VDDAB23 VDDAB21 VDDAB19 VDDAB17 VDDAB15 VDDAB13 VDDAB11

VDD Y24VDD Y22VDD Y20VDD Y18VDD Y16VDD Y14VDD Y12VDD W25VDD W24VDD W23VDD W22VDD W21VDD W20VDD W19VDD W18VDD W17VDD W16VDD W15VDD W14VDD W13VDD W12VDD W11VDD V25VDD V23VDD V21VDD V19VDD V17VDD V15VDD V13VDD V11VDD T24VDD T22VDD T20VDD T18VDD T16VDD T14VDD T12VDD R25VDD R24VDD R23VDD R22VDD R21VDD R20VDD R19VDD R18VDD R17VDD R16VDD R15VDD R14VDD R13VDD R12VDD R11VDD P25VDD P23VDD P21NVVDD

16 OF 16VGA2P

N12P-GE-A1-GP

OPTIMUS

NVVDD16 OF 16VGA2P

N12P-GE-A1-GP

OPTIMUS

12

C8721

SCD

1U10V2KX-5G

P

OptimusC8721

SCD

1U10V2KX-5G

P

Optimus

GNDE12 GNDC34 GNDC2 GNDB9 GNDB6 GNDB33 GNDB30 GNDB3 GNDB27 GNDB24 GNDB21 GNDB15 GNDB12 GNDAP9 GNDAP6 GNDAP33 GNDAP30 GNDAP3 GNDAP27 GNDAP24 GNDAP21 GNDAP18 GNDAP15 GNDAP12 GNDAN34 GNDAN2 GNDAL9 GNDAL6 GNDAL30 GNDAL27 GNDAL24 GNDAL21 GNDAL18 GNDAL15 GNDAL12 GNDAK5 GNDAK34 GNDAK31 GNDAK2 GNDAG5 GNDAG34 GNDAG31 GNDAG2 GNDAE25 GNDAE24 GNDAE23 GNDAE22 GNDAE21 GNDAE20 GNDAE19 GNDAE18 GNDAE17 GNDAE16 GNDAE15 GNDAE14 GNDAE13 GNDAE12 GNDAE11 GNDAD5 GNDAD34 GNDAD31 GNDAD25 GNDAD23 GNDAD21 GNDAD2 GNDAD17 GNDAD15 GNDAD13 GNDAD11 GNDAC9 GNDAB24 GNDAB22 GNDAB20 GNDAB18 GNDAB16 GNDAB14 GNDAB12 GNDAA5 GNDAA34 GNDAA25 GNDAA24 GNDAA23 GNDAA22 GNDAA21 GNDAA20 GNDAA2 GNDAA19 GNDAA18 GNDAA17 GNDAA16 GNDAA15 GNDAA14 GNDAA13 GNDAA12 GNDAA11

GND Y25GND Y23GND Y21GND Y19GND Y17GND Y15GND Y13GND Y11GND V9GND V5GND V31GND V24GND V22GND V20GND V2GND V18GND V16GND V14GND V12GND U25GND U24GND U23GND U22GND U21GND U20GND U19GND U18GND U17GND U16GND U15GND U14GND U13GND U12GND U11GND T25GND T23GND T21GND T19GND T17GND T15GND T13GND T11GND R5GND R34GND R31GND R2GND P24GND P22GND P20GND P18GND P16GND P14GND P12GND N25GND N24GND N23GND N22GND N21GND N20GND N19GND N18GND N17GND N16GND N15GND N14GND N13GND N12GND N11GND M5GND M34GND M31GND M25GND M23GND M21GND M2GND M19GND M17GND M15GND M13GND M11GND L9GND J5GND J34GND J31GND J2GND F5GND F34GND F31GND F2GND E9GND E6GND E30GND E27GND E24GND E18GND E15GND

15 OF 16VGA2O

N12P-GE-A1-GP

OPTIMUS

GND15 OF 16VGA2O

N12P-GE-A1-GP

OPTIMUS

12

C8710SC4D

7U10V3KX-G

P

OptimusC8710SC

4D7U

10V3KX-GP

Optimus

12

C8708SC1U

6D3V2KX-G

P

Optimus

C8708SC1U

6D3V2KX-G

P

Optimus

12

C8711

SCD

1U10V2KX-5G

P

OptimusC8711

SCD

1U10V2KX-5G

P

Optimus

12

C8716SCD

1U10V2KX-5G

P

Optimus

C8716SCD

1U10V2KX-5G

P

Optimus

12

C8712

SCD

1U10V2KX-5G

P

OptimusC8712

SCD

1U10V2KX-5G

P

Optimus

12

C8725SC22U

6D3V5M

X-2GP

Optimus

C8725SC22U

6D3V5M

X-2GP

Optimus

12

C8703SCD

1U10V2KX-5G

P

OptimusC8703SC

D1U

10V2KX-5GP

Optimus

12

C8724SC22U

6D3V5M

X-2GP

Optimus

C8724SC22U

6D3V5M

X-2GP

Optimus

12

C8709SCD

1U10V2KX-5G

P

DYC8709SC

D1U

10V2KX-5GP

DY

12

C8713

SCD

1U10V2KX-5G

P

OptimusC8713

SCD

1U10V2KX-5G

P

Optimus

12

C8702SCD

1U10V2KX-4G

P

OptimusC8702SC

D1U

10V2KX-4GP

Optimus

12

C8717

SCD

1U10V2KX-5G

P

OptimusC8717

SCD

1U10V2KX-5G

P

Optimus

12

C8701SCD

1U10V2KX-5G

P

OptimusC8701SC

D1U

10V2KX-5GP

Optimus

12

C8714

SCD

1U10V2KX-5G

P

OptimusC8714

SCD

1U10V2KX-5G

P

Optimus

12

C8718

SCD

1U10V2KX-5G

P

DYC8718

SCD

1U10V2KX-5G

P

DY

12

C8722

SC10U

6D3V3M

X-GP

DY

C8722

SC10U

6D3V3M

X-GP

DY

12

C8706SC1U

6D3V2KX-G

P

Optimus

C8706SC1U

6D3V2KX-G

P

Optimus

12

C8705SCD

1U10V2KX-5G

P

OptimusC8705SC

D1U

10V2KX-5GP

Optimus

12

C8715

SCD

1U10V2KX-5G

P

OptimusC8715

SCD

1U10V2KX-5G

P

Optimus

12

C8719

SCD

1U10V2KX-5G

P

DYC8719

SCD

1U10V2KX-5G

P

DY

12

C8707SCD

047U25V2KX-G

P

DY C8707SCD

047U25V2KX-G

P

DY

12

C8723SC4D

7U6D

3V3KX-GP

Optimus

C8723SC4D

7U6D

3V3KX-GP

Optimus12

C8720

SCD

1U10V2KX-5G

P

OptimusC8720

SCD

1U10V2KX-5G

P

Optimus

12

C8704SCD

1U10V2KX-5G

P

Optimus

C8704SCD

1U10V2KX-5G

P

Optimus

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBA_VREF12

FBA_VREF12

FBA_ZQ0 FBA_ZQ1

FBA_VREF12

FBA_CMD_25

FBA_CMD_10

FBA_CMD_21

FBA_CMD_22

FBA_CMD_8

FBA_CMD_24

FBA_CMD_9FBA_CMD_12

FBA_CMD_23

FBA_CMD_26

FBA_CMD_7

FBA_CMD_4

FBA_CMD_5

FBA_CMD_6

FBA_CMD_13FBA_CMD_29

FBA_CMD_27

FBA_CMD_3

FBA_CMD_28FBA_CMD_15FBA_CMD_11

FBA_CMD_20

FBA_CMD_0

FBA_CMD_2

FBA_CMD_0

FBA_CMD_2FBA_CMD_20

FBA_CMD_25

FBA_CMD_10

FBA_CMD_21

FBA_CMD_22

FBA_CMD_8

FBA_CMD_24

FBA_CMD_9FBA_CMD_12

FBA_CMD_23

FBA_CMD_26

FBA_CMD_7

FBA_CMD_4

FBA_CMD_5

FBA_CMD_6


FBA_CMD_27

FBA_CMD_3


FBA_CMD_28

FBAD20

FBAD23

FBAD13

FBAD9

FBAD12FBAD10

FBAD8

FBAD15

FBAD14FBAD11

FBAD25

FBAD29

FBAD27

FBAD7

FBAD2

FBAD3FBAD4

FBAD5

FBAD6FBAD1

FBAD0

FBAD19

FBAD30

FBAD16

FBAD26FBAD18

FBAD28

FBAD17FBAD24

FBAD21FBAD31

FBAD22

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0


1D5V_VGA_S0

FBAD[0..31] 84

FBA_CLK0#84FBA_CLK084

FBAD[0..31] 84

FBA_CLK0#84FBA_CLK084

FBA_CMD_2584,89

FBA_CMD_1084,89

FBA_CMD_2184,89

FBA_CMD_2284,89

FBA_CMD_884,89

FBA_CMD_2484,89

FBA_CMD_984,89FBA_CMD_1284

FBA_CMD_2384,89

FBA_CMD_2684,89

FBA_CMD_784,89

FBA_CMD_484,89

FBA_CMD_584,89

FBA_CMD_684,89

FBA_CMD_1384,89FBA_CMD_2984,89

FBA_CMD_2784

FBA_CMD_384


FBA_CMD_1184,89

FBA_CMD_20 84,89

FBA_CMD_0 84

FBA_CMD_2 84

FBA_CMD_0 84


FBA_CMD_2584,89

FBA_CMD_1084,89

FBA_CMD_2184,89

FBA_CMD_2284,89

FBA_CMD_884,89

FBA_CMD_2484,89


FBA_CMD_2384,89

FBA_CMD_2684,89

FBA_CMD_784,89

FBA_CMD_484,89

FBA_CMD_584,89

FBA_CMD_684,89


FBA_CMD_2784

FBA_CMD_384


FBA_CMD_2884,89

FBADQM184FBADQM284

FBADQSN1 84FBADQSP1 84

FBADQSP2 84FBADQSN2 84

FBADQM384FBADQM084



Title


Date: Sheet of


A00VRAM(1/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(1/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(1/4)

A3


<Variant Name>

Modified in SB

A15A10

BA2BA0

RSTODT

BA1

A13

CKE

RAS*

CAS*

CS0*CS1*

DRAM Function

A11

32..63

A7A9A6

CS0*CS1*

0..31

ODT

CKE

A3

A8

A1A12

A3

A2

BA1A13

CMD7CMD6

CMD0CMD1CMD2CMD3

Mode E

GB2-128

CMD4CMD5

CMD2

Single Rank

GB1-128 Mode C

CMD10

CMD25CMD23

CMD26CMD14

CMD0

CMD8

CMD9

CMD7

CMD27

CMD16CMD11CMD15

CMD29

CMD18CMD24CMD20CMD22

A5A6

A1A9

A15

WE*BA2

BA0

A7

A5CMD27

CMD23

CMD28

CMD25CMD24

CMD26

CMD22CMD21CMD3

CMD4CMD5

CMD6

CMD28

CMD17

CMD30

CMD21

CMD13CMD19CMD12

A4WE*

CMD20CMD19CMD18CMD17CMD16CMD15CMD14CMD13CMD12CMD11

CMD8A0 A12

A8A0

A14CAS*

RST

A4A11A2A10

CMD29CMD30

A14RAS*

CMD10CMD9

CMD1

Frame Buffer Patition A Lower 32 bits.

0729

0729

0729

0729

0730 swap pin

0818De-cap

0818De-cap

0818De-cap

0818De-cap

0818De-cap

0818De-cap

0818De-cap

1112 X02 Modify:All of VRAM PCB footprint change to CO-LAY type(DUMMY-BGA96D075133H48) from BGA96D0913H48


12

C8821SC4D

7U6D

3V3KX-GP

DYC8821SC

4D7U

6D3V3KX-G

P

DY

12

C8823

SC1U

6D3V2KX-G

P

DYC8823

SC1U

6D3V2KX-G

P

DY

12

C8820

SC1U

6D3V2KX-G

P

OptimusC8820

SC1U

6D3V2KX-G

P

Optimus

12


OptimusC8839SCD01U50V2KX-1GP

Optimus

12

R88011K05R2F-GPOptimusR88011K05R2F-GPOptimus

12


12

C8806SC1U

6D3V2KX-G

P

OptimusC8806SC

1U6D

3V2KX-GP

Optimus

12

C8811SC1U

6D3V2KX-G

P

OptimusC8811SC

1U6D

3V2KX-GP

Optimus

12

C8814SC

1U6D

3V2KX-GP

OptimusC8814

SC1U

6D3V2KX-G

POptimus

12

C8816

SC1U

6D3V2KX-G

P

OptimusC8816

SC1U

6D3V2KX-G

P

Optimus

12

C8836SC4D

7U6D

3V3KX-GP

OptimusC8836SC

4D7U

6D3V3KX-G

P

Optimus

12

C8813

SC1U

6D3V2KX-G

P

OptimusC8813

SC1U

6D3V2KX-G

P

Optimus

12

C8803SC1U

6D3V2KX-G

P

OptimusC8803SC

1U6D

3V2KX-GP

Optimus

12

C8809SC1U

6D3V2KX-G

P

OptimusC8809SC

1U6D

3V2KX-GP

Optimus

12

C8818

SCD

1U10V2KX-4G

P

OptimusC8818

SCD

1U10V2KX-4G

P

Optimus

12

TC8801ST100U6D3VBM-16GPDY


1 2R8807160R3F-1-GP

OptimusR8807160R3F-1-GP

Optimus

12

C8835SC10U

6D3V3M

X-GP

OptimusC8835SC

10U6D

3V3MX-G

P

Optimus

12

C8822SCD

1U10V2KX-5G

P

DYC8822SC

D1U

10V2KX-5GP

DY

12



12

C8826

SC1U

6D3V2KX-G

P

OptimusC8826

SC1U

6D3V2KX-G

P

Optimus

12

C8812SCD

1U10V2KX-5G

P

OptimusC8812SC

D1U

10V2KX-5GP

Optimus

12

C8834SC10U

6D3V3M

X-GP

OptimusC8834SC

10U6D

3V3MX-G

P

Optimus

12

C8824

SC1U

6D3V2KX-G

P

OptimusC8824

SC1U

6D3V2KX-G

P

Optimus

12

C8808SC1U

6D3V2KX-G

P

OptimusC8808SC

1U6D

3V2KX-GP

Optimus

12

C8840SCD

1U10V2KX-4G

P

OptimusC8840SC

D1U

10V2KX-4GP

Optimus

12

C8815SCD

1U10V2KX-5G

P

OptimusC8815SC

D1U

10V2KX-5GP

OptimusDQSL F3

DQSL# G3

DQSU# B7DQSU C7

DQU0 D7DQU1 C3DQU2 C8DQU3 C2DQU4 A7DQU5 A2DQU6 B8DQU7 A3

ODT K1

RESET# T2CS# L2

NC#J1 J1NC#J9 J9NC#L1 L1NC#L9 L9

NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VSSQ B1VSSQ B9VSSQ D1VSSQ D8VSSQ E2VSSQ E8VSSQ F9VSSQ G1

VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8

VDDQC1VDDQC9VDDQD2VDDQE9VDDQF1

VDDQH2 VDDQH9

VREFCAM8 VREFDQH1

A0N3A1P7A2P3A3N2A4P8A5P2A6R8A7R2A8T8A9R3A10/APL7A11R7A12/BC#N7A13T3

BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3

DQL7 H7DQL6 G2DQL5 H8DQL4 H3DQL3 F8DQL2 F2DQL1 F7DQL0 E3

FBRAM1

H5TQ2G63BFR-11C-GP

Optimus

PCB Footprint = BGA96D0913H48

72.52G63.A0U

2nd = 72.41164.I0U

FBRAM1

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

12

C8804SC1U

6D3V2KX-G

P

DYC8804SC

1U6D

3V2KX-GP

DY

12

C8810SC1U

6D3V2KX-G

P

OptimusC8810SC

1U6D

3V2KX-GP

Optimus

12

C8829

SC1U

6D3V2KX-G

P

OptimusC8829

SC1U

6D3V2KX-G

P

Optimus

12R8804

243R2F-2-GP

OptimusR8804

243R2F-2-GP

Optimus

12

C8817

SC1U

6D3V2KX-G

P

OptimusC8817

SC1U

6D3V2KX-G

P

OptimusDQSL F3

DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM2

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

FBRAM2

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

12

C8837SC4D

7U6D

3V3KX-GP

OptimusC8837SC

4D7U

6D3V3KX-G

P

Optimus

12

C8838SC10U

6D3V3M

X-GP

OptimusC8838SC

10U6D

3V3MX-G

P

Optimus

12

C8802SC1U

6D3V2KX-G

P

OptimusC8802SC

1U6D

3V2KX-GP

Optimus

12



Optimus

12

C8830SCD

01U16V2KX-3G

P

OptimusC8830SC

D01U

16V2KX-3GP

Optimus

12

C8807SC1U

6D3V2KX-G

POptimus

C8807SC1U

6D3V2KX-G

POptimus

12

C8828SCD

01U50V2KX-1G

P

DYC8828SC

D01U

50V2KX-1GP

DY

12

C8827

SC1U

6D3V2KX-G

P

OptimusC8827

SC1U

6D3V2KX-G

P

Optimus

12

C8833SC4D

7U6D

3V3KX-GP

OptimusC8833SC

4D7U

6D3V3KX-G

P

Optimus

12

C8819SCD

1U10V2KX-5G

P

OptimusC8819SC

D1U

10V2KX-5GP

Optimus

12

C8831SC10U

6D3V3M

X-GP

OptimusC8831SC

10U6D

3V3MX-G

P

Optimus

12

C8805SC1U

6D3V2KX-G

P

OptimusC8805SC

1U6D

3V2KX-GP

Optimus

12R8803243R2F-2-GP

OptimusR8803

243R2F-2-GP

Optimus

12

C8825

SC1U

6D3V2KX-G

P

DYC8825

SC1U

6D3V2KX-G

P

DY

12

C8832SC4D

7U6D

3V3KX-GP

OptimusC8832SC

4D7U

6D3V3KX-G

P

Optimus

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBA_VREF34

FBA_VREF34

FBA_ZQ2

FBA_VREF34

FBA_ZQ3

FBA_CMD_7FBA_CMD_14


FBA_CMD_5FBA_CMD_8

FBA_CMD_21

FBA_CMD_28FBA_CMD_4

FBA_CMD_23

FBA_CMD_9


FBA_CMD_13


FBA_CMD_16


FBA_CMD_20

FBA_CMD_19

FBA_CMD_18

FBA_CMD_7FBA_CMD_14


FBA_CMD_5FBA_CMD_8

FBA_CMD_21

FBA_CMD_28FBA_CMD_4

FBA_CMD_23

FBA_CMD_9


FBA_CMD_13


FBA_CMD_16


FBA_CMD_25


FBA_CMD_19

FBAD41

FBAD40

FBAD42

FBAD44

FBAD46

FBAD47FBAD37

FBAD32

FBAD38

FBAD33

FBAD39

FBAD36

FBAD45FBAD43

FBAD34

FBAD56

FBAD58

FBAD57

FBAD60

FBAD55

FBAD53

FBAD54

FBAD62

FBAD63

FBAD59

FBAD35

FBAD61

FBAD50

FBAD48

FBAD51

FBAD49

FBAD52

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

FBAD[32..63] 84

FBA_CLK1#84FBA_CLK184 FBA_CLK1#84

FBA_CLK184

FBAD[32..63] 84




FBA_CMD_2184,88


FBA_CMD_2384,88

FBA_CMD_984,88


FBA_CMD_1384,88

FBA_CMD_2984,88FBA_CMD_684,88FBA_CMD_3084

FBA_CMD_1684

FBA_CMD_2584,88FBA_CMD_1584,88FBA_CMD_1184,88

FBA_CMD_20 84,88

FBA_CMD_19 84

FBA_CMD_18 84




FBA_CMD_2184,88


FBA_CMD_2384,88

FBA_CMD_984,88


FBA_CMD_1384,88

FBA_CMD_2984,88FBA_CMD_684,88FBA_CMD_3084

FBA_CMD_1684


FBA_CMD_2584,88


FBA_CMD_19 84

FBADQM484

FBADQSN4 84FBADQSP4 84 FBADQSN5 84

FBADQSP5 84

FBADQM584


FBADQSP7 84FBADQSN7 84

FBADQM684FBADQM784

Title


Date: Sheet of


A00VRAM(2/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(2/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(2/4)

A3


<Variant Name>

Frame Buffer Patition A Upper 32 bits.

0729

0729

0729

0729

0730 swap pin0730 swap pin



0802 swap pin



DQSL F3DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM4

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

FBRAM4

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

12

R89011K05R2F-GP

Optimus R89011K05R2F-GP

Optimus

1 2R8904160R3F-1-GP


Optimus

12C8901

SCD01U50V2KX-1GP

OptimusC8901

SCD01U50V2KX-1GP

Optimus

12


Optimus C8902SCD01U50V2KX-1GP

Optimus

12 R8905243R2F-2-GP

Optimus

R8905243R2F-2-GP

OptimusDQSL F3

DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM3

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

FBRAM3

H5TQ2G63BFR-11C-GP

Optimus


72.52G63.A0U

2nd = 72.41164.I0U

12 R8903

243R2F-2-GPOptimusR8903

243R2F-2-GPOptimus

12

R89021K05R2F-GP

Optimus R89021K05R2F-GP

Optimus

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBB_VREF12

FBB_ZQ0

FBB_VREF12

FBB_ZQ1

FBB_VREF12

FBB_CMD_25

FBB_CMD_10

FBB_CMD_21

FBB_CMD_22

FBB_CMD_8

FBB_CMD_24

FBB_CMD_9FBB_CMD_12

FBB_CMD_23

FBB_CMD_26

FBB_CMD_7

FBB_CMD_4

FBB_CMD_5

FBB_CMD_6

FBB_CMD_0

FBB_CMD_2FBB_CMD_20

FBB_CMD_13FBB_CMD_29

FBB_CMD_27

FBB_CMD_3


FBB_CMD_28

FBB_CMD_0

FBB_CMD_2FBB_CMD_20

FBB_CMD_25

FBB_CMD_10

FBB_CMD_21

FBB_CMD_22

FBB_CMD_8

FBB_CMD_24

FBB_CMD_9FBB_CMD_12

FBB_CMD_23

FBB_CMD_26

FBB_CMD_7

FBB_CMD_4

FBB_CMD_5

FBB_CMD_6


FBB_CMD_27

FBB_CMD_3


FBB_CMD_28

FBBD18FBBD21

FBBD10

FBBD9

FBBD8

FBBD11

FBBD2

FBBD6FBBD1

FBBD28

FBBD26

FBBD31FBBD22

FBBD29FBBD20

FBBD0

FBBD7FBBD5

FBBD4

FBBD15

FBBD12

FBBD14

FBBD13

FBBD16

FBBD19FBBD23

FBBD17FBBD25

FBBD3

FBBD27

FBBD24

FBBD30

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

FBB_CLK084FBB_CLK0#84

FBBD[0..31] 84

FBBDQSP2 84FBBDQSN2 84

FBBDQM284

FBBDQSP3 84

FBBDQM384

FBBD[0..31] 84

FBBDQSN3 84


FBB_CMD_2584,91

FBB_CMD_1084,91

FBB_CMD_2184,91

FBB_CMD_2284,91

FBB_CMD_884,91

FBB_CMD_2484,91

FBB_CMD_984,91FBB_CMD_1284

FBB_CMD_2384,91

FBB_CMD_2684,91

FBB_CMD_784,91

FBB_CMD_484,91

FBB_CMD_584,91

FBB_CMD_684,91

FBB_CMD_0 84


FBB_CMD_1384,91FBB_CMD_2984,91

FBB_CMD_2784

FBB_CMD_384


FBB_CMD_2884,91

FBB_CMD_0 84


FBB_CMD_2584,91

FBB_CMD_1084,91

FBB_CMD_2184,91

FBB_CMD_2284,91

FBB_CMD_884,91

FBB_CMD_2484,91


FBB_CMD_2384,91

FBB_CMD_2684,91

FBB_CMD_784,91

FBB_CMD_484,91

FBB_CMD_584,91

FBB_CMD_684,91


FBB_CMD_2784

FBB_CMD_384


FBB_CMD_2884,91

FBBDQSN1 84FBBDQSN0 84FBBDQSP0 84 FBBDQSP1 84

FBBDQM184FBBDQM084

Title


Date: Sheet of


A00VRAM(3/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(3/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(3/4)

A3


<Variant Name>

Frame Buffer Patition B Lower 32 bits.

0729

0729 0729

0729



0802 swap



DQSL F3DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM6

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


2nd = 72.41164.I0U

FBRAM6

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


2nd = 72.41164.I0U1

2



Optimus

1 2R9005160R3F-1-GP


Optimus

12


DQSL F3DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM5

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U

PCB Footprint = BGA96D0913H482nd = 72.41164.I0U

FBRAM5

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


12


12 R9001243R2F-2-GP

Optimus

R9001243R2F-2-GP

Optimus

12C9001

SCD01U50V2KX-1GP

OptimusC9001

SCD01U50V2KX-1GP

Optimus

12 R9002243R2F-2-GP

Optimus

R9002243R2F-2-GP

Optimus

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBB_VREF34

FBB_ZQ2

FBB_VREF34FBB_VREF34

FBB_ZQ3


FBB_CMD_19

FBB_CMD_7FBB_CMD_14


FBB_CMD_5FBB_CMD_8

FBB_CMD_21

FBB_CMD_28FBB_CMD_4

FBB_CMD_23

FBB_CMD_9


FBB_CMD_13

FBB_CMD_29FBB_CMD_6FBB_CMD_30

FBB_CMD_16


FBB_CMD_25


FBB_CMD_19

FBB_CMD_7FBB_CMD_14


FBB_CMD_5FBB_CMD_8

FBB_CMD_21

FBB_CMD_28FBB_CMD_4

FBB_CMD_23

FBB_CMD_9


FBB_CMD_13

FBB_CMD_29FBB_CMD_6FBB_CMD_30

FBB_CMD_16


FBB_CMD_25


FBBD44

FBBD43

FBBD51

FBBD50

FBBD48

FBBD49

FBBD54

FBBD35

FBBD34

FBBD33

FBBD47

FBBD63

FBBD59FBBD58

FBBD56FBBD60

FBBD57FBBD62

FBBD39

FBBD37

FBBD32

FBBD36

FBBD38

FBBD40

FBBD61

FBBD52

FBBD55

FBBD53

1D5V_VGA_S0

1D5V_VGA_S0


1D5V_VGA_S0


FBBD[32..63] 84

FBBDQSN4 84FBBDQSP4 84

FBBDQM484

FBBDQSN5 84


FBBDQSP5 84

FBBDQM584

FBBD[32..63] 84


FBB_CMD_19 84




FBB_CMD_2184,90


FBB_CMD_2384,90

FBB_CMD_984,90


FBB_CMD_1384,90

FBB_CMD_2984,90FBB_CMD_684,90FBB_CMD_3084

FBB_CMD_1684


FBB_CMD_2584,90


FBB_CMD_19 84




FBB_CMD_2184,90


FBB_CMD_2384,90

FBB_CMD_984,90


FBB_CMD_1384,90

FBB_CMD_2984,90FBB_CMD_684,90FBB_CMD_3084

FBB_CMD_1684


FBB_CMD_2584,90

FBBDQSN6 84FBBDQSP6 84 FBBDQSN7 84

FBBDQSP7 84

FBBDQM684FBBDQM784

Title


Date: Sheet of


A00VRAM(4/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(4/4)

A3


<Variant Name>

Title


Date: Sheet of


A00VRAM(4/4)

A3


<Variant Name>

Frame Buffer Patition B Upper 32 bits.

0729

07290729

0729

0730 swap pin



0730 swap pin

0802 swap pin



DQSL F3DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM8

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


FBRAM8

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


12

R9101

243R2F-2-GPOptimus

R9101

243R2F-2-GPOptimus

12



Optimus

DQSL F3DQSL# G3

DQSU# B7DQSU C7


ODT K1

RESET# T2CS# L2


NC#M7M7

NC#T7 T7

VSS A9

VSS B3

VSS E1

VSS G8

VSS J2

VSS J8VSS M1VSS M9

VSS P1

VSS P9

VSS T1

VSS T9


VSSQ G9

ZQL8

VDDB2VDDD9VDDG7

VDDK2 VDDK8

VDDN1

VDDN9 VDDR1

VDDR9

VDDQA1 VDDQA8


VDDQH2 VDDQH9

VREFCAM8 VREFDQH1


BA0M2BA1N8BA2M3

CKJ7CK#K7

CKEK9

DMLE7 DMUD3

CAS#K3 WE#L3

RAS#J3


FBRAM7

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


FBRAM7

H5TQ2G63BFR-11C-GP

Optimus

72.52G63.A0U


12 R9105243R2F-2-GP

Optimus

R9105243R2F-2-GP

Optimus

12


12C9101

SCD01U50V2KX-1GP

OptimusC9101

SCD01U50V2KX-1GP

Optimus

1 2R9103160R3F-1-GP


Optimus

12


10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

J J

I I

H H

G G

F F

E E

D D

C C

B B

A A

8209A_EN/DEM_VGA

GN

D_S

ENSE

_1

PWR

_VGA_C

OR

E_D0

PWR

_VGA_C

OR

E_D1

VGA_SENSE_R

PWR_VGA_CORE_VOUT

8209A_PGOOD_VGA

VGA_CORE_UGATE

VGA_CORE_LGATE

PWR_VGA_CORE_VOUT

PWR_VGA_CORE_D0PWR_VGA_CORE_D1

PWR_VGA_CORE_FB

PWR_VGA_CORE_LGATE

PWR_VGA_CORE_UGATE

PWR_VGA_CORE_BOOT PWR_VGA_CORE_BOOT_C

PWR_VGA_CORE_PHASE

PWR_VGA_CORE_TON

PWR_VGA_CORE_VDD

8209A_PGOOD_VGAPWR_VGA_CORE_CS

8209A_EN/DEM_VGA

PWR_VGA_CORE_FB

PU9205_A0PU9205_A1

PU9205_VIN

-

PU9205_VIN

+

PWRCNTL_0PWRCNTL_1

PWR_VGA_CORE_EN_R#

8209A_EN/DEM_VGA PQ9206_3

PWR

_VG

A_SN

UB

DCBATOUT_GPU

5V_S5

VGA_CORE

3D3V_VGA_S0

3D3V_VGA_S0

DCBATOUT DCBATOUT_GPU

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

VGA_CORE

3D3V_S5

DGPU_PWR_EN93

VGA_SENSE83

GND_SENSE 83

DGPU_PWROK 22,83,93

PWRCNTL_1 86

PWRCNTL_0 86

SMBC_INA219 43,85

SMBD_INA219 43,85

Title


Date: Sheet of


A00

DC/DC_VGA CORE_RT8208A


QUEEN 15

JV10-CS

Title


Date: Sheet of


A00



QUEEN 15

JV10-CS

Title


Date: Sheet of


A00



QUEEN 15

JV10-CS

SSID = PWR.Plane.Regulator_GFX

Vout=0.75V*(R1+R2)/R2

Design Current = 32A 45<OCP<50A

ES

P8 & P12

P-State

P0(Hot)L

L

PWRCNTL_0

0.853V

0.954V (default boot up)H

VGA_CORE_PWR

0.878VH

L

L

PWRCNTL_1

RT8208B

Frequency setting 470K -->165KHz 200K -->323KHz 100K -->500KHz

H H

20100702_PWR

P0(Cold)

Modify to PCMC135T-R36MF

0728

FOR NVIDIA VENTURA0705 Modify

0705 Modify

0702 Modify:Change U4306 power source to 3D3V_VGA_S0 from 3D3V_S0.

0712 Modify:Change VENTURA solution part number to 74.00900.079 from 74.00219.079.

0705 Modify:Removed PR9222 sense Resistor.Add PR9215,PR9216,PC9201

0728

0607

0927 PL9201 changelike CPU corepower choke.

0.975V

(GPIO6) (GPIO5)

0805

0809

0915

0923 update table

PR9210//R9209//PR9213

PR9210//PR9213

R9210//PR9209

PR9210

0923Update value of PR9210, PR9209 and PR9213for N12P.

0928Follow Brian suggestion.

A00 1223 not co-lay

A00 1224

12

PC9215

SC4D

7U25V5KX-G

PMUXLESS

PC9215

SC4D

7U25V5KX-G

PMUXLESS

12

PR922710KR2J-3-GP

DY

PR922710KR2J-3-GP

DY

12

PR920810KR2F-2-GP

MUXLESS

PR920810KR2F-2-GP

MUXLESS

1 2PR9202 249KR2F-GP

MUXLESSPR9202 249KR2F-GP

MUXLESS

12



12 PR920110R2F-L-GP

MUXLESSPR9201

10R2F-L-GP

MUXLESS

1 2PR92190R0402-PADPR92190R0402-PAD

12

PC9202

SC4D

7U25V5KX-G

P

MUXLESSPC9202

SC4D

7U25V5KX-G

P

MUXLESS

12

PC92

08SC

D1U

10V2

KX-4

GP

MUXLESS

PC92

08SC

D1U

10V2

KX-4

GP

MUXLESS

12

PC9209

SC10

P50V

2JN

-4G

P

DY

PC9209

SC10

P50V

2JN

-4G

P

DY

12

PC9201

SC1U10V2KX-1GP

MUXLESSPC9201

SC1U10V2KX-1GP

MUXLESS

1 2 3456

PQ9206DMN66D0LDW-7-GP DYPQ9206DMN66D0LDW-7-GP DY

12

PR921210KR2J-3-GPMUXLESS

PR921210KR2J-3-GPMUXLESS

12



12

PC9218SC330P50V3KX-GPDYPC9218SC330P50V3KX-GPDY

12

PR9209300KR2F-GPMUXLESS


12

PC9214

SC4D

7U25V5KX-G

PMUXLESS

PC9214

SC4D

7U25V5KX-G

PMUXLESS

12

PC9207SC1U10V2KX-1GP

MUXLESSPC9207

SC1U10V2KX-1GP

MUXLESS

12

PG9205

GAP

-CLO

SE-P

WR

-3-G

P

PG9205

GAP

-CLO

SE-P

WR

-3-G

P

12


VENTURA PC9216SCD1U10V2KX-5GP

VENTURA

12

PR9228100KR2J-1-GP

DY PR9228100KR2J-1-GP

DY

12

R921375KR2F-GPMUXLESS

R921375KR2F-GPMUXLESS

12

R92273K3R2J-3-GPDY

R92273K3R2J-3-GPDY

12

PC9203

SC4D

7U25V5KX-G

P

MUXLESSPC9203

SC4D

7U25V5KX-G

P

MUXLESS

1 2

PR9205

2D2R3-1-U-GP

MUXLESS PR9205

2D2R3-1-U-GP

MUXLESS

1 2PR92110R0402-PADPR92110R0402-PAD

12

PR922410KR2J-3-GP

DY

PR922410KR2J-3-GP

DY

12

PC9212SC100P50V2JN-3GP

MUXLESS

PC9212SC100P50V2JN-3GP

MUXLESS

12 3

PT9203

ST47

0U2V

DM

-6-G

P-U

2nd = 79.47719.9BL77.24771.15L

MUXLESS

PT9203

ST47

0U2V

DM

-6-G

P-U

2nd = 79.47719.9BL77.24771.15L

MUXLESS

12

PC9205

SC4D

7U25V5KX-G

PMUXLESS

PC9205

SC4D

7U25V5KX-G

PMUXLESS

12

PR922610KR2J-3-GP

MUXLESS

PR922610KR2J-3-GP

MUXLESS

12

PC9211SCD1U10V2KX-4GPMUXLESSPC9211SCD1U10V2KX-4GPMUXLESS

1 2PC9217


PC9217


1 2PR92180R0402-PAD

PR92180R0402-PAD

12

PC9204

SCD

1U25V3KX-G

P

MUXLESSPC9204

SCD

1U25V3KX-G

P

MUXLESS

1 2PR9204 6K2R2F-GPMUXLESSPR9204 6K2R2F-GPMUXLESS

12

PR92

0310

R2J

-2-G

P

MUXLESSPR92

0310

R2J

-2-G

P

MUXLESS

12 3

PT9202

ST47

0U2V

DM

-6-G

P-U

2nd = 79.47719.9BL77.24771.15L

MUXLESS

PT9202

ST47

0U2V

DM

-6-G

P-U

2nd = 79.47719.9BL77.24771.15L

MUXLESS

12

PR921082KR2F-1-GPMUXLESS


12

PC9210

SC10

P50V

2JN

-4G

P

DY

PC9210

SC10

P50V

2JN

-4G

P

DY

12



1 2PR9216

0R0402-PAD

PR9216

0R0402-PAD

12

PR9229100R2J-2-GPDYPR9229100R2J-2-GPDY

1 2PL9201

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

MUXLESS PL9201

L-D36UH-1-GP

68.R3610.20A2nd = 68.R3610.20C

MUXLESS

12 3

PT9204

ST47

0U2V

DM

-6-G

P-U

2nd = 79.47719.9BL77.24771.15L

MUXLESS

PT9204

ST47

0U2V

DM

-6-G

P-U

2nd = 79.47719.9BL77.24771.15L

MUXLESS

12

R92253K3R2J-3-GPDY

R92253K3R2J-3-GPDY

12

PR920710R2J-2-GPMUXLESS


12345

67

SSGD D D D

PU9205IRF6725MTRPBF-GP-U

84.06725.030

MUXLESS2nd = 84.17N03.030

SSGD D D D


84.06725.030


1234

56

SGD D D D

PU9203IRF6721SPBF-GP-U

84.06721.030

MUXLESS2nd = 84.45N03.A30

SGD D D D


84.06721.030


1234

56

SGD D D D


84.06721.030


SGD D D D


84.06721.030


VIN

+1

VIN

-2

GN

D3

VS

4S

CL

5S

DA

6A

07

A1

8PU9206

HPA00900AIDCNR-GP

VENTURA

74.00900.079

PU9206

HPA00900AIDCNR-GP

VENTURA

74.00900.079

12

PR92302D2R5F-2-GP

DY PR92302D2R5F-2-GP

DY

VOUT 1

VDD2

FB 3PGOOD4

D1 5

D0 6

G0 7

LGATE 8

VDDP9

CS10

PHASE 11UGATE 12

BOOT 13

G1 14

EM/DEM15

TON16

GND17

PU9201

RT8208BGQW-GPMUXLESS

PU9201

RT8208BGQW-GPMUXLESS

2 1PD9201

CH551H-30PT-GPDY

PD9201

CH551H-30PT-GPDY

12



1 2PR9206 10KR2J-3-GP

MUXLESSPR9206 10KR2J-3-GP

MUXLESS

1 2PR9217 D004R3720F-GPPR9217 D004R3720F-GP

12

PC9213

SC4D

7U25V5KX-G

P

MUXLESS

PC9213

SC4D

7U25V5KX-G

P

MUXLESS

1 2PC9206

SCD1U25V3KX-GP

MUXLESSPC9206

SCD1U25V3KX-GP

MUXLESS

12

PR922510KR2J-3-GP

MUXLESS

PR922510KR2J-3-GP

MUXLESS

1 2PR92140R0402-PAD

DY

PR92140R0402-PAD

DY

12345

67

SSGD D D D


84.06725.030


SSGD D D D


84.06725.030


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1D5V

_EN

ABLE

_RC

DIS

_1D

5V_V

GA_

S0

1D5V_VGA_EN#

1D5V_VGA_EN

1D5V_VGA_EN#

1D5V_ENABLE

9025_PGOOD_1V PWR_1V_PGOOD

PWR_1V_EN

3.3V_RUN_VGA_1

DG

PU_P

WR

_EN

PWR_1V_VDD

PWR_1V_ADJ

PWR_1V_ENPQ9308_3

PWR_1V_EN#

PR9319_1

PQ9302_G

1D5V_S3 1D5V_VGA_S0

1D5V_VGA_S03D3V_AUX_S5

15V_S5

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_S0

3D3V_S0

3D3V_VGA_S0

1V_PWR 1V_VGA_S0

5V_S5

1D5V_S3

1V_VGA_S0

3D3V_S5

DGPU_PWROK22,83,92

DGPU_PWR_EN92

DGPU_PWR_EN92

DGPU_PWR_EN#18

DGPU_PWR_EN 92

9025_PGOOD_1V85

RUNPWROK19,45,46,47

Title


Date: Sheet of


QUEEN 15 A00

DISCRETE VGA POWERA2


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

AO4468, SO-8Id=?A, Qg=9~12nCRdson=17.4~22m ohm

Discharge Circuit

change low Rds(on) MOSFET0628 Modify:Change PU9305 part number to 84.04468.037 same as U3601&U3602.

1D5V_VGA_S00629 Modify:Add PC9332 10uF 0603.

0628 Modify:Simplify 1D5V_ENABLE control circuit.Rmoved PQ9305,PR9327,PR9328 PQ9306.

G

GD

D

S

S

Park_Madison Does Not Support BACO, So follow Old SequenceSeymour_Whistler_Robson Support BACO, So Change Sequence

0629 Modify:Reserved PD9301 connect DGPU_PWR_EN to PWR_1D5V_EN for power down sequence.

0629 Modify:Reserved PD9302 connect DGPU_PWR_EN to PWR_1V_EN for power down sequence.

VGA_Core should ramp-up before 1V_VGA_S0

1V_VGA_S0 should ramp up before 1D8V_VGA_S0

G9731F11U-GP for 1V_S0

so 1V_VGA_S0 EN have to fine tune RC delayafter VGA_Core

3D3V_VGA_S0 should ramp-up before VGA_Core

3D3V_S0 to 3D3V_VGA_S0 Transfer

3D3V_VGA discharge

dGPU mode

IGPU

IGPU with BACO

DGPU_PWR_EN#

L

H

L

0630 ModifyChange PR9312 to 10K 0402 from 0ohm and stuff PC9318.

0630 Modify:Rename PWR_1D8V_EN to 1D8V_VGA_EN.Rename PWR_1D5V_EN to 1D5V_VGA_EN.

NV do not need 1.8V

Vo(cal.)=1.05V

Iomax<4A

0714 Modify:Change LDO to Max 4A.

Vout = 0.8 xhigih-side R + low-side R

low-side R

0728

0806

0915

0927

A00

A00 1224

A00 1224

A00 1224

A00 1224

2 1PD9301

CH551H-30PT-GP

DYPD9301

CH551H-30PT-GP

DY

12345

678 S

SSGD

DDD

PU9305

AO4468-GP84.04468.037

2nd = 84.08882.037

MUXLESS

SSSGD

DDD

PU9305

AO4468-GP84.04468.037

2nd = 84.08882.037

MUXLESS

1 2PR9326

0R0402-PAD-2-GPMUXLESS

PR9326

0R0402-PAD-2-GPMUXLESS

1 2PR9322 4K7R2F-GP

MUXLESSPR9322 4K7R2F-GP

MUXLESS

1 2PR9337

100KR2J-1-GP

MUXLESS PR9337

100KR2J-1-GP

MUXLESS

12

PC9314

SC10U6D3V5MX-3GP MUXLESS

PC9314

SC10U6D3V5MX-3GP MUXLESS

12

PR9317

470R2J-2-GPDY

PR9317

470R2J-2-GPDY

1 2

PC9315

SC100P50V2JN-3GP

DYPC9315

SC100P50V2JN-3GP

DY

G

S

D

PQ9304

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

MUXLESS

PQ9304

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

MUXLESS

1 2PG9307

GAP-CLOSE-PWR

PG9307

GAP-CLOSE-PWR

12



12

PC9327

SC10

U6D

3V3M

X-G

P

MUXLESSPC9327

SC10

U6D

3V3M

X-G

P

MUXLESS

12

PC9316

SC10U

6D3V5M

X-3GP

DYPC9316

SC10U

6D3V5M

X-3GP

DY

2 1PD9302

CH551H-30PT-GP

DYPD9302

CH551H-30PT-GP

DY

12

PC9318

SCD

1U10V2KX-5G

P

DY

PC9318

SCD

1U10V2KX-5G

P

DY GND 1VEN8

VIN5 VO#4 4POK7 VO#3 3ADJ 2

VPP6

GND9

PU9303

G9731F11U-GPMUXLESS

2nd = 74.05930.03D74.G9731.03D

PU9303

G9731F11U-GPMUXLESS

2nd = 74.05930.03D74.G9731.03D

12

PR9331100KR2J-1-GP

MUXLESS

PR9331100KR2J-1-GP

MUXLESS

12


MUXLESSPC9326

SCD01U50V2KX-1GP

MUXLESS

1 2PR93010R2J-2-GP

DYPR93010R2J-2-GP

DY

12



1 2PG9305

GAP-CLOSE-PWR

PG9305

GAP-CLOSE-PWR

12

PC9332

SC10U6D3V3MX-GPMUXLESS

PC9332

SC10U6D3V3MX-GPMUXLESS

12

PR93242K2R2J-2-GP

MUXLESS

PR93242K2R2J-2-GP

MUXLESS

1 2 3456

PQ93052N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03FMUXLESS

PQ93052N7002KDW-GP84.2N702.A3F


12



1 2

PR9318

100KR2J-1-GPDY

PR9318

100KR2J-1-GPDY

1 2 3456

PQ93032N7002KDW-GP84.2N702.A3F


PQ93032N7002KDW-GP84.2N702.A3F


1 2PR9332 100KR2J-1-GP

MUXLESSPR9332 100KR2J-1-GP

MUXLESS

1 2PR9321

10KR2J-3-GPDY

PR9321

10KR2J-3-GPDY

1 2PR9313

0R0402-PAD-2-GP

MUXLESSPR9313

0R0402-PAD-2-GP

MUXLESS

1 2

PR9311

0R0402-PAD-2-GP

MUXLESSPR9311

0R0402-PAD-2-GP

MUXLESS

1 2

PR9312

0R0402-PAD-2-GP

MUXLESSPR9312

0R0402-PAD-2-GP

MUXLESS

12



1 2

PR9330

20KR2F-L-GP

MUXLESS

PR9330

20KR2F-L-GP

MUXLESS

12

PC9317

SC10U

6D3V5M

X-3GP

MUXLESS

PC9317

SC10U

6D3V5M

X-3GP

MUXLESS

1 2 3456

PQ93112N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03FDY

PQ93112N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03FDY

12

PC9324

SCD1U10V2KX-5GPMUXLESS

PC9324

SCD1U10V2KX-5GPMUXLESS

1 2PG9306

GAP-CLOSE-PWR

PG9306

GAP-CLOSE-PWR

12

PC9313SC1U

6D3V2KX-G

P

MUXLESSPC9313SC1U

6D3V2KX-G

P

MUXLESS

1 2PG9308

GAP-CLOSE-PWR

PG9308

GAP-CLOSE-PWR

SD

G

G

D

PQ9302DMP2130L-7-GP

2ND = 84.03413.A31MUXLESS

84.02130.031G

D

PQ9302DMP2130L-7-GP

2ND = 84.03413.A31MUXLESS

84.02130.031

1 2

PR9319

10KR2F-2-GPMUXLESS

PR9319

10KR2F-2-GPMUXLESS

G

S

D

PQ9307

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

MUXLESSPQ9307

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

MUXLESS

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00LVDS_Switch

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00CRT_Switch

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00TOUCH PANEL

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

SSID = SDIO

(Blanking)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3D3V_S0 1D8V_S0

1D8V_S0

DCBATOUT DCBATOUT

3D3V_S0

DCBATOUT1D5V_S3 1D5V_S3 1D5V_S3 1D5V_S0

1D5V_S3 5V_S55V_S0 5V_S0 3D3V_S5 5V_S5DCBATOUT

DCBATOUT DCBATOUT 3D3V_S5 3D3V_S51D05V_VTT5V_S5 3D3V_S0 3D3V_S01D5V_S3 5V_S0 5V_S0

1D5V_S3 3D3V_S5 3D3V_S5 3D3V_S0 3D3V_S0

3D3V_S0

Title


Date: Sheet of


QUEEN 15 A00UNUSED PARTS/EMI Capacitors

A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

Title


Date: Sheet of



A3


<Variant Name>

CPU Thermal module holestand off

Check test point

0624 Modify:Removed AFTP1,AFTP7~AFTP13.

GPU Thermal module hole

0721 Modify:Removed SPR1

0802 For EMI/ESD.

0818

0901

RF CAP 0915 X01 Modify:Reserved EC9701~EC9723 0.1uF for RF suggestion.

A00 0103 add 3rd LIDON(34.4CK01.501) on HDD1,HDD4,HGPU1,HGPU2 at XBuild batch run

1

H10HOLE335R115-GP

DY

ZZ.00PAD.D01

H10HOLE335R115-GP

DY

ZZ.00PAD.D01

12

EC9714

SCD1U10V2KX-4GP

DYEC9714

SCD1U10V2KX-4GP

DY

1

HGPU1STF237R117H83-1-GP

34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501


34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501

12

EC9722

SCD

1U50V3KX-G

P

DY

EC9722

SCD

1U50V3KX-G

P

DY

12

EC9733

SCD

1U50V3KX-G

P

DY

EC9733

SCD

1U50V3KX-G

P

DY

12

EC9730

SC470P50V-2-G

PEC

9730SC

470P50V-2-GP

12

EC9711

SCD1U50V3KX-GPDY

EC9711

SCD1U50V3KX-GPDY

12

EC9707

SCD1U50V3KX-GP

DY

EC9707

SCD1U50V3KX-GP

DY

12

EC9712

SCD1U10V2KX-4GP

DYEC9712

SCD1U10V2KX-4GP

DY

12

EC9727

SCD

1U50V3KX-G

P

DY

EC9727

SCD

1U50V3KX-G

P

DY

1

H15HT10X10BE10R32-D-5-GP

DYZZ.00PAD.J91


DYZZ.00PAD.J91

12

EC9717

SCD

1U50V3KX-G

P

DY

EC9717

SCD

1U50V3KX-G

P

DY

12

EC9710

SCD1U50V3KX-GP

DY

EC9710

SCD1U50V3KX-GP

DY

1


DYZZ.00PAD.J91


DYZZ.00PAD.J91

12

EC9701

SCD1U10V2KX-4GP

DYEC9701

SCD1U10V2KX-4GP

DY

1

HHD4STF237R117H83-1-GP

34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501


34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501

1


34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501


34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501

12

EC9718

SCD

1U50V3KX-G

P

DY

EC9718

SCD

1U50V3KX-G

P

DY

12

EC9728

SCD

1U50V3KX-G

P

DY

EC9728

SCD

1U50V3KX-G

P

DY

12

EC9702

SCD1U10V2KX-4GP

DYEC9702

SCD1U10V2KX-4GP

DY

1


DYZZ.00PAD.J91


DYZZ.00PAD.J91

12

EC9734

SCD

1U50V3KX-G

P

DY

EC9734

SCD

1U50V3KX-G

P

DY

12

EC9723

SCD

1U50V3KX-G

P

DY

EC9723

SCD

1U50V3KX-G

P

DY

12

EC9737

SC47P50V3JN

-GP

EC9737

SC47P50V3JN

-GP

12

EC9738

SCD

22U50V3ZY-1G

PEC

9738SC

D22U

50V3ZY-1GP

1H4HOLE256R126-GP

ZZ.00PAD.J01

H4HOLE256R126-GP

ZZ.00PAD.J01

1

HBT1STF237R117H123-GP

34.4DM11.0012nd = 34.4A902.001

DY

HBT1STF237R117H123-GP

34.4DM11.0012nd = 34.4A902.001

DY

12

EC9739

SC47P50V3JN

-GP

EC9739

SC47P50V3JN

-GP

1

H9HOLE335R115-GP

ZZ.00PAD.D01

DY

H9HOLE335R115-GP

ZZ.00PAD.D01

DY

12

EC9719

SCD

1U50V3KX-G

P

DY

EC9719

SCD

1U50V3KX-G

P

DY

12

EC9703

SCD1U10V2KX-4GP

DYEC9703

SCD1U10V2KX-4GP

DY

12

EC9724

SCD

1U50V3KX-G

P

DY

EC9724

SCD

1U50V3KX-G

P

DY

12

EC9713

SCD1U10V2KX-4GP

DYEC9713

SCD1U10V2KX-4GP

DY

1

H11HOLE256R126-GP

ZZ.00PAD.J01

H11HOLE256R126-GP

ZZ.00PAD.J01

1

H2HOLE335R115-GP

ZZ.00PAD.D01

DY

H2HOLE335R115-GP

ZZ.00PAD.D01

DY

12

EC9704

SCD1U50V3KX-GPDY

EC9704

SCD1U50V3KX-GPDY

12

EC9725

SCD

1U50V3KX-G

P

DY

EC9725

SCD

1U50V3KX-G

P

DY

1

H12HOLE256R126-GP

ZZ.00PAD.J01

H12HOLE256R126-GP

ZZ.00PAD.J01

12

EC9735

SC47P50V3JN

-GP

EC9735

SC47P50V3JN

-GP

1


DYZZ.00PAD.J91


DYZZ.00PAD.J91

12

EC9720

SCD

1U50V3KX-G

PDY

EC9720

SCD

1U50V3KX-G

PDY

1

HTML1HOLE197R166-GP

DY

HTML1HOLE197R166-GP

DY

12

EC9705

SCD1U50V3KX-GP

DY

EC9705

SCD1U50V3KX-GP

DY

12

EC9708

SCD1U50V3KX-GP

DY

EC9708

SCD1U50V3KX-GP

DY

12

EC9715

SCD1U10V2KX-4GP

DYEC9715

SCD1U10V2KX-4GP

DY

12

EC9731

SCD

1U50V3KX-G

PDY

EC9731

SCD

1U50V3KX-G

PDY

12

EC9736

SCD

1U50V3KX-G

P

DY

EC9736

SCD

1U50V3KX-G

P

DY1


DYZZ.00PAD.J91


DYZZ.00PAD.J91

12

EC9726

SCD

1U50V3KX-G

P

DY

EC9726

SCD

1U50V3KX-G

P

DY

1

HTML2HOLE197R166-GP

DY

HTML2HOLE197R166-GP

DY

12

EC9716

SCD

1U50V3KX-G

P

DY

EC9716

SCD

1U50V3KX-G

P

DY

1

HTML3HOLE197R166-GP

DY

HTML3HOLE197R166-GP

DY

1

H3HOLE256R126-GP

ZZ.00PAD.J01

H3HOLE256R126-GP

ZZ.00PAD.J01

1

H6HOLE237R95-GP

DY

ZZ.00PAD.921

H6HOLE237R95-GP

DY

ZZ.00PAD.921

12

EC9721

SCD

1U50V3KX-G

P

DY

EC9721

SCD

1U50V3KX-G

P

DY

12

EC9706

SCD1U50V3KX-GP

DY

EC9706

SCD1U50V3KX-GP

DY

1


34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501


34.4CK01.0012nd = 34.4CK01.4013rd = 34.4CK01.501

12

EC9709

SCD1U50V3KX-GP

DY

EC9709

SCD1U50V3KX-GP

DY

12

EC9732

SCD

1U50V3KX-G

P

DY

EC9732

SCD

1U50V3KX-G

P

DY

12

EC9729

SC470P50V-2-G

PEC

9729SC

470P50V-2-GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Power SequenceA1


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Power SequenceA1


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Power SequenceA1


<Core Design>

T33D3V_AUX_KBC

DCBATOUT

S5_ENABLE

KBC GPIO43 to PCH

(DC mode)(AC mode)

T4

EC_ENABLE#_1(GPIO31) keep low

T5

T7

PCH_SUSCLK_KBCPCH to KBC GPIO00

T8

Huron River Platform Power Sequence

5V_S5

S5_ENABLE

3D3V_S5KBC GPIO34 control power on by 3V_5V_EN

3D3V_AUX_S5

T3

PM_PWRBTN#

KBC_PWRBTN#

KBC GPIO20 to PCH

T9

T4

RTC_RST#

DCBATOUT

+RTC_VCC

T2

T1RTC_RST#

+RTC_VCCT1

>10ms

+5V_ALW & +3.3V_ALW need meet 0.7V difference

T5+5VA_PCH_VCC5REFSUS

T6

+5V_ALW & +3.3V_ALW need meet 0.7V difference

+5VA_PCH_VCC5REFSUS

PM_RSMRST#

Press Power button

3D3V_AUX_S5

T2

red word: KBC GPIO

Platform to KBC PSL_IN2

KBC GPIO34 control power on by 3V_5V_EN

red word: KBC GPIO

>9ms

Within logic high level and disable ifit is less than the logic low level.

V5REF_Sus must be powered up beforeVccSus3_3, or after VccSus3_3 within0.7 V. Also, V5REF_Sus must powerdown after VccSus3_3, or beforeVccSus3_3 within 0.7 V.

V5REF_Sus must be powered up beforeVccSus3_3, or after VccSus3_3 within0.7 V. Also, V5REF_Sus must powerdown after VccSus3_3, or beforeVccSus3_3 within 0.7 V.

>9ms

Sense the power button status

>5ms

5V_S5

3D3V_S5

KBC GPIO43 to PCH

PCH_SUSCLK_KBCPCH to KBC GPIO00

PM_RSMRST#(EC Delay 40ms)

<90ms

T7

T8

T6

AC_PRESENT

>10ms

>5msKBC GPO84 to PCH

0ms<Not floating.

3D3V_AUX_KBC

>16ms

ACPlatform to KBC PSL_IN2

PM_PWRBTN#

KBC_PWRBTN#

T9

AC

Press Power button

KBC GPIO20 to PCH

Sense the power button status

This signal has an internalpull-up resistor and has aninternal 16 ms de-bounce on theinput.

Enable by PM_SLP_S4#

>30usKBC GPIO23 to LAN

PM_SLP_S3#

PM_SLP_S4#T11

PM_LAN_ENABLE

T12

T10

AC PM_PWRBTN#

PCH to KBC GPIO44

PCH to KBC GPIO01

1D8V_S0

DDR_VREF_S3(0.75V)

5V_S0

1D5V_S0

3D3V_S0

1D5V_S3

+5V_RUN & +3.3V_RUN need meet 0.7V difference

+5VS_PCH_VCC5REF

V5REF must be powered up beforeVcc3_3, or after Vcc3_3 within 0.7 V.Also, V5REF must power down afterVcc3_3, or before Vcc3_3 within 0.7 V.

T13

T17

T23

0D85V_S0T24

D85V_PWRGDTPS51461RGER PGOOD

0D85V_S0

CPU SVID BUS

VCC_CORE

VCC_GFXCORE

T25<2000us50us<

IMVP_PWRGDISL95831 PGOOD to system

T26<5ms

DMI

<200usPLT_RST#

T36

PCH to all system

H_CPUPWRGD

T35 <100ms

PCH to CPU

1ms<

T28>0usPWROK

KBC GPIO77 to PCH

PCH to CPU

1D8V_S0T325ms< <650ms

T27>99msALL_SYS_PWRGD=D85V_PWRGD

This signal represents the PowerGood for all the non-CORE andnon-graphics power rails.

D85V_PWRGDT292ms< <650ms

T16

T14

T15

VT357FCX PGOOD1D05V_VTT T21

T22

RUNPWROK T20

1.05VTT_PWRGD

0D75V_S0

T18

T19

CLK_EXP_P

T30

DC PCH_RSMRST#

>16ms

SetVID ACK

VDDPWRGOOD

SYS_PWROK

>1msT31 >2ms

T34>1ms+60us

T10

T33 >0ms

Enable by PM_SLP_S4#

>30usKBC GPIO23 to LAN

PM_SLP_S3#

PM_SLP_S4#T11

PM_LAN_ENABLE

T12

PCH to KBC GPIO01

PCH to KBC GPIO44

1D8V_S0

DDR_VREF_S3(0.75V)

5V_S0

1D5V_S0

3D3V_S0

1D5V_S3

+5V_RUN & +3.3V_RUN need meet 0.7V difference

+5VS_PCH_VCC5REF

V5REF must be powered up beforeVcc3_3, or after Vcc3_3 within 0.7 V.Also, V5REF must power down afterVcc3_3, or before Vcc3_3 within 0.7 V.

T13

T17

T23

0D85V_S0T24

D85V_PWRGDTPS51461RGER PGOOD

0D85V_S0

CPU SVID BUS

VCC_CORE

VCC_GFXCORE

T25<2000us50us<

IMVP_PWRGDISL95831 PGOOD to system

T26<5ms

DMI

<200usPLT_RST#

T36

PCH to all system

H_CPUPWRGD

T35 <100ms

PCH to CPU

1ms<

T28>0usPWROK

KBC GPIO77 to PCH

PCH to CPU

1D8V_S0T325ms< <650ms

T27>99msALL_SYS_PWRGD=D85V_PWRGD

This signal represents the PowerGood for all the non-CORE andnon-graphics power rails.

D85V_PWRGDT292ms< <650ms

T16

T14

T15

VT357FCX PGOOD

1D8V_S0 & 1D5V_S3 power ready

1D05V_VTT T21

T22

RUNPWROK T20

1.05VTT_PWRGD

0D75V_S0

T18

T19

CLK_EXP_P

T30

SetVID ACK

VDDPWRGOOD

SYS_PWROK

>1msT31 >2ms

T34>1ms+60usT33 >0ms

1D8V_S0 & 1D5V_S3 power ready

N12P-GE Power-Up/Down Sequence

8209A_EN/DEM_VGA(Discrete only)

DGPU_PWR_EN#(Discrete only)PCH GPIO54 output

3D3V_VGA_S0(VDD33)

VGA_CORE(NVVDD)

3D3V_S0

tNV-FBVDDQ >0ms

For power-down, reversing the ramp-up sequence is recommended.

tNVVDD >0msRT8208 PGOOD

DGPU_PWROK(Discrete only)

1D5V_VGA_S0(FBVDDQ)

tPOWER-OFF <10ms

First rail to power down

Last rail to power down

VGA_CORE,1V_VGA_S01D5V_VGA_S0,3D3V_VGA_S0

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Power Sequence DiagramA2


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

DCBATOUT5V_S5

8

11

13

IMVP_PWRGD

H_CPUPWRGD

DCBATOUT

AC

SWITCH

Adapter inPage38

PWR_CHG_ACOK

ChargerBQ24745

AD+

Page40

DCBATOUT

+RTC_VCC

Page40

VIN

(3V/5V)

RT8223MGQW

ENC

Page41

DC/DC

RTC battery

-8

APWROK

SYS_PWROK

PWROK

TPS51218DSCR

VOUT

PWRBTN#

RSMRST#

VR_ON

SVID

3D3V_AUX_S5

RTC_AUX_S5

-7

3

DCBattery

Page39

BT+

PLTRST#

PM_RSMRST#

PM_PWRBTN#

-6

-5

ACOK

3D3V_AUX_S5

5V_AUX_S5

3D3V_S5

5V_S5

VREG5

VREG3

PWR_5V3D3V_ENC

Page27

GPIO20

GPIO43

GPIO6

KBC NPCE795P

GPIO34

LL1

LL2

-3.2

PUMP15V_S5

-3.3

PGOOD3V_5V_POK

-1

Power Button

1

-2.1SLP_S4# SLP_S3#

PM_SLP_S4#EN

EN

PM_SLP_S3#

SWITCHPage37

3D3V_S0

SWITCHPage37

5V_S0

REF

VTT0D75V_S0

PGDRUNPWROK

VCC_CORE

VCC_GFXCORE

PGOOD

PM_SLP_S3#EN

PGDRUNPWROK

TPS53311RGTR

VOUT

5

VDD VIN

5V_S5 3D3V_S5

1D8V_S04

5

S0_PWR_GOOD

S5_ENABLE

3

KBC_PWRBTN#

VR

PM_SLP_S4#

4

DDR_VREF_S3

RUNPWROK

5

5a

Wistron HURON RIVER POWER UP SEQUENCE DIAGRAM

V5IN VIN

5V_S5 DCBATOUT

RT8208BGQW

VOUTVIN

1.05VTT_PWRGDEN

DCBATOUT

0D85_S0

PGOODD85V_PWRGD

5a

OUTPUT

PGOOD1.05VTT_PWRGD

1D05_VTT

DRAMPWRGD

PROCPWRGD

7

Cougar Point PCH

-4

GPIO70AC_IN#

9

PLT_RST#

Page46

Page47

Page45

Page48

Page42 & 43 & 44

12

2

PM_SLP_S3#

PM_SLP_S4#GPIO44

GPIO01

GPIO77

SWITCHPage37

1D5V_S0

VDDP

5V_S5

Power Up Sequence: -8 ~ 13

PM_DRAM_PWRGD

OUTPUT

ISL95831HRTZ

IMVP_VR_ON

SVID

VIN

1D5V_S3

TPS51116RGER

VOUTVDDP VIN

6

-6.1-5

-2

3V_5V_EN S5_ENABLE

3D3V_AUX_KBC-3

-3.1

-3.1 -3.1 -3.1

D85V_PWRGD

6

S0_PWR_GOOD

IMVP_PWRGD

AND GATE

A

BY

10SYS_PWROK

SYS_PWROK

10

SVID

SVID 8

RSTIN#

SM_DRAMPWROK

UNCOREPWRGOOD

Sandy Bridge CPU

AND GATE

A

BY

0D75V_ENVDDPWRGOOD

H_CPUPWRGD_R

BUF_CPU_RST#

BJT

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Power Block DiagramA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Charger

BQ24745

+PBATT

Adapter

Battery

TPS51123RGER

5V_AUX_S5

Regulator LDO Switch

5V_S53D3V_AUX_S5

AO4468

5V_S0

3D3V_S5

ISL95831HRTZ

VCC_CORE

TPS51218DSCR

DCBATOUT TPS51216RUKR

0D75V_S0DDR_VREF_S3

1D5V_S0

1D5V_S3

Power Shape

AO4407A

15V_S5

1D05V_VTT

1D8V_S0

1D8V_VGA_S0

TPCA8062

G547F2P81U

5V_USB1_S3

PA102FMG

3D3V_LAN_S5

AO4468

3D3V_S0

RTS5138

3D3V_CARD_S0LCDVDD

DMP2130L

3D3V_AUX_KBC

For Discrete

+1.2V_LOM

RTL8111E

CRT Board USB Power

RT8208B VGA_CORE

3D3V_VGA_S0

For Discrete For Discrete

For Discrete

1D5V_DDR_S0

RT90251V_VGA_S0

VCC_GFXCORE

For UMA

0D85V_S0

AO4468

TPS51311RGTR

DMP2130LG5285T11UAO4468

APL5916KAI

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet of


QUEEN 15 A00

SMBUS Block DiagramA2


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

3D3V_VGA_S0

¡E

TPDATA

TPCLK

3D3V_S0

¡E

¡E¡E

TouchPad Conn.TPDATA

TPCLKPSCLK1

PSDAT1

VGA

LCD CONN

PCH SMBus Block Diagram

PCH

SMBCLK

SMBDATA

GPIO74/SDA2

GPIO73/SCL2

KBC

CLK_SMB

3D3V_S0

¡E

SRN2K2J-1-GP

3D3V_S5

¡E

¡E¡E

SRN2K2J-1-GP

3D3V_S0

2N7002SPT

¡E

¡E¡E

DAT_SMB

BAT_SCL

BAT_SDA

DDC1DATA

DDC1CLK

MinicardWLANSMB_DATA

SMB_CLK

GPIO17/SCL1

GPIO22/SDA1

SML1_CLK

SML1_DATA

SMBus address:xx

SMBus Address:A0

SMBus Address:A4

DIMM 1SCL

SDA

3D3V_AUX_KBC

¡E

DIMM 2SCL

SDASMBus address:16

SMB_CLK

SMB_DATA

PCH_SMBCLK

PCH_SMBDATA

BATA_SCL_1

BATA_SDA_1

KBC SMBus Block Diagram

Battery Conn.PCH_SMBCLK

PCH_SMBDATA

G-Sensor

SCLK

SDATA

PCH_SMBCLK

PCH_SMBDATA

BQ24745SCL

SDA

TPDATA

TPCLK

PCH_SMBDATA

PCH_SMBCLK

¡E¡E

SMBus address:12

2N7002DW-1-GP

¡E

¡E

3D3V_S0

SRN2K2J-1-GP

CRT CONNCRT_DDCCLK_CON

CRT_DDCDATA_CON

CRT_DDC_CLK

CRT_DDC_DATA

DDC2CLK

DDC2DATA

SRN10KJ-5-GP

SRN4K7J-8-GP

SRN2K2J-1-GP

NPCE795P

SRN100J-3-GP

SRN2K2J-1-GP

GPU_HDMI_CLK

GPU_HDMI_DATA

3D3V_VGA_S0

¡E

HDMI CONNDDC2DATA

DDC2CLK

SML0CLK

SML0DATA

SML0_CLK

SML0_DATA

3D3V_S5

¡E

SRN2K2J-1-GP

MinicardW-WANSMB_DATA

SMB_CLK

PCH_SMBDATA

PCH_SMBCLK

¡E¡E

¡E¡E

VGA_CRT_DDCDATA

VGA_CRT_DDCCLK

UMA

LVDS_DDC_CLK_R

LVDS_DDC_DATA_R

SRN0J-6-GP

L_DDC_DATA

L_DDC_CLK

CRT_DDC_DATA

CRT_DDC_CLK

SDVO_CTRLDATA

SDVO_CTRLCLK

5V_HDMI

¡E

SRN1K5J-GP

PCH_HDMI_DATA

PCH_HDMI_CLK Level Shift

DDC_CLK_HDMI

DDC_DATA_HDMI

DIS

¡E

3D3V_S0

SRN2K2J-1-GP

SRN0J-6-GP

UMA

UMA

UMA

UMA

UMA

SRN0J-6-GP

DIS

UMA

¡E

3D3V_S0

SRN2K2J-1-GP

DIS

3D3V_S0

SRN2K2J-8-GP

3D3V_S5

¡E

3D3V_S0

5V_S0

¡E

SRN10KJ-6-GP

SML1_CLK

SML1_DATA To KBCSML1DATA

SML1CLK

PCHSCL

SDA

LVDS_DDC_CLK

LVDS_DDC_DATA

CLK

DATA

SRN0J-6-GP

DIS

GPU_LVDS_CLK

GPU_LVDS_DATA

DDC_CLK_HDMI

DDC_DATA_HDMI

SRN0J-6-GP

DIS

Level Shift

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet of


QUEEN 15 A00

Thermal/Audio Block DiagramCustom


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Title


Date: Sheet of


QUEEN 15 A00



<Core Design>

Thermal Block Diagram

UMAThermalP2800

DXP

DXN

Audio Block Diagram

Codec

92HD79B1HP

OUT

MIC

IN

SPEAKER

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

SPKR_PORT_D_L-

SPKR_PORT_D_R+

DMIC_CLK/GPIO1

DMIC0/GPIO2

MMBT3904-3-GP

HP1_PORT_B_L

HP1_PORT_B_R

AnalogMIC

PORTC_L

PORTC_R

VREFOUT_C

Put under CPU(T8 HW shutdown)

P2800_DXP

P2800_DXN

THRMDC

THRMDA

VGA

MMBT3904-3-GP

Place near CPUPWM CORE

Place near GPU(DISCRETE only).

VGAThermal P2800

DXP

DXN

P2800_VGA_DXP

P2800_VGA_DXN

SC2200P50V2KX-2GPSC2200P50V2KX-2GP

SC2200P50V2KX-2GP

MMBT3904-3-GP

TDR

TDLKBCNPCE795P

GPIO5

GPIO92

SYS_THRM

CPU_THRM

GPIO4 TDRVGA_THRM

PAGE28

PAGE28

PAGE27

OTZ2N7002

THERM_SYS_SHDN#S

D

GIMVP_PWRGD

PURE_HW_SHUTDOWN#

VR

3V/5VENPGOD

OTZ

T8

PH

FAN CONTROL

PAGE28

VIN VSET

FAN

1_D

AC

GPIO94

5V

VOUT

FAN VIN

TACH

GPIO56

FAN

_TA

CH

1

P2793

DigitalMIC

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

DATA PAGE Change Iteam

08/25 14 SWAP SA0_DM1 and SA1_DIM1 each other for DM2 can't boot up issue.

08/29 28 Change U2802 Main source to 74.00991.031, 2nd 74.02793.A31,3rd 74.05606.071

08/29 61 Add 2nd 77.C1071.20L on TC6101.

08/29 64 Re-assign FP1 pin define.

08/29 71 Un-stuff Debug port connector(DB1) on X01.

08/29 37Change U3701 pin2 to RUNPWROK from 0D75V_EN. Reserved R3717 0ohm between PM_DRAM_PWRGD and VDDPWRGOOD_R.

08/29 37 Change R2724 to 20K 0402 from 10K for X01 stage.

08/29 40 Change 3D3V_AUX_S5 to 3D3V_AUX_KBC to avoid leakage Voltage to 3D3V_AUX_KBC under DC mode.

08/31 51 HDMI1 change to 22.10296.311 from 22.10296.271

08/31 28 FAN1 change to 20.F0772.003 from 20.F1639.004

08/31 57 E-SATA1 change to 22.10321.W11 from 22.10290.141

09/01 41 PU4104 and PU 4105 horizontally mirror.

09/01 83 R8305 Change to 30K ohm.

09/01 97 H1, H5, H13, H7 and H15 change to ZZ.00PAD.J91 from ZZ.00PAD.D01.

09/01 56 HDD1 add 2nd=62.10065.121.

09/01 79 U7901 change main source to 74.00351.0B3.

09/01 42 PR4226 change to 5.62K ohm.

09/01 45 PTC4502 change to 79.3971V.30L.

09/03 61 U6101 add 2nd=74.00547.079.

09/03 49 U4901 add 2nd=74.09724.09F.

09/03 40 PU4002 and PU4003 add 2nd=84.P1403.B37.

09/03 24 L2401,L2402,L2403 add 2nd=68.10090.10B.

09/03 27 DY C2713. Add C2722.

09/03 47 Add PR4702

09/03 22 Change FFS_INT2_R from PCH GPIO48 to GPIO15Removed R2220 and change R2201 default pull up to pull down.

09/06 20 X2001 add 3rd=82.30020.A31.

09/06 56 U5601 add 2nd=74.02191.079.

09/06 PU9303 add 2nd=74.05930.03D.93

09/06 37 U3701 add 2nd=73.7SZ08.DAH.

09/06 23 Add 2nd and 3rd for L2301.

09/06 23 R434 change name to PR9321. Add PC9324 and PR9319 for soft start.

09/06 61 TC6101=80.10715.B1L, 2nd=77.C1071.21L, 3rd=77.C1071.20L.

09/06 56 ODD1 add 2nd and 3rd source. HDD1 add 3rd source.

09/06 49 LCD1 add 2nd source.

09/06 69 TPAD1 add 2nd.


09/06 15 DM1 2nd=62.10017.Q31, 3rd=62.10017.K01.

09/06 14 DM2 2nd=62.10017.P31, 3rd=62.10017.K11.

09/07 68 Add 2nd source 20.K0343.004 on PWRBTN1& PWRBTN2 base on updated connector list.

09/07 69 Add 2nd source 20.K0343.004 on KBLIT1 base on updated connector list.

09/07 82 Add 2nd source 20.F0085.040 on CRTBD1 base on updated connector list.

09/07 64 Add 2nd source 20.K0382.006 on FP1 base on updated connector list.

09/07 75 Add 2nd source 20.K0382.026 on NEW1 base on updated connector list.

09/07 4~10 Updated CPU1 footprint to SKT-BGA989C470395-1H180 from SKT-BGA989C470395-1H186 base on data base updated.Add 2nd source 62.10040.771 on CPU1 base on updated connector list.

09/07 75 Change CARD1 to 20.I0129.001 from 62.10051.931 from ME double updated latest DXF&EMN on X01.

09/07 93 PQ9308 change name to PQ9311.

09/07 ALL Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

2809/07 Change U2801,U2803 to 74.02800.A71 from 74.02800.071 from vender updated parts.Change R2803&R2817 to 107K from 499K,R2804&R2818 to 226K from 102K base on updated ADJ Table.

09/08 18, 22 Change FFS_INT2_R from PCH GPIO48 to GPIO14 Keep PCH_GPIO5 PH R2201,PCH_GPIO48 PH R2220.Add R1818.

09/08 82 1.Rename IOBD1 pin20,22,26,28 to IOBD1_20,22,26,28 from PCIE_TXN5,PCIE_TXP5,PCIE_RXP5,PCIE_RXN5.2.Add RN8207,RN8208 for optional USB3.0 PCIE or USB2.0 signal.

09/08 18 Reserved USBP9~USBP10 to IOBD1 pin20,22,26,28.

09/08 37 Stuff Q3704,R3710; un-stuff R3716. U3701 pin2 change to 1.05VTT_PWRGD from RUNPWROK.

09/08 20 DY R2002.

09/08 47 Mount PC4710.

09/08 98 Update N12P power sequence.

09/09 82 R8201, R8202 and R8203 change to 62 ohm.

09/10 45 Change PL4501 to 68.2R210.20C from IND-D56UH-27-GP base on Brian updated.

09/10 41 Change PL4101,PL4102 to 68.2R210.20B from 68.2R210.20Q base on Brian updated.

09/10 82 Rename IOBD1 pin14 to IOBD1_14 from USB30_SMI#.Add R8207 for USB20 USB_OC#10_11Add R8206 for USB30 USB30_SMI#Add R8208 for USB20 USB signal.Add R8207 for USB30 PCIE signal.

09/10 49 Add TPNL1 for touch panel solution 4pin connector.Change LCD1 to 20.F1816.030 for 30pin Re-assign LCD1 pin define base on Roy updated cable pin define list.

09/10 51 Change HDMI1 part number to 22.10296.331 from 22.10296.311 base on ME Double updated.

X01X01

VERSION VERSION

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>


09/13 83 Change X8501 to 82.30034.641;2nd 82.30034.651;3rd 82.30034.681 from sourcer suggestion.


09/13 Change KBLIT1, PWRBTN2 and TPAD1 2nd source from 20.K0343.004 to 20.K0382.004.

09/13 Change 1.8V power solution.47

09/14 82 Change R8201~R8203 to 470ohm from 100ohm.Add RN8209 PH 5V_S5 on MEDIA_LED1~3# for PWM OD mode.

09/14 40 Add 2nd source 84.04835.H37 on PU4002,PU4003 base on Brian updated 2nd source excel file.

09/14 58 Change SPK1 to 20.F0772.004 from 20.F1647.004 from Double updated.

09/14 51 Add R5101~R5108and reserved TR5101~TR5104 on all of HDMI differential pair for EMC suggestion.Rename HDMI1 CONN NET name.

09/14 29 Add R2920,R2921 and reserved EC2901,EC2902 on AUD_DMIC_CLK &AUD_DMIC_IN0 for EMC suggestion.

09/14 75 Add R7503,R7504 and reserved EC7501,EC7502 on CLK_PCIE_NEW &CLK_PCIE_NEW# for EMC suggestion.Rename NEW1 pin24,25 to USB_PP13_R&USB_PN13_R.Rename NEW1 pin8,9 to CLK_PCIE_NEW_C&CLK_PCIE_NEW#_C

09/14 20 Reserved EC2004,EC2005 on CLK_PCIE_NEW &CLK_PCIE_NEW# for EMC suggestion.

09/14 49 Reserved EC4910~EC4915 on LVDS signal for EMC suggestion.

09/15 58 Re-assign SPK1 pin define base on Roy updated excel file for 20.F0772.004

09/15 51 Add 2nd source 22.10296.311 on HDMI1 from updated connector list.

09/15 68 Add 2nd source 20.K0382.004 on PWRBTN1& PWRBTN2 base on updated connector list.

09/15 82 Re-assign CRTBD1 pin define base on EMC suggestion.

09/15 49 Change BLON_OUT_C to pin 15 and pin 4 to NC on LCD1.

09/15 28, 51,82 Add test point for WKS AFTE request.

09/15 All ADD 2nd source follow Power team suggestion.

09/15 92, 93 Modify PR9318 and PR9228 power source from 3D3V_AUX_S5 to 3D3V_S5.

09/15 86 Reserve Q8602, C8603 and R8606 for VGA over temp.

09/15 20 RN2005 swap net.

09/15 19 RN2005 swap net.

09/15 48 Change PR4809 to 10K from 100K PH power source change to 3D3V_S0 from S5.

09/15 82 Re-assign CRTBD1 pin define base on EMC suggestion.

09/15 97 Reserved EC9701~EC9723 0.1uF for RF suggestion.

09/15 41 Un-stuff PU4101,PD4105,PR4124, PR4125,PR4101 at X01 stage for 5mW issue.

09/15 69 un-stuff R6907 and stuff R6905,Q6902,R6906 for 5V drive CAP LED.

09/17 82 Change IOBD1 part number to 20.F1849.080 base on Double updated latest DXF&EMN.

09/17 49,5732,64

stuff TR4901 and un-stuff R4911,R4912 at X01 stage from EMC Neo suggestion.stuff TR4902 and un-stuff R4908,R4909 at X01 stage from EMC Neo suggestion.stuff TR5701 and un-stuff R5718,R5719 at X01 stage from EMC Neo suggestion.stuff TR3201 and un-stuff R3211,R3210 at X01 stage from EMC Neo suggestion.stuff TR6401 and un-stuff R6403,R6404 at X01 stage from EMC Neo suggestion.

09/17 20 Change RN2010~RN2016 to 33ohm from 0ohm from EMC Neo suggestion.

09/17 40,41 Stuff EC4002 0.1uF from EMC Neo suggestion.Stuff EC4008 0.1uF from EMC Neo suggestion.Stuff EC4102,EC4103 0.1uF from EMC Neo suggestion.Stuff EC4107 0.1uF from EMC Neo suggestion.Stuff PC4119,PC4120 0.1uF from EMC Neo suggestion.Stuff EC4006,EC4007 0.1uF from EMC Neo suggestion.

09/17 37 Change R3710 to 100K from 0ohm to avoid impact 1.05VTT_PWRGD turn off sequence directly.

09/17 17 Add R1703~R1705 on RGB signal and reserved EC1701~EC1703 0.1u from EMC Neo suggestion.

09/17 EC6001 change to 10p from 4.7p and default stuff from Neo suggestion.EC1801 change to 10p from 4.7p and default stuff from Neo suggestion.

60,18

09/17 44 default stuff EC4407,EC4405,EC4403,EC4410 base on EMC Neo suggestion.

09/17 49 Add 2nd source 20.F1561.004;3rd source 20.F1686.004 on TPNL1 from updated connector list.

09/17 49 Add 2nd source 20.F1561.004;3rd source 20.F1686.004 on TPNL1 from updated connector list.

09/17 82 Change R8201~R8203 to 430ohm.

09/17 48 Change PR4809 to 4.7K from 100K PH power source change to 3D3V_S0 from S5.

09/17 40,27,83 Rename PCIE_RST# to AD_IA_HW2 on KBC GPIO50 for power Tom suggest.Reserved PQ4004,PR4036,PR4037 for AD_IA_HW2 function.

09/17 68 Rename CHARGER_LED1 to CHARGERLED1.Rename FPOWER_LED1 to FPOWERLED1.Rename HDD_LED1 to HDDLED1.Rename TP_LOCK_LED1 to TPLOCKLED1.Rename TP_LOCK_LED2 to TPLOCKLED2.Rename WLAN_LED1 to WLANLED1

09/17 21,22 Base on layout routing,Add RN2104 10K instead of R2111 10K.Move EC_SCI#,DBC_EN to RN2201. Move S_GPIO to RN2103. Move PSW_CLR# to RN2104.

09/17 56 Change R5605 to 100K from 10K and PH to 5V_S0 from 3D3V_S0 to meet Vgs>2V turn on.

09/17 56 Add Q2706 2N7002 to avoid leakage loop from 3D3V_S5 to 3D3V_AUX_KBC issue when 10mW latched fail timing.

09/17 ALL Change all of 0402 0ohm to 0R0402 short pad.PR4008,PR4010,PR4012,PR4020,PR4023,PR4024,PR4027,PR4028,PR4029,PR4225PR4102,PR4113,PR4118,PR4121,PR4203,PR4204,PR4215,PR4222,PR4231,PR4243,PR4301,PR4509,PR4510,PR4801,PR4804,PR4805,PR4808,PR4810,PR9211

F4902,PR4017,PR4018,PR4106,PR4611,PR4710,PR4807,R2304,R2403,R2406,R2409,R2702,R2902,R2903,R2904

R2305

09/20 9 Add 2nd for TC901.

09/20 83 Add 2nd for L8303.

09/20 82 Add 2nd for LD8201.

09/20 86 Add 2nd for Q8601.

09/20 83 Add R8321. C8353 and C8354 change to 12pF.

09/20 82 Redefine IOBD1.

09/20 75 AFTP111 and AFTP110 connect to USB_PP13_R and USB_PN13_R.

09/20 51 Change P/N of Q5102.

09/21 42 Change PU4201 VDD power source to 5V_S5 from 5V_S0 to avoid abnormal MVP_PWRGD waveform.

09/21 47 stuff PC4714 22uF from Brian updated.

VERSION VERSION

X01

X01

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

DATA PAGE Change Iteam DATA PAGE Change Iteam

09/21 45 Change PR4507 to 20K from 20.5K from Brian updated.

09/21 46 Change PR4602 to 110K from 68K from Brian updated.

09/21 42 Change PR4217 to 1.27K from 1K from Brian updated. Change PR4213 to 3.6K from 3.16K from Brian updated.Change PR4236 to 3.01K from 3.32K from Brian updated.

09/21 44 Change PC4410 to 0.01u from 0.022uF from Brian updated.

09/21 39 Add 2nd 83.00099.K11;3rd 83.00099.T11 on D3901,D3902,D3903 from Sourcer Eden suggestion.

09/21 39 Add 2nd 84.02143.011;3rd 84.00143.N11 on 6801,Q6804,Q6805,Q6806,Q6807,Q6808 from Sourcer Eden suggestion.

09/21 43 Change PU4303,PU4306,PU4309 dummy field only for QC CPU stuff.Change PC4307,PC4316 dummy field only for QC CPU stuff.Add 2nd for PTC4306.

09/21 41 PD4101, PD4103, PD4104 and PD4105 add 2nd source.

09/21 69 Q6902 add 2nd source.

09/21 40 PD4001 add 2nd source.

09/21 19 move PCH_WAKE# to RN1901 pin4;Add R1909 PH 100K on AC_PRESENT.

09/21 37 R3710 change to 0ohm. Remove R3701 and C3701.

09/21 42 Add PR4214, PC4230, PR4216 and PC4231 from Brian updated.

09/23 20 RN2016, RN2010, RN2011, RN2012, RN2014 and RN 2013 keep 0ohm.

09/23 ALL PR9216, R504, R1812,R1813,R1815,R1817, R1903, R1906,R1910,R1912,R1913,R1924,R1925, R2213,R2219,R2711,R2720,R2733,R2761, R2807,R2814, R3708, R5125, R5127, R5721, R5722.

09/23 75 Add R7505~R7508 0ohm and reserved EC7503~EC7506 on PCIE_TX8&RX8 signal base on EMC Lance suggestion.Add R7509,R7510 0ohm and reserved EC7507,EC7508 on CLK_PCIE_NEW_REQ#&PCIE_WAKE# signal base on EMC Lance suggestion.

09/23 ALL RN5101, RN2201, RN1702, RN1901, RN1705 swap pin.

09/23 79 DUMMY G-SENSOR.

09/23 92 Update value of PR9210, PR9209 and PR9213 for N12P.

09/23 43 PR4320 change to 4 m ohm.

09/23 68 Add 2nd source 83.00110.J70 on FPOWERLED1,HDDLED1,WLANLED1 from Sourcer Anya suggestion.Add 2nd source 83.00326.G70 on CHARGERLED1from Sourcer Anya suggestion.Add 2nd source 83.00190.Z70 on TPLOCKLED1,TPLOCKLED2 from Sourcer Anya suggestion.

09/23 69 Change KBLIT1 part number to 20.K0589.004 and re-assign pin define base on Roy updated.

09/23 42, 44 Add 2nd source 69.60011.201 on PR4405,PR4245 from Sourcer Kitty suggestion.

09/23 42 Add 2nd source 69.60037.021 on PR4246,PR4247 from Sourcer Kitty suggestion.

09/24 23 Add 2nd source 68.00214.211 on L2301 updated from DN13ATI.

09/24 68, 69 Change R6806,R6808,R6811~R6813,R6801,R6803,R6815,R6906 to 390ohm from 1K to fine tune all of MB LEDfor 5mA spec.

09/27 51 Reserve R5114 and R5115.

09/27 85 Reserve R8510 and R8513.

09/27 83 DY U8301, mount R8323.

09/27 92 R9206 change to 10K, PC9211 mount 0.1u.

09/27 93 R9312 change to 1K.

09/2749, 5732, 64 TR4901, TR4902, TR5701, TR3201 and TR6401 DY. Stuff 0 ohm.

09/27 69 AFTP73 connect to TP_VDD.

09/27 85 U8501 power change to 3D3V_S0.

09/27 92 PL9201 change like CPU core power choke.

09/28 83, 84 L8303, L8401, L8402, L8502 and L8503 follow NV DG spec.

09/28 46 Change PR4606 to 4.02K from 240ohm for fine tune 1.5V output Voltage.

09/28 92 PTC9202, PTC9203 and PTC9204 2nd=79.47719.9BL

09/28 22 Change R2220 to 10K from 100K.

09/28 60EC6001 change to 10p from 4.7p and default un-stuff from Neo suggestion.EC1801 change to 10p from 4.7p and default un-stuff from Neo suggestion

09/28 27 Change R2710, R2739, R2724 and R2726 change to 1%.

09/29 27 Default mount R2756, Dummy R2734.

10/04 24 Add 2nd source 68.1001E.10N on L2401,L2402,L2403 from sourcer Renee Lee updated.

10/07 43 PTC4306 cahnge second source to 79.47612.60L.

VERSION VERSION

X01 X01 10/09

10/09

10/09

10/09

10/09

85

85

84

83

83

Change L8503 to 68.00375.091,and add second source 68.00206.171


Change L8401 and L8402 to 68.00115.181,and add second source 68.00206.341



10/09

10/09

10/09

10/09

42

42

42

42

Change PR4217 to 64.84505.6DL for Dual-core OCP

Change PR4213 to 64.23715.6DL for Dual-core loadline

Change PR4207 to 64.22025.6DL for CPU(35W) Turbo setting

Change PR4202 to 64.22025.6DL for GFX Turbo setting

10/09 20,83 Dummy R2004 R2003 and PQ8309, stuff R2005

10/25

10/19 28 Change R2817 from 107K to 124K (64.12435.6DL) for VGA temperature setting change

84 Change R8402 from 40D2R to 60D4R (64.60R45.6DL) for meeting the spec

Add DM1 and DM2 second source:62.10017.Q41 and 62.10017.P61 14 1510/25

10/25 85 Ventura SMBC_INA219_C and SMBD_INA219_C add 3.3V pull high schematic

11/01 51 85 Change HDMI HPD schematic for cost down

X02 11/10 27 Change R2724 to 64.33025.6DL for PCB version change

11/10 83 Change L8301 to 68.00115.181,and add second source 68.00206.341

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

VERSION VERSION

X02


11/11 14 DM2 1st change to 62.10017.P61; 2nd change to 62.10017.N41 on ST stage from ME updated connector list.

11/11 15 DM1 1st change to 62.10017.Q41; 2nd change to 62.10017.N11 on ST stage from ME updated connector list.

11/11 60 U6001 1st change to 72.25Q32.A01; 2nd change to 72.25320.C01; 3rd change to 72.25P32.C01 on ST stage

11/11 68 Change CHARGERLED1 2nd to 83.00327.D70 from Sourcer updated.

11/11 37 Change U3701 1st to 73.7SZ08.EAH;2nd to 73.01G08.L04;3rd to 73.7SZ08.DAH from Sourcer Eason updated.

11/11 69 Add 2nd 20.K0592.030 on KB1 from ME updated connector list.

11/11 82 Add 2nd 20.K0465.008 on MEDIA1 from ME updated connector list.

Add 2nd 20.F1804.004 on SPK1 from ME updated connector list.5811/11

11/11 28 Add 2nd 20.F1841.003 on FAN1 from ME updated connector list.

11/11 70 Add 2nd 20.F0962.010 on HALL1 from ME updated connector list.

11/11 23 Add G9091 LDO circuit for CRT DAC power to avoid monitor noise issue.Change VCCADAC power source to 3D3V_DAC_S0 from 3D3V_S0.

11/11 60 Add Q6002,R6007 fo FACTORY RTC detect function

11/11 28 ADJ&ADJ_VGA power source change to 3D3V_DAC_S0 from 3D3V_S0 to solve T8 shut down issue.

11/11 28 Reserved G709T1UF for T8 solution sync with DN13.

11/12 82Change R8201, R8202, R8203 from 430 ohm to 1K ohm (63.10234.1DL) for soluting media board LED brightness is too light issue

11/15 49 Add 2nd 20.F1860.030 on LCD1 from ME updated connector list.

11/15 8 Reserved C802~C804,C806,C807 10uF 0603 for power team fine tune Vcore quality

11/15 88 89 90 91

All of VRAM(VRAM1~VRAM8) PCB footprint change to CO-LAY type (DUMMY-BGA96D075133H48) from BGA96D0913H48 same as DW30.

11/156869

Change R6813, R6906 from 390 ohm to 1K ohm (63.10234.1DL) for soluting LED brightness is too light issue

Change R6808, R6811 from 390 ohm to 1K ohm (64.10234.1DL) for soluting LED brightness is too light issue6811/16

11/16 28 stuff both G709T1UF and P2800 related circuit, add R2805 0ohm default un-stuff at ST stage.

11/16 97 Change HHD1 HDD4 HGPU1 HGPU2 2nd from 34.4CK01.201 to 34.4CK01.401 from ME update connector list

11/17 48 CO-LAY APL5916 related circuit for VCCSA LDO solution.

11/15 20Dell required us to disable PCIE port of WWAN slot ,If PCIE port 1 is disabled, it will cause all PCIE port disabled,so change WWAN to PCIE port 3 from port1 at ST stage.

11/18 23Add G9091 LDO circuit for CRT DAC power to avoid monitor noise issue.Change VCCADAC power source to 3D3V_DAC_S0 from 3D3V_S0.Stuff R2301 and un-stuff L2301.

11/18 28 Add R2805 0hm between THERM_SYS_SHDN#_OTZ and THERM_SYS_SHDN#.Add R2812 0ohm between THERM_SYS_SHDN# and U2805 pin3.

11/18 28 Rename U2801&U2804 pin 8 to THERM_SYS_SHDN#_OTZ from HERM_SYS_SHDN#.

X02

11/18 20 Change X2001 to 82.30020.D41 from 82.30020.851 from Sourcer Dick updated.

11/18 23 Reserved R2308,R2309 on VCCVRM power rail.Reserved U2302 LDO circuit on VCCVRM power rail

11/18 22 82Rename USB3_PWR_ON to PCH_GPIO57.Add R8209,R8210 for PM_SLP_S4# and VGA_THRM to control USB3_PWR_ON

11/18 48 Change PTC4801 to 100u(77.21071.07L) from 150u from power team Brian updated

11/19

11/19

74

82

Add 2nd 20.I0135.001 on CARD1 from ME updated connector list.

Add 2nd 20.F1908.080 on IOBD1 from ME updated connector list.

11/20 3 Updated PCIE ROUTING

11/20 28Change U2801,U2804,U2805 VCC power to 3D3V_DAC_S0 from 3D3V_S0.Stuff R2812, un-stuff R2805

11/20 23Reserved R2308 on VCCVRM power rail.Reserved U2302 LDO circuit on VCCVRM power rail.

11/20 48Set TPS51461 PWM solution dummy field for VCCSA_PWM and APL5916 LDO solution dummy field for VCCSA_LDO. defualt stuff VCCSA_LDO at ST stage

11/20 22 Rename GFX_CRB_DET to GSENSOR_DET on GPIO39.

11/20 60 Un-stuff R6007 10M.

11/20 82 Reserved EC8201,EC8202 0.1u(closed H3) between AGND and GND from EMC Neo suggestion.

11/20 82 Reserved EC8203~EC8205 470p on all of MEDIA_LED# signal from EMC Neo suggestion.

11/20 82 Add RN8205 base on HSYNC&VSYNC report

11/20 61 Removed R6101 and connect USB_PWR_EN# to U6101 pin4 directly.

11/20 22 Rename PCH_GPIO12 to RTC_DET# on GPIO12.

11/2061 2218

Reserved U6102 USB POWER related circuit to separate EATA and CRT USB power in ST build.Reserved USB2_CRT_ON# to control U6102 USB power switch from PCH GPIO57.Reserved USB_OC#0_1 connect from PCH GPIO59.

11/20 82 Reserved R8211,R8212 0ohm 0805 on CRTBD1 pin37,39 to separate EATA and CRT USB power in ST build.

11/22

11/22 82

82 Swap RN8205 pin4,3 and pin2,1 each other base on Connie swap report.

11/22 23

stuff EC8201,EC8202 0.1u(closed H3) between GND and GND from EMC Neo suggestion.stuff EC8206 between 3D3V_S5 and GND from EMC Neo suggestion.

base on layout condition change 3D3V_DAC_S0 circuit. Stuff R2301 and un-stuff L2301.

11/22

11/22

82 stuff EC8203~EC8205 470p on all of MEDIA_LED# signal from EMC Neo suggestion.

23 Removed U2302 LDO for VCCVRM.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

11/22 83 84 85 Change L8301 L8401 L8402 to 0 ohm resistor (63.00000.00L)

11/22 57 Change TR5701 to 69.10103.041 and un-stuff R5718,R5719 from EMC Neo Suggestion.

11/22 75 Change TR7501 CM choke to 69.10103.041 and un-stuff R7501,R7502 from EMC Neo Suggestion.

VERSION VERSION

X02


11/22 29 change R2920,R2921 to 22ohm from 0ohm and stuff EC2901,EC2902 22p from EMC Neo updated.

11/22 61Change U6101 to dual USB power switch from single for Layout limitation and placement.Reserved USB2_CRT_ON# to control U6102 USB power switch from PCH GPIO57.Reserved USB_OC#0_1 connect from PCH GPIO59.

11/22 49 stuff C4908 0.1uF from EMC Neo suggestion.

stuff EC5801~EC5804 470pF from EMC Neo suggestion.5811/22

11/22 9 3945 49

stuff EC901, EC3903, EC4501, EC4909, EC4907 0.1uF from EMC Neo suggestion.

11/22 48 Updated VCCSA_LDO circuit from Power team Brian updated.

11/22 49 Change RN4901 to 100ohm 4p from 8p for improve layout place.

11/22 49 Change TR4902 CM choke to 69.10103.041 and un-stuff R4908,R4909 from EMC Neo Suggestion.

11/22 49Swap TR4901 pin4,3 and pin2,1 each other base on Connie swap report.Change TR4901 CM choke to 69.10103.041 and un-stuff R4911,R4912 from EMC Neo Suggestion.

11/23 49 57 75 SWAPTR4901 TR4902 TR5701 TR7501 pin1&4 and pin2&3 each other base on Connie swap report.

11/22 60 stuff R6007 10M.

11/23 60 Change U6101 1st(74.02182.071);2nd(74.00546.A7D);3rd(74.02062.079) from Sourcer Harrison suggestion.

11/23 64 Add C6402 0.1uF,C6403 180pF and stuff C6401 47pF from RF fine tune result.

11/23 57 49 75 Change R5718,R5719,R4908,R4909,4911,R4912,R7501,R7502 to 0ohm 0603 from 0402.

11/23 56 97stuff EC9739,EC9737,EC9735 47pF from RF fine tune result.stuff EC5601 180pF from RF fine tune result.Stuff EC9738 0.22uF closed EC9739 from RF fine tune result.

11/23 97 stuff ECEC9729,EC9730 470pF from EMC Neo suggestion.

11/23 45 Change PR4501 to 75K from 45.3K for 1.05V OCP set to 20A from Brian.

11/23 82 Removed R8211,R8212 and connect 5V_USB2_S3 to CRTBD1 pin 37 directly.

11/23 61 Removed C6105,C6103.

11/23 69 70 Change AFTP 80 81 to AFTP 83 84; change AFTP 83 to AFTP82; change AFTP 82 to AFTP85.

11/24 20 Add 2nd(82.30020.G71);3rd(82.30020.G61) on X2001 from Sourcer Dick updated.

11/24 69 Add 2nd(20.K0613.004)on KBLIT1 from Karl updated.

11/24 57 Add 2nd(22.10339.261)on ESATA1 from Karl updated.

X02

11/24 28 un-stuff VGA P2800 related circuit from Niki confirmed.

11/24 64 rename C6401,C6402,C6403 to EC6401,EC6402,EC6403

11/24 22 Dummy R2206

11/25 28 Dummy R2817 R2818 C2816

11/25 69 Add 3rd(83.00110.R70) on FPOWERLED1,HDDLED1,WLANLED1 from Anya provide

11/25 69 Add 3rd(83.00192.J70) on TPLOCKLED1 and TPLOCKLED2 from Anya provide.

11/25 69 Add 3rd(83.01108.070) on CHARGERLED1 from Anya provide.

11/26 43 92 Change PC9217 PC4319 to 0.1u 50V

11/29 83 Change C8353 C8354 to 15PF ,R8320 stuff from vendor suggestion.

11/29 36 Stuff D3602

11/30 68 Change 2nd source to 83.00322.070 from 83.00110.J70

11/30 85 Change L8502 L8503 to 0 ohm

11/30 92 Stuff PR9237 DY PR9321

12/01 8 Change C837,C826 to 22uF from 10uF and default stuff from Power Brian updated.

12/01 8 Change C801~C807 and C817 10uF stuff at QC CONFIG from power Brian updated.

12/21 Change 0402 pad(ZZ.00PAD.M11): R1404 R1405 R1503 R1504 R1703 R1704 R1705 R1807 R2301 R2306 R2307 R2308 R2404 R2405 R2735 R2737 R2758 R2759 R2760 R2762 R3614 R3710 R5114 R5801 R5802 R5803 R5804 R8210 R8323 R8511 R8512

12/21

12/21

12/21

Change 0603 pad(ZZ.00PAD.M21): R8206 R8207

Change resistor pad(ZZ.0R04P.ZZZ): RN1704 RN2010 RN2011 RN2012 RN2013 RN2014 RN2015 RN2016

Change L8301, L8401,L8402,L8502,L8503 to 0R0603 pad(ZZ.00PAD.M21)

Change to Parallel resistorR1501 ,R1502; R2739 ,R2774;R8202 ,R8203;R8501 ,R8502;R8506 ,R8507;R2123 ,R212412/21

12/21 RN8205 change to R8201, R8202

12/21 PR9237 rename to PR9337

12/21 Delete 77.C1071.21L(TC6101), delete 83.01108.070(CHARGERLED) , delete 62.10065.121(HDD1)

A00

82

17 20

83 84 85

82

93

ALL

ALL

56 61 68

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

Title


Date: Sheet of


QUEEN 15 A00

Change HistoryA3


<Core Design>

VERSION

A00


R2724 change to 47K resistor for XBulid12/22 27

12/22 27 R2301 change to 0 resistor for CRT debug

12/22 401.Change PR4032,PR4034,PR4037 to ZZ.00PAD.M112.Stuff PQ4003,PQ40043.Change PR4047 to 174K(64.17435.6DL)4.Change PR4035 to 300K(64.30035.6DL)5.Change PR4036 t0 76.8K(64.76825.6DL)6.Change PR4031 to 150K(64.15035.6DL)

12/23 68

1.FPOWERLED1 rename to FPLED12.HDDLED1 rename to HDLED13.CHARGERLED1 renamtpe to CHLED14.WLANLED1 rename to WLED15.TPLOCKLED2 rename to TPLED26.TPLOCKLED1 rename to TPLED17.PWRBTN1 rename to PWRBT18.PWRBTN2 rename to PWRBT2

12/23 43Delete PR4323,PR4324,PR4325;Stuff PR4320 for all BOM ,not co-lay Ventura

12/23 92Delete PR9220,PR9222,PR9223;Stuff PR9217 for all BOM ,not co-lay Ventura

12/23 51 Change 5V_HDMI to 5V_CRT_S0_R for HDMI power leakage

12/24 All

PRN3901 rename to PN3901PTC9202~04 rename to PT9202~04PTC4301~04 rename to PT4301~04PTC4306 rename to PT4306PTC4308~09 rename to PT4308~09PTC4401~03 rename to PT4401~03PTC4502 rename to PT4502PTC4602 rename to PT4602PTC4102 rename to PT4102PTC4104 rename to PT4104

12/24 28 Change U2802 3rdto 74.05606.A71 at X-Build batch run

12/24 82 Change RN8205 to 66.22036.04L from 66.22036.040at X-Build stage

12/24 82 Reserved R8211 0603 0ohm on F8201

12/24 36 Reserved Q3603 2N702 on IMVP_PWRGD to fine tune glitch waveform when AC lose and DC lose.

12/24 28 Change 3D3V_S0 to 3D3V_DAC_S0

12/24 45 46 93Change to short pad:PR4502,PR4607,PR9311,PR9312,PR9326.DUMMY PC4501

12/27 28 If stuff P2800EA1 then must stuff R2803,R2804,C2805 but if stuff P28003B0 should be unstuff.

12/27 42 PR4207,PR4213,PR4217 DUMMY field set to DC&QC option

12/28 51 Change 5V_HDMI to 5V_CRT_S0_R on RN5101

12/28 28 Un-stuff U2805 G709T1UF related circuit and R2812 then stuff R2805 at XBuild

A00

VERSION DATA PAGE Change Iteam

12/28 27 Change R2756, R2763, R2766 to short pad

12/28 36 Stuff Q3603

12/28 28 86 Cancel VGA Thermal sensor P2800 ciruit

12/28 27 28 82 Change to VGA_THRM to USB3_PWR_ON

12/28 23 Change R2301 to short pad

12/29 51 Change HDMI resistor to short pad

12/29 49,57,75 Delete USB DUMMY resistor for no-lay

12/29 32 Change USB 0 resistor to short pad for no-lay

12/29 5 Reserve EC502 ,EC504 for EMI suggestion,add DUMMY EC505 for EMI

12/29 82 Delete PM_SLP_S4# line, directly link to USB3_PWR_ON

Add 3rd Richtek(74.09198.G7F) on U2301 at XBuild batch run config12/29 23

12/29 68 Not use Liteon LED(83.00322.070) for package

12/30 5 Add DUMMY diode EC506 for BUF_CPU_RST# as EMI suggestion

12/30 42 PC4227 change to 78.33420.5FL as 78.33423.5FL obsoleted

12/30 49 Change R4904 to short pad

12/31 86 Add probe point for P2800_VGA_DXN/P2800_VGA_DXP

01/03 68 Change TPLED1,2 1st to 83.01921.P70 ,2nd to 83.00190.S7A,3rd to 83.00191.H70;R6813 change to 390R from 1K same as DN13 LED part.

01/03 49 Delete R4908, R4909 for USB_Camera not co-lay

01/03 4~10 Add 3rd foxconn(62.10055.321) on CPU1 at X-Build batch run config

01/03 82 Add 3rd T-conn(20.F1932.040) on CRTDB1at X-Build batch run config

01/03 97 Add 3rd LIDON(34.4CK01.501) on HHD1,HHD4,HGPU1,HGPU2 at X-Build batch run config

01/04 68 Delete 83.00191.H70 for TPLED1,2 as cost high

01/04 49,57,75 Add 2nd TAI-TECH(69.10084.071) on TR4901,TR4902,TR5701,TR7501 at X-Build batch run config

scheme dell inspiron n5110 m5110 dq15 wistron queen 15 intel discrete uma sandy bridge

Documents

sheet ofwistron corporation21f

taipei hsien

hsin tai wu

pcie x 1usb2

crt boardpcie x

mw solution

optimus solution

muxless solution