lica apr may2011 answer paper
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Linear Integrated Circuits and Applications
April/May 2011
1. The basic chemical reaction in the epitaxial growth process of pure silicon is the
hydrogen reduction of silicon tetrachloride.1200
0C
SiCl4+2H2 Si + 4 HCl
2.*Miniaturisation and hence increased equipment density.
*Cost reduction due to batch processing.*Increased system reliability due to the elimination of soldered joints.
*Improved functional performance.
*Matched devices.
*Increased operating speeds.*Reduction in power consumption.
3.1. Open loop voltage gain is infinity2. Input impedance is infinity.
3. Output impedance is zero
4. Bandwidth is infinity.5.Zero offset.
6.Infinite bandwidth
7. Infinite CMRR.
8. Infinite slew rate.9. Infinite PSRR
4.Packages of IC741Dual Inline Package, Metal can package, flat package.
5. In a number of industrial and consumer applications, the measurement of physical quantities is
usually done with the help of transducers. The output of transducer has to be amplified So that itcan drive the indicator or display system. This function is performed by an instrumentation
amplifier.
6. It is defined as the total time required converting an analog signal into its digital output. It
depends on the conversion technique used & the propagation delay of circuit components. The
conversion time of a successive approximation type ADC is given by T(n+1) Where T---clock
period Tc---conversion time n- no. of bits
7. *FSK generator
*Pulse-position modulator
8.Capture range.
The range of frequencies over which the PLL can acquire lock with the input signal is called as
capture range. Capture range = sqrt(fL *f1) where f1=1/ (2**R*C)]
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Step 4: Isolation diffusion
four components have to be fabricated so we require four isolated islands
For this, SiO2 is removed from five different places using photolithographic technique. The wafer is subjected to heavy p-type diffusion for a long time interval so that p-type
impurities reach the ptype substrate.
The area under the SiO2 are n-type islandsthat are completely surrounded by p-type moats. p-type substrate is held at a negative potential - > pn junctions between the isolation islands are
reverse biased and these regions are electrically isolated from each other by two back-to-
back Diodes
Step 5: Base diffusion
A new layer of SiO2 is grown over the entire wafer a new pattern of openings is formed usingphotolithographic technique.
Now, p-type impurities, such as boron, are diffused through the openings into the islands
The depth of this diffusion must be controlled so that it does not penetrate through n-layer intothe substrate.
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This diffusion is utilized to form base region of the transistor, the anode of the diode ,
junction capacitor or a resistor
Step 6: Emitter diffusion A new layer of SiO2 is again grown over the entire wafer It is selectively etched to open a new set of windows
n-type impurity (phosphorus)is diffused through them. This forms emitter for transistor and cathode region of diode.
To make ohmic contacts with n-type layer, 2 Windows (W1, W2 etc.) are etched into n-region Heavy concentration of phosphorus (n+) is diffused into these regions simultaneously with the
emitter diffusion. This n+ layer thus makes a good ohmic contact with the Al-layer.
Step 7 : Aluminium metallization Now the IC chip is complete with all active and passive devices A new layer of SiO2 is again grown over the entire wafer It is selectively etched to open a new set of windows where contacts have to be made
A thin coating of aluminium is vacuum deposited over entire wafer surface
Interconnect pattern is formed by photolithography technique and Al at undesired placesremoved by etchingThis forms interconnection between transistor, diode, resistor and capacitor
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11.b. Refer May/June 2013 11.a.
12.a. Refer May/June 2013
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13.a.
Wide range resistors are required in binary weighted resistor type DAC. This can be
avoided by R-2R type DAC where only 2 values of resistors are used.
Very much suitable for IC realization
Typical value of R ranges from 2.5k to 10k Consider a 3 bit DAC as shown in figure. Switch position corresponds to binary 100.
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13.b. Refer May/June 2013
14.a.Features of 555 timer:
555 timer is the most versatile highly stable device for generating accurate time delays. When used as an oscillator the frequency and duty cycle are accurately controlled by
only two external components, a resistor (R) and a capacitor (C).
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A single 555 timer can provide time delay ranging from microseconds to hours 555 timer can be used with supply voltage in the range of +5V to +18V and can drive
upto 200mA.
Compatible with TTL and CMOS Used in many applications like oscillator, pulse generator, ramp and square wave
generators, missing pulse detector, pulse width modulator, mono-shot multivibrator,burglar alarm etc.
Modes of operation:
Monostable mode
Astable mode
Monostable mode It has only one stable state, hence called one-shot multivibrator.
When trigger is applied, it produces a pulse at the output and returns back to its stablestate.Duration of pulse depends on R and C.
In stand by state,
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Qbar of flipflop=1-> Q1 ON -> External timing capacitor C clamped to ground ->Output ->
LOW
When the trigger input goes lesser than Vcc/3, FF-> set , Qbar =0 -> Q1 OFF -> short circuitacross timing capacitor is released
Since Qbar=0, output =HIGH(Vcc).
The timing cycle now begins;1. Since C is unclamped, voltage across it rises exponentially through R towards Vcc withtime constant RC.
2. After time period T, the capacitor voltage is just greater than 2/3Vcc and the upper
comparator resets FF. Qbar=1 ->Q1 ON -> capacitor rapidly discharged to groundpotential. Output returns to stand by state i.e, ground potential.
Once trigger pulse is applied and the output goes high, any additional trigger pulse coming
during this period will not change the output state. But when reset pulse (negative) is applied,
Q2->OFF, Q1->ON -> external timing capacitor is discharged immediately.
Timing interval is independent of supply voltage but depends only on R and C.
Astable Multivibrator
The circuit has no stable state and the circuit changes its state alternately. Hence the operation is
called free running oscillator or astable multivibrator.The threshold input is connected to thetrigger input.
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1. When the external power supply is connected,
A. External timing capacitor gets charged to Vcc with time constant (Ra+Rb)C.
B.
During this time, output is high as Reset R=0, Set S=1. =>Qbar=0 => Timingcapacitor C is unclamped.
2. When the capacitor voltage is just greater than 2/3Vcc, the upper comparator triggers
reset so that Qbar=1. This makes Q1 ON and capacitor C starts discharging to groundthrough Rb and Q1 with time constant RbC.
1. During discharge of C, when the voltage is just less than Vcc/3, the lower comparator is
triggered and S=1, R=0 -> Qbar=0 -> unclamps the external timing capacitor C.2. Capacitor is thus periodically charged and discharged between 2/3Vcc and 1/3Vcc.
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The length of time tat the output remains HIGH is the time for the capacitor to charge from
1/3Vcc to 2/3Vcc.
The capacitor voltage for a low pass RC circuit with step input VccVc= Vcc(1-e
-t/RC)
The time t1 taken by the circuit to charge from 0 to 2/3Vcc is
2/3Vcc= Vcc(1-e-t1/RC
)T1=1.09RC
Time t2 to charge from 0 to 1/3Vcc is
1/3Vcc =Vcc (1-e-t2/RC
)
T2=0.405RCSo time to charge from 1/3Vcc to 2/3Vcc is
tHigh=1.09RC - 0.405RC = 0.69RC
So, tHigh = 0.69(Ra+Rb)CThe output is low while the capacitor discharges from 2/3Vcc to 1/3Vcc.
The voltage across the capacitor is given by
1/3Vcc = 2/3Vcc e-t/RC
T=0.69RC. so tlow= 0.69RbCRa and Rb are in the charge path but only Rb is in the discharge path.
Total time= T =Thigh+Tlow
=0.69(Ra+ 2Rb)Cf= 1/T = 1.45/(Ra+2Rb)C
Duty cycle of a circuit is defined as the ratio of ON time to the total time period.
Here when Q1 is ON, the output goes low. Hence,
D% = tLow/T*100 = Rb/(Ra+2Rb)*100
For this astable multivibrator circuit, duty cycle cannot be more than 50% since tHigh =
0.69(Ra+Rb)C is always greater than tLow =0.69RbC.
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14.b.Voltage controlled oscillator
A voltage controlled oscillator is an oscillator circuit in which the frequency ofoscillations can be controlled by an externally applied voltage.
VCO provides linear relationship between applied voltage called control voltage and
oscillation frequency Hence VCO is called voltage to frequency converter
Commonly used VCO ICs are NE/SE566. It is a 8 pin IC with 2 outputs. It can
simultaneously produce square and triangular wave outputs which are functions of i/pvoltage(modulating voltage)
Features:
1. Linear modulation characteristics2. High temperature stability
3.
Excellent power supply rejection4. 10 to 1 frequency range with fixed CT
Frequency can be controlled by current, voltage, resistor, capacitor
Typical connection and operation:
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The output frequency of the VCO can be changed either by (i) RT ,(ii) CT or (iii)the
voltage vc at the modulating input pin5 The components RT and CT are first selected so that VCO output frequency lies in the
centre of operating frequency range.
Vc can be varied by connecting a voltage divider circuit using R1 and R2.
The modulating input voltage is usually varied from 0.75 Vcc to Vcc which can produce a
frequency variation of about 10 to 1.
With no modulating input signal, if the voltage at pin 5 is biased at 7/8Vcc gives the
VCO output frequency as
15.a.
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ICL 8038 FUNCTION GENERATOR
The ICL8038 is a function generator chip, capable of generating triangular, square , sine, pulse
and sawtooth waveforms . From these sine, square & triangular wave forms can be made
simultaneously.There is an option to control the parameters like frequency,duty cycle anddistortion of these functions.This is the best function generator circuit for a beginner to start with
and is of course a must on the work bench of an electronics hobbyist.The circuit here is designed
to produce waveforms from 20Hz to 20 kHz.The ICL 8038 has to be operated from a dual power
supply.
As shown in Fig. 4.17, transistors Q1, and Q2 form programmable current source whose
magnitudes are set by external resistors RA and RB. These current source are driven by the
emitter follower (transistor Q3). It also compensates base-emitter voltage for Q1 and Q2 toensure VRA= VRB=Vi. Thus IA= Vi/RAand IB=Vi/RB. Current IA controls the charging rate of
capacitor C. The Current IBis diverted to current mirror (Q4-Q5-Q6) where it undergoes polarity
reversal as well as amplification by 2 due to the combined action of Q5 and Q6. The result is acurrent sink of magnitude of 2 IB.
Voltage across capacitor is applied to the Schmitt trigger. Schmitt trigger is similar to that of the
IC 555, with VUT = 2/3 VCC and VLT =1/3Vcc. Transistor Q7 acts as a switch. When output of
flip-flop is high. Q7 saturates and pulls the bases of Q5 and Q6 low, thus shutting off the currentsink. As a result capacitor C starts charging at a rate set by current IA. Once capacitor voltage
reaches 2/3 Vcc(VUT), CMPI triggers and clears the flip-flop, thus tuming Q7 off. This enables
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current mirror to sink current equal to 2IBso that net current flowing out of the capacitor is IL= 2
Ib Ia. This causes capacitor to discharge. Once capacitor voltage reaches 1/3Vcc, CMP2
triggers and sets flip-flop and action repeats. The net current flowing out of capacitor C shouldbe positive => 2IbIa >0 =>2Ib>Ia