digital control - lecture 3homes.et.aau.dk/yang/de5/dc/mm3.pdf · digital controller design lead...
TRANSCRIPT
Outline
Outline
1 Digital Controller Design
2 Lead Compensator for Antenna - Design Example
Lecture 3 Digital Control
What have we talked about in MM2?MM2?
• Sampling rate selection
• Equivalents between continuous & digital Systemsdigital Systems
Digital Controller DesignLead Compensator for Antenna - Design Example
ExercisesEmulation Method for Digital Control
Outline
1 Digital Controller DesignEmulation Method for Digital Control
2 Lead Compensator for Antenna - Design ExampleEffect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
ExercisesEmulation Method for Digital Control
Digital Controller Design
Digital controller can be obtained using:
Emulation, which finds the discrete equivalent of a continuouscontroller
Direct discrete design (next lecture)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
ExercisesEmulation Method for Digital Control
Frequency Issues
Continuous Systems
For a minimum-phase transfer function, the phase is uniquelydetermined by the magnitude curve:
∠G (jω) ≈ n × 90◦
where n is the slope of G (jω) in units of decade of amplitude
Discrete Systems
The amplitude and phase relationship is lost!The prediction of stability from the amplitude curve alone forminimum-phase systems is lostIt is typically necessary to determine both magnitude and phase fordiscrete systems
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
ExercisesEmulation Method for Digital Control
Emulation Method
1 A continuous controller is designed
2 Sample time is selected
3 Discrete equivalent is computed
4 Evaluation of design
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Outline
1 Digital Controller DesignEmulation Method for Digital Control
2 Lead Compensator for Antenna - Design ExampleEffect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Case Study: Antenna Control
General System Model:
J θ̈ + B θ̇ = Tc + Td
Discarding the disturbances Td gives the transfer function:
Θ(s)
U(s)=
1
s(
s
a+ 1
)
where a = B
J= 0.1 and u(t) = Tc (t)
B.
Design Specifications:
Overshoot to a step input less than 16% (PM ≈ 55)
Settling time to 1% in less than 10s
Tracking error to ramp of slope 0.01 radsec less than 0.01rad
Sampling time to give at least 10 samples in a rise-time
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna (FC pp. 375)
Step 1
Design the low frequency gain K with respect to the steady-stateerror specificationAntenna system case: K = 1
Step 2
Determine the needed phase lead
sys=tf(1,[10 1 0]);
margin(sys)
PM=18 at ω = 0.308
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna (FC pp. 375)
Step 3
Using lead contribution of φmax = 45 should result in PM=63which is 8 more than needed.
Step 4
Determine:
α =1 − sinφmax
1 + sinφmax
=1 − sin 45
1 + sin 45= 0.1716
Step 5
T =1
ωmax
√α
=1
ωn
2
√α
=2
0.92√
α= 5.248
Giving a zero in s = − 1T
= −0.19 and a pole ins = − 1
αT= −1.11.
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna (FC pp. 375)
Step 6
Draw the compensated frequency response, check PMUsing the formulation:
D(s) =Ts + 1
αTs + 1
we use:
sysD=tf([5.3 1],[0.9 1])
sysC=sys*sysD
margin(sysC)
step(feedback(sysC,1))
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna (FC pp. 375)
−80
−60
−40
−20
0
20
40
Mag
nitu
de (
dB)
10−2
10−1
100
101
102
−180
−135
−90
Pha
se (
deg)
Bode DiagramGm = Inf dB (at Inf rad/sec) , Pm = 56.3 deg (at 0.505 rad/sec)
Frequency (rad/sec)
Figure: Frequency response
Step Response
Time (sec)
Am
plitu
de
0 5 10 15 20 250
0.2
0.4
0.6
0.8
1
1.2
1.4
System: untitled1Time (sec): 5.65Amplitude: 1.16
System: untitled1Time (sec): 13.3Amplitude: 1.01
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna (FC pp. 375)
Step 7
Step 7: Iterate on the design until all specifications are met
sysD=tf([10 1],[1 1])
sysC=sys*sysD
margin(sysC)
sysCL=feedback(sysC,1)
step(sysCL)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna (FC pp. 375)
−80
−60
−40
−20
0
20
Mag
nitu
de (
dB)
10−2
10−1
100
101
102
−180
−135
−90
−45
0
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
Figure: Frequency response
Step Response
Time (sec)
Am
plitu
de
0 2 4 6 8 10 120
0.2
0.4
0.6
0.8
1
1.2
1.4
System: sysCLTime (sec): 3.63Amplitude: 1.16
System: sysCLTime (sec): 8.75Amplitude: 0.99
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Digital Lead Compensator for Antenna - Fast Sampling
Continuous lead controller
D(s) =10s + 1
s + 1
Digitization - Fast Sample Rate
sysc=tf(1,[10 1 0]);
lead=tf([10 1],[1 1]);
syslead=sysc*lead;
Ts=1/20;
leadd1=c2d(lead,Ts,’zoh’);
sysd=c2d(sysc,Ts,’zoh’);
syscld=feedback(sysd*leadd1,1);
step(syscld)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Digital Lead Compensator for Antenna - Fast Sampling
Step Response
Time (sec)
Am
plitu
de
0 2 4 6 8 10 120
0.2
0.4
0.6
0.8
1
1.2
1.4
System: syscldfastTime (sec): 3.65Amplitude: 1.18
System: syscldfastTime (sec): 8.75Amplitude: 0.99
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Digital Lead Compensator for Antenna - Slow Sampling
Continuous lead controller
D(s) =10s + 1
s + 1
Digitization - Slow Sample Rate
sysc=tf(1,[10 1 0]);
lead=tf([10 1],[1 1]);
syslead=sysc*lead;
Ts=1/2;
leadd1=c2d(lead,Ts,’zoh’);
sysd=c2d(sysc,Ts,’zoh’);
syscld=feedback(sysd*leadd1,1);
step(syscld)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Digital Lead Compensator for Antenna - Slow Sampling
Step Response
Time (sec)
Am
plitu
de
0 2 4 6 8 10 12 14 16 180
0.2
0.4
0.6
0.8
1
1.2
1.4
System: syscldslowTime (sec): 3.35Amplitude: 1.35
System: syscldslowTime (sec): 13.5Amplitude: 0.99
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Effect of Sample Time on Step Response
0 2 4 6 8 10 12 14 16 180
0.2
0.4
0.6
0.8
1
1.2
1.4
Step Response
Time (sec)
Am
plitu
de
ContinuousFast samplingSlow sampling
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Effect of Sample Time on Frequency Response
−150
−100
−50
0
50
Mag
nitu
de (
dB)
10−2
10−1
100
101
102
−270
−180
−90
0
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
ContinuousFast samplingSlow sampling
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Effect of Sample Time on Pole Locations
Pole−Zero Map
Real Axis
Imag
inar
y A
xis
−1 −0.8 −0.6 −0.4 −0.2 0 0.2 0.4 0.6 0.8 1−1
−0.8
−0.6
−0.4
−0.2
0
0.2
0.4
0.6
0.8
1
System: syscldslowPole : 0.737 + 0.422iDamping: 0.3Overshoot (%): 37.3Frequency (rad/sec): 1.09
System: syscldfastPole : 0.975 − 0.0433iDamping: 0.482Overshoot (%): 17.7Frequency (rad/sec): 1.01
System: untitled1Pole : −0.5 + 0.866iDamping: 0.5Overshoot (%): 16.3Frequency (rad/sec): 1
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Incorporating Sampling Delay in System
Continuous System
G (s) =1
s(10s + 1)
Continuous System with Delay
Gd(s) =2/T
s + 2/T
1
s(10s + 1)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator for System using Slow Sampling Rate
Inserting T = 1/2
Gd(s) =2/T
s + 2/T
1
s(10s + 1)
=4
s(s + 4)(10s + 1)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna
Step 1
Design the low frequency gain K with respect to the steady-stateerror specificationSteady-state unchanged from original system: K = 1
Step 2
Determine the needed phase lead
sys=tf(1,[10 41 4 0]);
margin(sys)
PM=14 at ω = 0.308
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna
Step 3
Using lead contribution of φmax = 50 should result in PM=64which is 9 more than needed.
Step 4
Determine:
α =1 − sinφmax
1 + sinφmax
=1 − sin 50
1 + sin 50= 0.1325
Step 5
T =1
ωmax
√α
=1
0.4√
(0.1325)= 6.869
Giving a zero in s = − 1T
= −0.1456 and a pole ins = − 1
αT= −1.099.
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna
Step 6
Draw the compensated frequency response, check PMUsing the formulation:
D(s) =Ts + 1
αTs + 1
we use:
sysD=tf([6.9 1],[0.9 1])
sysC=sys*sysD
margin(sysC)
step(feedback(sysC,1))
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna
−150
−100
−50
0
50
Mag
nitu
de (
dB)
10−2
10−1
100
101
102
−270
−225
−180
−135
−90
Pha
se (
deg)
Bode DiagramGm = 16.9 dB (at 2.05 rad/sec) , Pm = 48.6 deg (at 0.607 rad/sec)
Frequency (rad/sec)
Figure: Frequency response
Step Response
Time (sec)
Am
plitu
de
0 5 10 15 20 250
0.2
0.4
0.6
0.8
1
1.2
1.4System: untitled1Time (sec): 4.76Amplitude: 1.21
System: untitled1Time (sec): 13.6Amplitude: 1.01
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna
Step 7
Step 7: Iterate on the design until all specifications are met
sysD=tf([7.5 1],[0.68 1])
sysC=sys*sysD
margin(sysC)
sysCL=feedback(sysC,1)
step(sysCL)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Lead Compensator Design for Antenna
−150
−100
−50
0
50
Mag
nitu
de (
dB)
10−2
10−1
100
101
102
−270
−180
−90
0
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
Figure: Frequency response
Step Response
Time (sec)
Am
plitu
de
0 5 10 15 20 25 300
0.2
0.4
0.6
0.8
1
1.2
1.4
System: sysCLTime (sec): 3.9Amplitude: 1.16
System: sysCLTime (sec): 7Amplitude: 1.01
System: sysCLTime (sec): 11.6Amplitude: 1.01
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Digital Lead Compensator for Antenna - Slow Sampling
Continuous lead controller
D(s) =7.5s + 1
0.68s + 1
Digitization - Slow Sample Rate
sysc=tf(1,[10 1 0]);
lead=tf([7.5 1],[0.68 1]);
syslead=sysc*lead;
Ts=1/2;
leadd1=c2d(lead,Ts,’zoh’);
sysd=c2d(sysc,Ts,’zoh’);
syscld=feedback(sysd*leadd1,1);
step(syscld)
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Digital Lead Compensator for Antenna - Comparison
−80
−60
−40
−20
0
20
Mag
nitu
de (
dB)
10−2
10−1
100
101
102
−270
−180
−90
0
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
ContinuousSlow samplingCompensated slow sampling
Figure: Frequency response
0 2 4 6 8 10 12 14 16 180
0.2
0.4
0.6
0.8
1
1.2
1.4
Step Response
Time (sec)
Am
plitu
de
ContinuousSlow samplingCompensated slow sampling
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Discretization in Matlab
Matlab
sysd=c2d(sys,Ts,method)
method:
’zoh’: Zero order hold
’foh’: First order hold (academic)
’tustin’: Bilinear approximation (trapezoidal)
’prewarp’: Tustin with a specific frequency used for prewarp
’matched’: Matching continuous poles with discrete
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Discretization of Lead Compensator - Fast Sample Rate
−40
−30
−20
−10
0
10
Mag
nitu
de (
dB)
10−1
100
101
−180
−135
−90
−45
0
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
ZOHTustinMatched
Figure: Frequency response
0 1 2 3 4 5 6 7 80
0.2
0.4
0.6
0.8
1
1.2
Step Response
Time (sec)
Am
plitu
de
ZOHTustinMatched
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Discretization of Lead Compensator - Fast Sample Rate
0.8 0.82 0.84 0.86 0.88 0.9 0.92 0.94 0.96 0.98 1−0.2
−0.15
−0.1
−0.05
0
0.05
0.1
0.15
0.2
0.10.20.30.4
0.50.6
0.70.8
0.9
Pole−Zero Map
Real Axis
Imag
inar
y A
xis
ZOHTustinMatched
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Discretization of Lead Compensator - Slow Sample Rate
−80
−60
−40
−20
0
20
Mag
nitu
de (
dB)
10−1
100
101
−270
−225
−180
−135
−90
−45
0
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
ZOHTustinMatched
Figure: Frequency response
0 2 4 6 8 10 120
0.2
0.4
0.6
0.8
1
1.2
1.4
Step Response
Time (sec)
Am
plitu
de
ZOHTustinMatched
Figure: Step response
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Discretization of Lead Compensator - Slow Sample Rate
−1 −0.8 −0.6 −0.4 −0.2 0 0.2 0.4 0.6 0.8 1−1
−0.8
−0.6
−0.4
−0.2
0
0.2
0.4
0.6
0.8
1
0.7π/T
0.8π/T
0.9π/T
π/T
0.1π/T
0.2π/T
0.3π/T
0.4π/T0.5π/T
0.6π/T
0.7π/T
0.8π/T
0.9π/T
π/T
0.1
0.20.3
0.40.50.60.70.80.9
0.1π/T
0.2π/T
0.3π/T
0.4π/T0.5π/T
0.6π/T
Pole−Zero Map
Real Axis
Imag
inar
y A
xis
ZOHTustinMatched
Lecture 3 Digital Control
Digital Controller DesignLead Compensator for Antenna - Design Example
Exercises
Effect of Sample TimesAccommodation for Sampling DelayEffect of Sampling Method
Some important things to remember
Discretization of compensator
Use the method suited for implementation in the system
Discrete equivalent of plant
Use method corresponding to implementation (usually ZOH)
Simulink can combine discrete compensator with continuousplant (digitization of plant not necessary)
Lecture 3 Digital Control