instantaneous reactive volt–ampere compensator

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 14, NO. 2, MARCH 1999 381

An Instantaneous Reactive Volt–AmpereCompensator and Harmonic Suppressor System

Kishore Chatterjee, B. G. Fernandes, and Gopal K. Dubey,Senior Member, IEEE

Abstract—A novel control method for a reactive volt–amperecompensator and harmonic suppressor system is proposed. Itoperates without sensing the reactive volt–ampere demand andnonlinearities present in the load. The compensation process isinstantaneous, which is achieved without employing any compli-cated and involved control logic. The compensator is operated incycle-by-cycle reference-current-controlled mode to achieve theinstantaneous compensating feature. A mathematical model ofthe scheme is developed. Detailed analysis and simulation resultsare presented. A laboratory prototype of the compensator isdeveloped to validate the results.

Index Terms—Active power filter, instantaneous compensation,load compensation, power factor correction, SCSVC, SVC.

I. INTRODUCTION

OVER THE YEARS, there has been a continuous prolifer-ation of nonlinear type of loads due to the intensive use

of power electronic control in all branches of industry as wellas by the general consumers of electric energy. As a result, theutility supplying these loads has to provide large reactive voltamperes. Also, it gets polluted by the harmonics generatedby the load. The punitive tariffs levied by utilities againstexcessive vars and the threat of stricter harmonic standardshave led to extensive research in the field of load compen-sation. The basic requirements of the compensation processinvolve precise and continuous reactive volt–ampere controlwith fast response time, reduced inrush currents, avoidanceof resonances created by peripheral low-frequency currentsources, and the on-line elimination of the effect of the loadharmonics. To satisfy the above criteria, the traditional meth-ods of compensation consisting of switched capacitor or fixedcapacitor and phase-controlled reactor coupled with passivefilters have been increasingly replaced by new approachesutilizing the concept of synchronous link converters [1]. Thisnew class of compensators, which has generated tremendousinterest among the researchers, is known by several terminolo-gies such as var generators [2], advanced static var generators[3], synchronous solid-state var compensators [4], pulsewidthmodulation (PWM) inverter var compensators [5], etc. The

Manuscript received November 7, 1996; revised August 25, 1997. Recom-mended by Associate Editor, P. Enjeti.

K. Chatterjee and B. G. Fernandes are with the Department of ElectricalEngineering, Indian Institute of Technology, Bombay, India.

G. K. Dubey is with the Department of Electrical Engineering, IndianInstitute of Technology, Kanpur 208016, India (e-mail: [email protected]).

Publisher Item Identifier S 0885-8993(99)01839-6.

authors here will call this class of var compensators as self-commutated static var compensators (SCSVC). When SCSVCis utilized for harmonic compensation, it is known as an activepower filter [6]–[10] or power line conditioner [21]. Severaltopologies of SCSVC and active power filters are reported inthe literature, but most of them have noninstantaneous transientresponse [3]–[14]. The schemes based on indirect currentcontrol technique have a poor transient response [4], [5], [13].Schemes utilizing current control principle either use: 1) areactive volt–ampere calculator to set the compensator currentreference or 2) error between the dc-link voltage referenceand the sensed dc-link capacitor voltage to set the amplitudeof the source current reference. In type 1), the presence ofthe reactive volt–ampere calculator generates a delay in thecompensation process. In type 2), a low-pass filter is requiredto eliminate ripple from the sensed dc-link voltage. Inclusionof this filter introduces finite delay in the control structure.This coupled with the inertia presented by the dc-link capacitorwhile absorbing or releasing energy introduces a cumulativedelay of at least two–three cycles in the dc-link capacitorvoltage response. As a result, the amplitude of the sourcecurrent reference has a low-frequency distortion and a dccomponent as long as the transient persists. Hence, the currentdrawn from the source during transients is not in phase with theutility voltage and not free from low-order harmonics. Otherschemes having instantaneous compensation feature employcomplicated and an involved control strategy [15], [16]. Butthese schemes can only be applied for three-phase case.

The present paper proposes a new technique of compensa-tion of var and load harmonics for low- and medium-powerapplications using an insulated gate bipolar transistor (IGBT)as the switching device. The novel features of the presenttechnique are as follows.

1) The compensation process is instantaneous.2) The control logic and the associated hardware are sim-

ple, thereby enhancing the system reliability.3) The compensation is achieved without sensing either the

load reactive volt–ampere demand or the load harmon-ics.

4) Unlike [15] and [16], it can be used for the caseas well.

The scheme is developed both for single- and three-phasesystems, and the performance is found to be satisfactory. Amathematical model of the proposed compensation processis developed and analyzed. A detailed simulation programof the scheme is developed to predict its performance for

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382 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 14, NO. 2, MARCH 1999

(a)

(b)

Fig. 1. (a)1 � � and (b)3 � � compensator.

different operating conditions. To demonstrate the viabilityof the scheme, a laboratory prototype is developed, andexperimental results are presented.

II. OPERATING PRINCIPLE

The power circuit configurations for the single- and three-phase compensators are shown in Fig. 1. It is operated ina controlled current boost-type converter mode. The currentdrawn from the utility is made to follow a sinusoidalreference current within a fixed hysteresis band. Thewidth of the hysteresis window determines source currentprofile, its harmonic spectrum, and switching frequency ofthe devices. The dc-link capacitor voltage is kept constantthroughout the operating range of the compensator. In thecase of single phase, turning on and will increase

, whereas turning on and will decrease it [17]. Forthe three-phase case, three current references inphase withthe respective phase to neutral voltages are taken, and eachphase of the compensator is controlled independently [18]. Toincrease the current of a particular phase, the lower switch ofthe compensator associated with that particular phase, i.e.,

or is turned on while to decrease the current the upperswitch, i.e., or of the respective compensator phaseis turned on.

A. Estimation of the Reference Current

The technique to determine the reference current is ex-plained for the single-phase compensator. The same approachis applicable for the three-phase case.

Let the utility voltage be given by

(1)

Consider a linear load drawing a current, which lags theutility voltage by an angle . Therefore

(2)

or

(3)

where

amplitude of the inphase componentof the load current;amplitude of the quadrature compo-nent of the load current.

From Fig. 1, , therefore

(4)

where is the amplitude of the current reference. Now, in(4), if is made equal to , is obtained as

(5)

From the above development, it can be inferred that if thesource current is made to follow a current reference which isequal to the inphase component of load current and inphasewith the utility voltage, the compensator current is equal andopposite to that of the quadrature component of the loadcurrent. As in the present scheme, the reactive volt–ampererequirement of the load is not sensed, the magnitude of theinphase component of the load current is to be determinedindirectly. Since the average power consumed by the compen-sator is zero, the average dc-link capacitor voltage remainsconstant. However, there will be losses taking place in thecompensator which will be replenished at the expense of thestored energy of the capacitor. This results in reduction of thecapacitor voltage. To maintain the capacitor voltage, the lossesof the compensator has to be supplied from the utility. Thisis achieved by choosing a proper value of . Moreover, ifthe load reactive volt–ampere increases, the compensator lossincreases and the capacitor voltage drops further. A similarsituation arises if there is an increase in the real component ofthe load current. When there is a decrease in the reactive and/orreal component of the load current, the capacitor voltage rises.Thus, by monitoring the average capacitor voltage a suitablevalue of can be chosen.

As the source current is made to follow the sinusoidalreference current within a small hysteresis band, the im-provement in the harmonic spectrum ofis significant. Thisimprovement is again achieved without sensing or estimatingthe load harmonics. The higher order harmonics49 , whichare present in the source current, will get eliminated by theshort circuit impedance of the utility.

III. CONTROL STRATEGY

It is well known that in the case of synchronouslink converters, the dc-link capacitor voltage is superimposedwith second harmonic ripple [1]. In the case, althoughthe magnitude of sixth harmonic dc-link voltage ripple isinsignificant while compensating linear loads, it increaseswhile compensating nonlinear loads. If the dc-link voltageis sensed and compared with the reference dc voltage tocontrol the amplitude of the reference current, then sourcecurrent will also have second or sixth harmonic distortion. To


CHATTERJEEet al.: VOLT–AMPERE COMPENSATOR AND HARMONIC SUPPRESSOR SYSTEM 383

Fig. 2. DC-link voltage profile for1� � and3� � topology.

Fig. 3. Control block diagram of the1 � � topology.

overcome this difficulty, the dc-link voltage is sensed and theharmonics present in it are filtered out. The inclusion of thefilter introduces a delay in the compensation process and thetransient response becomes poor. Here, a novel control strategyis proposed to make the compensation process instantaneous.

Fig. 2 shows the steady-state voltage profile of the dc-linkcapacitor along with the source voltage waveform for bothsingle- and three-phase topologies. It can be noted from thefigure that the magnitude of the capacitor voltage remainsconstant at all zero-crossing instants of the source voltage.Instead of continuous monitoring, if the dc-link voltage issampled only at these instants, distortion in can be avoidedwithout employing the filter.

The basic control block diagram of the proposed schemefor single-phase case is shown in Fig. 3. Latch-1 and Latch-2are made transparent only at the positive going zero crossingsof the source voltage. This ensures that the error infor-mation which is to be passed to the proportional–integral(PI) controller and the processed error to be passed to thereference current generator block is made available only atthe positive going zero-crossing instants. This implies that thereference current level set at the beginning of a cycleis maintained constant throughout the cycle. The referencecurrent generator based on the information of producesthe required reference current which is inphase with theutility voltage. The comparator compareswith and basedon this error information switching pattern of the compensator

Fig. 4. Control block diagram of the current reference generator.

is decided so that is made to follow within a hysteresisband.

Since the amplitude of is maintained constant throughouta sampled cycle of the utility voltage, the source current ismaintained distortion free and inphase with the utility voltageboth during steady state and transient operation. Hence, thecompensation process is instantaneous. The dc-link capacitoris specially designed for this purpose so that the dc-linkvoltage does not fall below the source current controllabilitylimit. However, as the source current is forced to follow thereference within a hysteresis band some finite delay is stillexpected. The authors have found through extensive simulationstudies that even in the worst case of transients this delaycomes out to be less than 50s, i.e., less than 1of thepower cycle, which is insignificant for all practical purpose.The fact that this insignificant delay does not affect theinstantaneous compensating feature is corroborated in [15],where the compensator current is made to track the synthesizedreference current by bang–bang control.

For the three-phase case, the positive zero-going instant ofany one of the phases is taken as the sampling instant. Thecurrent reference generator produces three current references

and which are inphase with the respectivephase to neutral voltages and having an equal amplitude.The other features of the controller are same as that of thesingle-phase topology.

A. Current Reference Generator

The internal block diagram of the current reference gener-ator is shown in Fig. 4. A 1024 8-b EPROM is used tostore the sinusoidal current reference. It is being addressed bya 10-b counter. The counter counts the VCO pulse output ofthe PLL, the frequency of which is set to 1024 times the utilityfrequency. The output of the EPROM which is the digitizedversion of the sine wave is fed to the DAC for converting itto the analog sine wave. The amplitude of the sine wave is set



Fig. 5. Single line diagram of the compensator connected to the utility.

by the AI input of the DAC which is connected to the outputlatch of the PI controller of Fig. 3.

As the reference is synthesized from a previously pro-grammed EPROM and not directly derived from the utility, thepresence of any distortion in the utility voltage or occasionaldips in it will not have any effect on the reference and, hence,on the source current wave shape.

For three-phase cases, three such units are used. The AIinputs of the three units are together connected to the outputlatch of the PI controller. Outputs of the three DAC’s providethe reference currents for the three phases.

IV. M ATHEMATICAL MODEL

The rate at which the dc-link capacitor voltage respondsto the changes in the reference source current is analyzedhere. Although the dynamic response of the dc-link voltagehas no effect on the instantaneous compensating feature ofthe scheme, a mathematical model is required for stabilityanalysis and, hence, for determining the parameters of the PIcontroller. The principle of average power balance is used todetermine the approximate model of the compensator. This isvalid since the magnitude of the current reference does notchange within a cycle of the utility voltage. The mathematicalmodel is derived based on the following assumptions.

1) The utility voltages are balanced and contain no har-monics.

2) Only the fundamental components of currents are con-sidered as the harmonic components do not affect theaverage power balance expressions.

3) All losses of the system are lumped and represented byan equivalent resistance connected in series with theline inductor .

4) Ripple in the dc-link capacitor voltage is neglected.

From Fig. 5

(6)

(7)

The load current is assumed to be lagging the utility voltageby an angle . The rms load current can be written as

(8)

where

rms inphase component of the load current;rms quadrature component of the load current.

Similarly, rms compensator current is written as

(9)

where

rms inphase component of the compensator current;rms quadrature component of the compensator cur-rent.

The rms source current is then

But , therefore

(10)

Power input to the compensator is given by

(11)

where

for single-phase topology and

for three-phase topology.

Power loss in the resistance is given by

(12)

Average rate of change of energy associated with the inductor

Since is constant for a particular operating point

(13)

Average rate at which energy is being absorbed by the capac-itor

(14)

where is the instantaneous dc-link voltage. Equatingaverage rate of change of energy associated with ac link anddc link, the relation between and is obtained for aparticular operating point, which is given by

(15)If a small perturbation is applied in the inphase com-ponent of the compensator current, about a steady-stateoperating point , the average dc-link voltage will alsoget perturbed by a small amount about its steady-stateoperating point . Putting

and



Fig. 6. Transfer function model of the open-loop plant.

in (15), the small-signal perturbed equation neglecting thehigher order differential terms is obtained as

(16)

The steady-state equation from (15) is

(17)

Subtracting (17) from (16), the linear relationship betweenand is obtained as

(18)

The transfer function model of the compensator for aparticular operating point is obtained from (18) as

(19)

where

The block diagram of the proposed open-loop compensator isshown in Fig. 6. The sampled data model of the compensatoris obtained as

(20)

A realistic system is chosen to simulate the performancecharacteristics of the proposed compensating scheme. Thesystem specifications are as follows:

230 V;20 A (rated max);20 A (rated max);500 V;2000 F;0.5 ;0.25 A (the chosen operating point).

Fig. 7. Comparison of output response of the mathematical model to that ofthe actual model for single-phase topology.

Fig. 8. Comparison of output response of the mathematical model to that ofthe actual model for three-phase topology.

For this case, and are obtained as

For a unit step input of , the response ofderived from the mathematical model and that obtained bysimulating the actual system for single- and three-phase casesare shown in Figs. 7 and 8, respectively. The closeness of thetwo responses shows that the mathematical model developedis in close agreement with that of the actual system.

The closed-loop configuration of the scheme is shown inFig. 9. The PI controller is designed to obtain acceptable gainmargin of 5 dB and phase margin of 45, respectively. Theparameters of the PI controller and are found to be0.37 and 6.0, respectively, for single-phase topology and 0.14and 4.5, respectively, for three-phase topology. The open-loop frequency response curves of the single- and three-phasecompensators along with the above mentioned PI controllersare shown in Figs. 10 and 11, respectively.

V. DESIGN OF DC-LINK CAPACITOR

The value of the dc-link capacitor is chosen to restrict theripple of the dc-link voltage within a permissible limit. Theripple is proportional to the magnitude of reactive volt ampereto be compensated. Therefore, the capacitor value is decidedby the maximum var to be handled. In the present scheme, asthe link voltage is controlled in a discrete mode, the capacitormay have to supply the real power demand of the load for



Fig. 9. Transfer function model of the compensated closed-loop plant.

(a)

(b)

Fig. 10. Open-loop frequency response of the single-phase compensator witha PI controller in the feedforward path. (a) Gain versus frequency plot and(b) phase versus frequency plot.

one cycle of the utility voltage in the worst case of transient.Hence, the capacitor design is based on the maximum realpower rating of the load. The design equation based on thisprinciple is derived as follows.

Let the peak power rating of the load be W and therms utility voltage be V. Therefore, the maximum energythat the capacitor has to supply in the worst case of transientis given by

(21)

Let the minimum allowable dc-link voltage be . There-fore

(22)

where is the set dc-link voltage and , the value of thedc-link capacitor. Equating (21) and (22), is obtained as

(23)

where

(24)

The value of is judiciously chosen so that the source currentcontrollability is ascertained at all operating points.

(a)

(b)

Fig. 11. Open-loop frequency response of the three-phase compensator witha PI controller in the feedforward path. (a) Gain versus frequency plot and(b) phase versus frequency plot.

VI. SIMULATED RESULTS

Simulation studies are carried out to predict the performanceof the proposed SCSVC. A dedicated computer programis employed for the purpose and simulated waveforms arepresented next for the cases of linear and nonlinear loadcompensation. In all the cases studied, the width of thehysteresis window is maintained at 0.5 A and the upper limitof the average switch frequency is found to be 5 KHz.

A. Simulated Waveforms for Linear Load Compensation

1) Single-Phase Topology:In order to validate the transientas well as the steady-state behavior, a KVAload is initially connected. At 61 ms, i.e., just after the com-mencement of the fourth cycle, the load is abruptly changedto KVA. The waveforms of the source current,load current, dc-link voltage along with the utility voltage areshown in Fig. 12. The source current is near sinusoidal and isinphase with the utility voltage. The displacement factor andpower factor of the source current are found to be 0.999 985and 0.999 907, respectively. The harmonic spectrum of thefifth cycle of the source current is shown in Fig. 13. Althoughthe dc-link voltage transients take some time to settle downafter the disturbance, the source power factor is maintained



(a)

(b)

(c)

Fig. 12. Simulation waveforms of the single-phase topology for an incrementin the real component of the load current. (a) DC-link voltage, (b) sourcevoltage and source current, and (c) load current.

Fig. 13. Harmonic spectrum of the fifth cycle of the source current ofFig. 12.

unity throughout this entire period. This implies that thecompensation process is instantaneous

Similar waveforms for change of load fromKVA to KVA are shown in Fig. 14.

Displacement factor and power factor of the source currentare found to be 0.999 97 and 0.999 192, respectively.

2) Three-Phase Topology:Similar tests are carried out withthe three-phase compensator. At 61 ms, i.e., just after the

(a)

(b)

(c)

Fig. 14. Simulation waveforms of the single-phase topology for an incrementin the reactive component of the load current. (a) DC-link voltage, (b) sourcevoltage and source current, and (c) load current.

beginning of the fourth cycle of the phase-A source voltage,a KVA load is abruptly changed to

KVA. The waveforms of the utility voltages, sourceand load currents of the three phases and the dc-link capacitorvoltage are shown in Fig. 15. The source currents are nearsinusoidal and inphase with the respective phase voltages. Thetransient period in the dc-link voltage has no effect on thephase relationship between the source currents and the utilityvoltages; they are always maintained inphase with each othereven during the transients. Similar waveforms for a change ofload from KVA to KVA areshown in Fig. 16.

B. Simulated Waveforms for Nonlinear Load Compensation

The nonlinear load is simulated by a phase-controlled thyris-torized converter operating at a phase delay of 45andsupplying 10 A of dc current. The waveforms of the com-pensation process for single-phase case is shown in Fig. 17.Although the load current is quasi-square wave having a



(a)

(b)

(c)

(d)

(e)

Fig. 15. Simulation waveforms of the three-phase topology for an incrementin the real component of the load current. (a) DC-link voltage, (b) phase-Asource voltage and source current, (c) phase-A load current, (d) phase-B sourcevoltage and source current, and (e) phase-B load current.

displacement factor of 0.586 60 and power factor of 0.544 52,the source current is found to be near sinusoidal. The harmonicspectrum of the load current is shown in Fig. 18 and that of

(a)

(b)

(c)

Fig. 16. Simulation waveforms of the three-phase topology for an incrementin the reactive component of the load current. (a) DC-link voltage, (b) phase-Asource voltage and source current, (c) phase-A load current.

the source current is shown in Fig. 19. The displacement factorand power factor of the source current is found to be 0.999 98and 0.999 84, respectively.

The waveforms of the three-phase compensation process isshown in Fig. 20. Here, a diode bridge supplying 10A of dc current is taken as the load. The displacement factorand power factor of the load current are 0.9107 and 0.8783,respectively, whereas the displacement factor and power factorof the source current are found to be 0.9999 and 0.9988,respectively.

VII. EXPERIMENTAL RESULTS

A scaled-down laboratory prototype is developed to validatethe simulation results of single- and three-phase topologies ofthe proposed compensation schemes. Oscillogram records ofthe various waveforms of the single-phase topology are shownin Figs. 21–25. Fig. 21 shows the steady-state performance ofthe compensator while compensating a lagging loadcurrent of A. The harmonic spectrum of thecompensated source current is shown in Fig. 22. It can beinferred that low-order harmonics are not introduced and themagnitude of the higher order harmonics are less than 1% ofthe fundamental. This is achieved at a fairly low switching



(a)

(b)

(c)

Fig. 17. Simulation waveforms of the single-phase topology compensatinga nonlinear load. (a) DC-link voltage, (b) source voltage and source current,and (c) load current.

Fig. 18. Harmonic spectrum of the nonlinear load current of Fig. 17.

Fig. 19. Harmonic spectrum of the compensated source current of Fig. 17.

(a)

(b)

(c)

Fig. 20. Simulation waveforms of the three-phase topology compensating anonlinear load. (a) DC-link voltage, (b) phase-A source voltage and sourcecurrent, and (c) phase-A load current.

Fig. 21. Steady-state performance: Tr1: dc-link voltage (50 V/div); Tr2:utility voltage (60 V/div); Tr3: source current (4 A/div); and Tr4: load current(5 A/div) time scale= 5 ms/div.

frequency of 2 KHz. Fig. 23 shows the compensation of anonlinear load. The load in this case is ac–dc fully controlledthyristor bridge having a mismatch of firing angle delaybetween the positive and negative half cycles so that thecurrent drawn contains a dc component in addition to theharmonics. Fig. 24 shows the transient behavior when an



Fig. 22. Harmonic spectrum of the source current. Frequency range: 0–2.5KHz.

Fig. 23. Steady-state performance: Tr1: dc-link voltage (50 V/div); Tr2:utility voltage (60 V/cm); Tr3: source current (4 A/div); and Tr4: nonlinearload current (1 A/div) time scale= 5 ms/div.

Fig. 24. Transient performance for increment in load: Tr1: dc-link voltage(15 V/div) and Tr2: source current (4 A/div). Time scale= 0:1 s/div.

incremental step change of toA is introduced in the load current, while Fig. 25 shows theutility voltage and source current along with the load currentduring the same condition. The source current is found tobe inphase with the utility voltage even during the transientsthereby validating the instantaneous compensation feature ofthe scheme.

Oscillogram records of the three-phase topology are shownin Figs. 26–32. Figs. 26 shows the steady-state behavior of

Fig. 25. Transient performance for increment in load: Tr1: utility voltage(30 V/div) and source current (4 A/div) and Tr2: load current (4 A/div). Timescale= 20 ms/div.

Fig. 26. Steady-state performance: Tr1: phase-A utility voltage (120 V/div);Tr2: phase-A source current (10 A/div); Tr3: phase-A load current (10 A/div);and Tr4: phase-B source current (10 A/div); time scale= 5 ms/div.

Fig. 27. Steady-state performance: Tr1: phase-A utility voltage (120 V/div);Tr2: phase-A source current (10 A/div); Tr3: phase-A nonlinear load current(10 A/div); and Tr4: phase-B source current (10 A/div); time scale= 5 ms/div.

the compensator compensating a linear lagging loadcurrent of A/phase. Fig. 27 shows the waveformsof nonlinear load compensation. The load considered is adiode bridge rectifier supplying a resistive load. Fig. 28 showsthe spectrum of the nonlinear load current while Fig. 29 showsthe spectrum of the compensated phase-A source current.Steady-state behavior for compensating an unbalanced



Fig. 28. Harmonic spectrum of the phase-A nonlinear load current. Fre-quency range: 0–5 KHz.

Fig. 29. Harmonic spectrum of the phase-A source current. Frequency range:0–5 KHz.

Fig. 30. Compensating an unbalanced load: Tr1: phase-A source current (10A/div); Tr2: phase-A load current (10 A/div); Tr3: phase-B source current (10A/div); and Tr4: phase-B load current (10 A/div). Time scale= 5 ms/div.

load is shown in Fig. 30. Here, the phase-A load current isreduced to 50% to that of the phase-B and phase-C loadcurrents. It is observed that the source currents are balanced.

For studying the transient behavior of the compensator,step change in the reference dc-link voltage is introducedinstead of changing the load. Fig. 31 shows the dc-link voltageand phase-A source current when an incremental step changeof 220–260 V is introduced. Fig. 32 depicts the utility voltageand source current of phase-A along with the utility voltage

Fig. 31. Transient performance for increment in dc voltage reference: Tr1:dc-link voltage (44 V/div) and Tr2: phase-A source current (4 A/div). Timescale= 0:1 s/div.

Fig. 32. Transient performance for increment in dc voltage reference: Tr1:phase-A utility voltage (30 V/div) and phase-A source current (10 A/div)and Tr2: phase-B utility voltage (30 V/div) and phase-B source current (10A/div). Time scale= 20 ms/div.

and source current of phase B for the same condition oftransience. Here again the instantaneous compensation featureis observed.

VIII. C ONCLUSIONS

A new reactive volt–ampere compensator and harmonicsuppressor system is proposed for low- and medium-powerapplications. The proposed technique makes the compensationprocess instantaneous. This feature is achieved using simplifiedcontrol technique thereby enhancing the system reliability.Mathematical model of the scheme is derived. Simulationresults supported by experimental validations are presented.

REFERENCES

[1] V. R. Kanetkar, M. S. Dawande, and G. K. Dubey, “Recent advancesin synchronous link converters,” inPower Electronics and Drives,G.K. Dubey and C. R. Kasarbada, Eds. India: IETE, 1994.

[2] L. Gyugi, “Reactive power generation and control by thyristor circuits,”IEEE Trans. Ind. Applicat.,vol. IA-15, pp. 521–532, Sept./Oct. 1979.

[3] C. W. Edwards, K. E. Mattern, E. J. Stacey, P. R. Nannery, and J.Gubernick, “Analysis and design of a advanced static var generatoremploying GTO thyristors,”IEEE Trans. Power Delivery,vol. 3, pp.1622–1627, Oct. 1988.



[4] L. T. Moran, P. D. Ziogas, and G. Joos, “Analysis and design of athree-phase synchronous solid-state var compensator,”IEEE Trans. Ind.Applicat., vol. 25, pp. 598–608, July/Aug. 1989.

[5] G. Joos, L. T. Moran, and P. D. Ziogas, “Performance analysis of aPWM inverter VAR compensator,”IEEE Trans. Power Electron.,vol.6, pp. 380–391, July 1991.

[6] J. Nastran, R. Cajhen, M. Seliger, and P. Jereb, “Active power filter fornonlinear ac loads,”IEEE Trans. Power Electron.,vol. 9, pp. 92–96,Jan. 1994.

[7] H. Akagi, A. Nabae, and S. Atoh, “Control strategy of active powerfilters using multiple voltage-source PWM converters,”IEEE Trans. Ind.Applicat., vol. IA-22, pp. 460–465, May/June 1986.

[8] H. Akagi, Y. Tsukamoto, and A. Nabae, “Analysis and design of anactive power filter using quad-series voltage source PWM converters,”IEEE Trans. Ind. Applicat.,vol. 26, pp. 93–98, Jan./Feb. 1990.

[9] F. J. Peng, H. Akagi, and A. Nabae, “A study of active powerfilters using quad-series voltage-source PWM converters for harmoniccompensation,”IEEE Trans. Power Electron.,vol. 5, pp. 9–15, Jan.1990.

[10] H. L. Jou, J. C. Wu, and H. Y. Chu, “New single phase active powerfilter,” Proc. Inst. Elect. Eng.,vol. 141, no. 3, pp. 129–134, 1994.

[11] S. Deb, B. W. Sherman, and R. Hoft, “Resonant converter power lineconditioner: Design and evaluation,”IEEE Trans. Ind. Applicat.,vol.29, pp. 500–509, May/June 1993.

[12] J. D. Van Wyk, D. A. Marshall, and S. Boshoff, “Simulation andexperimental study of a reactively loaded PWM converter as fastsource of reactive power,”IEEE Trans. Ind. Applicat.,vol. IA-22, pp.1082–1090, Nov./Dec. 1986.

[13] L. T. Moran, P. D. Ziogas, and G. Joos, “Analysis and design of a novel3 � � solid-state power factor compensator and harmonic suppressorsystem,” IEEE Trans. Ind. Applicat.,vol. 25, pp. 609–619, July/Aug.1991.

[14] , “A solid-state high-performance reactive-power compensator,”IEEE Trans. Ind. Applicat.,vol. 29, pp. 969–978, Sept./Oct. 1993.

[15] H. Akagi, Y. Kanazawa, and A. Nabae, “Instantaneous reactive powercompensators comprising switching devices without energy storagecomponents,”IEEE Trans. Ind. Applicat.,vol. IA-20, pp. 625–630,May/June 1984.

[16] J. L. Willems, “A new interpretation of the Akagi-Nabae power com-ponents for nonsinusoidal three-phase situations,”IEEE Trans. Instrum.Meas.,vol. 41, pp. 523–527, Aug. 1992.

[17] O. Stihi and B. T. Ooi, “A single-phase controlled-current PWMrectifier,” IEEE Trans. Power Electron.,vol. 3, pp. 453–459, Oct. 1988.

[18] B. T. Ooi, J. C. Salmon, J. W. Dixon, and A. B. Kulkarni, “A three-phase controlled-current PWM converter with leading power factor,”IEEE Trans. Ind. Applicat.,vol. IA-23, pp. 78–84, Jan./Feb. 1987.

Kishore Chatterjee was born in Calcutta, India, onJuly 20, 1967. He received the B.E. and M.E. (powerelectronics) degrees from M.A.C.T., Bhopal, India,and Bengal Engineering College, India, in 1990 and1992, respectively. In 1998, he received the Ph.D.degree in power electronics from the Indian Instituteof Technology, Kanpur, India.

From 1997 to 1998, he was a Senior Project Asso-ciate at the Indian Institute of Technology, Kanpur,where he was involved with a project on powerfactor correction and active power filtering, which

was being sponsored by the Central Board of Irrigation and Power, India.Since December 1998, he has been an Assistant Professor in the Departmentof Electrical Engineering, Indian Institute of Technology, Bombay. His currentresearch interests are modern var compensators, active power filters, utility-friendly converter topologies, and S.R.M. drives.

B. G. Fernandeswas born in Mangalore, India, onMay 17, 1962. He received the B.Tech. degree in1984 from Mysore University, India, the M.Tech.degree in 1989 from the Indian Institute of Technol-ogy, Kharagpur, India, and the Ph.D. degree in 1993from the Indian Institute of Technology, Bombay,India.

He was with M/S Development Consultant Ltd.from 1984 to 1987. From 1993 to 1997, he was withthe Department of Electrical Engineering, IndianInstitute of Technology, Kanpur, as an Assistant

Professor. Currently, he is with the Department of Electrical Engineering,Indian Institute of Technology, Bombay. His current research interests arein PMSM drives, vector-controlled drives, quasi-resonant dc-link convertertopologies, modern var compensators, and active power filters.

Gopal K. Dubey (SM’83) was born on November17, 1939. He received the B.E. degree (with honors)from Jabalpur University, India, in 1963 and theM.Tech. degree in drives and controls and Ph.D.degree from the Indian Institute of Technology,Bombay, India, in 1965 and 1972, respectively.

He was an Assistant Professor at the IndianInstitute of Technology, Bombay, until 1977 and hasbeen Professor at the Indian Institute of Technology,Kanpur, since 1978. He was an Honorary VisitingResearch Fellow and Commonwealth Scholar at the

University of Bradford, U.K., from 1974 to 1975 and a Visiting Professor at theUniversity of British Columbia, Vancouver, Canada, from 1983 to 1984 andat the Virginia Polytechnic Institute and State University, Blacksburg, from1984 to 1985. He was a Senior Visiting Fellow at the National Universityof Singapore in 1995. His fields of interest include electrical drives, powerelectronics, control systems, and engineering education. He has written severalbooks including:Power Semiconductor Controlled Drives(Englewood Cliffs,NJ: Prentice-Hall, 1989),Thyristorized Power Controllers(New Delhi: WileyEastern, 1986), andFundamentals of Electrical Drives(New Delhi: Narosa,1994). He editedPower Electronics and Drives(New Delhi: Tata–McGraw-Hill, 1993) and has published 150 research papers. He is an Honorary Editorof the IETE Journal of Research.

Dr. Dubey received the Bimal Bose Award of IETE in 1990 for excellencein power electronics. He is a Fellow of the IETE, Institution of Engineers, andIndian National Academy of Engineering. He was Chairman of the IEEE UPSubsection and then Section for five years (1989–1993). He is an AssociateEditor of the IEEE TRANSACTIONS ON POWER ELECTRONICS.


instantaneous reactive volt–ampere compensator

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