1. EE 290CCMOS Analog Design Using All-region MOSFET ModelingLecture 2: Fundamentals of the MOSFET model ( Two- and three- terminal MOS structures)

2. Semiconductors Four types of charge are present inside asemiconductor: the fixed positive charge of ionizeddonors, the fixed negative charge of ionizedacceptors, the positive mobile charge of holes, andthe negative mobile charge of electrons.We consider all donors and acceptors ionized + N D = N D and N A = N A On this basis, the net positive charge density is = q ( N D N A + p n) CMOS Analog Design Using All Region MOSFET Modeling 2 3. Boltzmanns Law-1 In equilibrium electrons and holes follow Boltzmannslaw and their concentrations (number per unitvolume) are proportional to-( Energy / kT ) ek=1.38x10-23 J/K is the Boltzmann constantT is the absolute temperature in Kelvin.electron and hole densities in equilibrium are relatedto electrostatic potential byq ( 1 2 )p ( 1)=ekTp ( 2)q=1.6x10-19 C is the electron charge 3CMOS Analog Design Using All Region MOSFET Modeling 4. Boltzmanns Law-2n0 and p0 equilibrium electron and holeconcentrations in the neutral bulk (=0 )q qu p = p0 e= p0 ekT= n0 eu n = n0e kTu = / t normalized electrostatic potential t = kT / q is the thermal potential ni the concentration of electrons (and holes)in an intrinsic semiconductor, the mass-actionlaw is np = ni2CMOS Analog Design Using All Region MOSFET Modeling4 5. Example: Calculate the junction built-in potential for a Si pn junction with NA = 1017 atoms/cm and ND = 1018 atoms/cm3 ,T=300K In equilibrium, if we choose the potential origin = 0 where the semiconductor is intrinsic (i.e., where p0=n0=ni) / tp =ne n0 = ni e / t0 i n region / t Far from the junction n0 N D = ni e on the n-sideFar from the junction p region / tp0 N A = ni e on the p-sideThe built-in potential is given by NA ND ND NA t ln = t ln bi = n region p region = t ln ni ni 2 ni bi 26 ln (1015 ) 900 mV 5 CMOS analog design using all-region MOSFET 6. The Two-Terminal MOS Structure6CMOS Analog Design Using All Region MOSFET Modeling 7. The Ideal Two-Terminal MOS Structure(VFB=0)A ox=C ox t ox QGM QG capacitor area A, oxide VG s =thickness tox and permittivity of Cox Ooxide ox +SQCCox oxQG s QG = Cox == A A tox _ QG + QC = 0 QC VG = s Cox 7CMOS Analog Design Using All Region MOSFET Modeling 8. Example (a) Calculate the oxide capacitance per unit areafor tox= 5 and 20 nm assuming ox = 3.90, where0= 8.8510-14 F/cm is the permittivity of freespace. (b) Determine the area of a 1pF metal-oxide-metal capacitor for the two oxidethicknesses given in (a). Answer: (a) =690 nF/cm2 = 6.9 fF/m2 for tox=5 nmand = 172 nF/cm2= 1.7 fF/m2 for tox= 20 nm. Thecapacitors have areas of 145 and 580 m2 for oxidethicknesses of 5 and 20 nm, respectively.CMOS Analog Design Using All Region MOSFET Modeling 8 9. The Flat-Band VoltageIn equilibrium (with the two terminals shortened/open), the contact potential between the gate and the semiconductor substrate of the MOS induces charges in the gate and the semiconductor for VGB=0. Charges inside the insulator and at the semiconductor-insulator interface also induce a semiconductor charge at zero bias. The effect of the contact potential and oxidecharges can be counterbalanced by applying agate-bulk voltage called the flat-band voltage VFB. QC = s VG VFB CoxCMOS Analog Design Using All Region MOSFET Modeling 9 10. Example (a) Determine the expression for the flat-band voltage ofn+ polysilicon-gate on p-type silicon (b) Calculate the flat-band voltage for an n+ polysilicon-gate on p-type siliconstructure with NA = 1017 atoms/cm-3.Answer:(a) In equilibrium, by analogy with an n+ p junction, thepotential of the n+-region is positive with respect to that ofthe p-region The flat-band condition is obtained byapplying a negative potential to the n+ gate with respect tothe p-type semiconductor of value NA VFB _ n + p = bi _ n + p = 0.56 V t ln ni VFB = 0.56 V t ln (107 ) = 980 mV(b) CMOS Analog Design Using All Region MOSFET Modeling 10 11. Operation Regimes of the MOSFET:Accumulation (p-substrate) VGB < V FB QC > 0 G s < 0 QG -----------Qo +++ + ++++++++++++++Holes + VGBQC accumulate in the P semiconductor surfaceB CMOS Analog Design Using All Region MOSFET Modeling 11 12. Operation Regimes of the MOSFET: Depletion (p-substrate) VGB > V FB QC < 0 G 0 < s < FQG + ++++++++ Qo Holes evacuate from the P+ ++ + - -- - - - - -- - VGB semiconductor surface andQC ----acceptor ion charges - become uncoveredF = Fermi potential ( to be defined) B CMOS Analog Design Using All Region MOSFET Modeling 12 13. Operation Regimes of the MOSFET:Inversion (p-substrate)VGB > V FBQC < 0Gs > FQG + ++++++++ Qo+ +++ - -- - --- - -- - VGBQelectrons approach the C -- -- - - - - - surface! -- - B CMOS Analog Design Using All Region MOSFET Modeling13 14. Inversion for p-Type Substate volume charge density inside the semiconductor:uu = q( p0e n0e + n0 p0 )depletion of holes prevails over electron charge when u> n0 e or up0 e2 t tp0p0 p0 < ln( ) = ln( 2 ) = t ln( ) = F2 2n0ni ni >F the concentration of minority carriers (n) becomes higher than that of majority carriers (p); inversionCMOS Analog Design Using All Region MOSFET Modeling 14 15. Small Signal Equivalent CapacitiveCircuit of the MOS Capacitor dQC 1 Cgb = =dQGdQC d s dQC1 C gb = =d s +dVGdVG Cox dQC Cox1 C gb =11 + Cc Cox Cc = dQC dsd ( QB + QI ) = Cb + Ci Cc = ds CMOS Analog Design Using All Region MOSFET Modeling 15 16. Main Approximation for Compact Modeling: Charge-Sheet Model = s Minority carriers are at the interface Si-SiO2 wheredQIQI es /t QICi = = t ds Charge-sheet + depletion approximation for the bulk charge QB qNAxd = 2qs NA (s t ) = 2q s N A / Cox2q s N A Cox is the body-effect Cb =coefficient 2 s t 2 s t16CMOS Analog Design Using All Region MOSFET Modeling 17. The Three-Terminal MOS StructureCarrier concentrations in SiVG VC substrate follow Boltzmannslaw: n, p exp(-Energy/kT) pn+SThe origin of potential is taken deep in the bulkq ( VC ) q = n0 eu uC= p0 e u ;p = p0 e n = n0 e kTkT electrons are no longer in equilibriumpn = ni2 e uC = ni2 e VC / twith the holes, due to the bias of thesource-bulk junction VC CMOS Analog Design Using All Region MOSFET Modeling 17 18. Small Signal Equivalent Capacitive Circuit of the 3 Terminal MOSdQI ( Cb + Cox ) Ci = dVC Ci + Cb + Cox 11 dQI + = dVC Cox + Cb Ci Approximations: 1) depletion capacitance per unit area is constant along the channel and is calculated neglecting inversion chargeCi = QI / t2) Charge sheet modelCMOS Analog Design Using All Region MOSFET Modeling 18 19. The Linearization Point sasa = s Determination of QI =0 QB potential balance = sa = sa + sa t VG VFB Cox 2 VG sa t = VG VFB t + 42 Cox QI = 0 _+s = sa dsaCox 1 Ci = 0 == _ dVG Cox + Cb n QB Cb+CMOS Analog Design Using All Region MOSFET Modeling 19 20. ExampleFor tox = 5 nm and 20 nm determine the minimum doping NA for which the slope factor n < 1.25 at sa = 2F.Answer: For sa=2F 2q s N A 2q s N A Cb 1+= 1+ n =1+ 2Cox sa2Cox 2F Cox 2 Thus, for n=1.25 ( 0.25) 2F 4Cox 2NA= 2q s where F is a weak (logarithmic) function of NA. Using 2F = 0.8 V for the first calculation, we obtain after two iterations that NA> 4.9x1015 atoms/cm-3 for tox=5nm, and NA > 2.31014 atoms/cm-3 for tox=20 nm.CMOS Analog Design Using All Region MOSFET 20Modeling