chapter four–80x86 instruction set principles of microcomputers 2015年5月17日 2015年5月17日...

2023年4月18日星期二 1

Chapter Four–80x86 Instruction Set Principles of Microcomputers

Chapter four

80x86 Instruction Set （ 2 ）

8086 Addressing Modes



What is the Addressing Mode ?

add dest, source ; dest +source→dest

add ax,bx ; ax +bx→ax

The addressing mode means where and how the CPU gets the operands when the instruction is executed.



Three types of 8086 addressing modes

• Immediate Addressing Mode ---CPU gets the operand from the instruction • Register Addressing Mode ---CPU gets the operand from one of the internal registers

• Memory Addressing Mode ---CPU gets the operand from the memory location(s)



Exp ：MOV AL, 80HMachine code:B080H

AL

B0H

80H

Instruction Queue

MACHINECODE

B8

12H

Instruction Queue

AL

MACHINECODE

AH

34H

12

34

80H

80H

12 34

1. Immediate Addressing Mode

MOV AX, 1234HMachine code:B83412H



Exp ： MOV AX, CX

89

C1

Memory AX

CX Machine code

2. Register Addressing Mode



• Specify an offset address (effective address) using expressions of the form (different parts of expression are optional):

– [ Base Register + Index Register+ Displacement]

• 1) Base Register---BX, BP• 2) Index Register---SI, DI• 3) Displacement ---constant value• Example: 1) add ax,[20h] 2) add ax,[bx] 3) add ax,[bx+20h] 4) add ax, [bx+si] 5) add ax, [bx+si+20h]

3. Memory Addressing Mode



⑴ Direct Addressing ModeExp: MOV AL, [1064H]

Machine code:A06410H

• The offset address of the operand is provided in the instruction directly;

• The physical address can be calculated using the content of DS and the offset :

PA = (DS)*10H+Offset




⑴ Direct Addressing ModeExample: MOV AL, [1064h] ;Assume (DS)=2000H

Machine code: A06410H

21064H

（ DS)*10H=20000H

20000H

21064H

AL

A0

6410

45

…

CodeSegment

DataSegment

45

45

+ 1064H



⑵ Register Indirect Addressing Mode

• The address of memory location is in a register (SI,

DI,or BX only)

• The physical address is calculated using the content of DS

and the register(SI,DI,BX) PA = (DS)*10H+(SI)/(DI)/(BX)


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5040

……

M

AX

⑵ Register Indirect Addressing Mode

ASSUME: (DS)=3000H, (SI)=2000H, (BX)=1000H

30000H

(DS)*10H=30000H(SI)= 2000H+

32000H

32000H

40 50

5040

……

64H

M

AL 30000H

(DS)*10h= 30000H (BX)= 1000H+

31000H

31000H64H

64H

MOV [BX], ALMOV AX, [SI]

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⑶ Register Relative Addressing

EA=

(BX)(BP)(DI)(SI)

+ Displacement

For physical address calculation: DS is used for BX,DI,SI; SS is used for BP

PA=(DS)*10H+(BX)/(DI)/(SI)+DispOR

PA=(SS)*10H+(BP)+Disp

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⑶ Register Relative AddressingMOV CL, [BX+1064H] ;assume: (DS)=2000h, (bx)=1000h ;Machine Code: 8A8F6410

22064H

22064H

8F

6410

45

…

CodeSegment

DataSegment

8A

…

CL

45

45 21000H

(BX)= 1000H(DS)*10h= 20000H

20000H

+ 1064H

PA=(ds)*10h+(bx)+1064PA=(ds)*10h+(bx)+1064hh

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⑷ Based Indexed Addressing

EA=(BX)(BP) +

(DI)(SI)

• Base register(bx or bp) determines which segment(data or stack) the operand is stored;• if using BX, the operand is defaultly located in Data segment,then: PA=(DS)*10H+(BX)+(DI)/(SI)

• if using BP, the operand is defaultly located in stack segment,then: PA=(SS)*10H+(BP)+(DI)/(SI)

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⑷ Based Indexed Addressing

Example: MOV AH, [BP][SI];Assume(ss)=4000h,(bp)=2000h,(si)=1200h

56H

……

M

AH 40000H

(SS)*10H= 40000H(BP)= 2000H

+ 43200H

43200H

(SI)= 1200H

56H

56H

PA=(ss)*10h+(bp)+(si)PA=(ss)*10h+(bp)+(si)

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⑸ Based Indexed Relative Addressing

EA=(BX)(BP) +

(DI)(SI) + Displacement

if using BX, the operand is defaultly located in Data segment,then: PA=(DS)*10H+(BX)+(DI)/(SI)+disp

if using BP, the operand is defaultly located in stack segment,then: PA=(SS)*10H+(BP)+(DI)/(SI)+disp

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⑸ Based Indexed Relative Addressing

MOV [BX+DI+1234H], AH;assume (ds)=4000h,(bx)=0200h,(di)=0010h

;machine code:88A13412hA1

3412

…

Codesegment

Datasegment

88

…

45AH

40000H

(DS)*10H=40000H(BX)= 0200H

+(DI)= 0010H 1234H

45

45

41444H

41444H

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Summary on the 8086 memory addressing modes

operand offset address Default Overridden （ effective address ） Segment Register Segment Register

3. Register [SI/DI/BX/BP+disp] (SI)/(DI)/(BX)/(BP)+disp DS CS ES SS Relative Addressing

2. Register [BX]/[SI] /[DI] Content of the R DS CS ES SS Indirect Addressing

1. Direct Addressing [disp] disp DS CS ES SS

4. Based Indexed [BX+SI/DI] (BX)+disp DS CS ES SS Addressing [BP+SI/DI] (BP)+disp SS CS ES DS

5. Based Indexed [BX+SI/DI+disp] (BX)+(SI)/(DI)+disp DS CS ES SS Relative Addressing [BP+SI/DI+disp] (BP)+(SI)/(DI)+disp SS CS ES DS

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Examples:Assume: (BX)=6000H, (BP)=4000H, (SI)=2000H, (DS)=3000H, (ES)=3500H, (SS)=5000H

3000 ： 0520 30520HDirect Addressing

2. MOV AX, [BX]

1. MOV AX, [0520H]

5. MOV AX, ES: [BX+SI+0050H]

4. MOV AX, [BP+6060H]

Register Indirect Addressing 3000 ： 6000 36000H

Register Relative Addressing

Register Relative Addressing

3. MOV AX, [SI+1000H] 3000 ： 3000 33000H

5000 ： A060 5A060H

3500 ： 8050 3D050HBased Indexed Relative Addressing

Instruction Instruction addressingaddressing logical logical physical physical modemode address address address address

chapter four–80x86 instruction set principles of microcomputers 2015年5月17日 2015年5月17日...

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