a 5th order gm-c filter in 0.25 m cmos with digitally ...tcc/iscas_02b_slides.pdf · university of...

University of Toronto Department of Electrical and Computer Engineering

A 5th Order Gm-C Filter in 0.25 µm CMOS with Digitally Programmable

Poles and Zeros

Tony Chan Carusone, David A. [email protected]

May 29, 2002

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Outline

• Motivation - Analog Adaptive Filters

• Filter Design

- filter structure

- digitally programmable transconductor

• Results

• Conclusion

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Motivation

• Analog adaptive filters offer several important advantages in high speed mixed signal systems:

- reduced specifications on the A/D converter- reduced specifications on the analog line driver (echo cancellation application)- moves the equalizer outside of the timing recovery loop- potential for power and area savings over digital filters (at high speeds and long

impulse responses)

• Analog implementations of adaptation algorithms are not robust⇒ digitally programmable analog filter

Clock + DataRecovery

ProgrammableAnalog Filter

AdaptationAlgorithm

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Filter Structure

• continuous-time orthonormal ladder filter [Johns et al, TCAS, Mar ‘89]

• gains ai and bi are digitally programmable transconductors⇒ can realize any rational transfer function

• automatically scaled for optimum dynamic range

-a1

a1 -a2

a2 -a3

b3b1

b2

in

out

-a4

a4 -a5

b5

b4

a3

⌠ ⌡ ⌠ ⌡

⌠ ⌡ ⌠ ⌡⌠ ⌡

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Digitally Programmable Transconductor

• fully-differential transconductor

• Gm is proportional to triode-transistor, M3, conductance

Vin+

M1

M4

M3

Vin-

M2

M5

Vcntrl

Iout+ Iout

-

I1 I1

GmIout

+ Iout -–

Vin + Vin

-–------------------------=

Gm M3( )WL-----

M3( )

Vgs M3( )⋅∝

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• 9-bit programmable conductance, M3

g2 VSS

g1

g0

g-1

g-2

Vcntrl

x2

x4drainsource

4-bitDAC

b 0 -

b 3

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• hysteresis is required when two separate mechanisms control the same adapted parameter

• the fine control DAC range is a function of the coarse control bits

Fine (bi)Coarse (gi)

Gai

n V

alue

(Gm

)

optimal value optimal value

GoodBad Bad

g2g1g0 = 000

001

01x

1xx

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Details of the 4-bit DAC

12×Iu 2×Iu

g1 & g2

Iu

g2

Iu

Ib

g0 & g1 & g2

∆V

+

-

IDAC

Iref

R1

R

R RR

2R 2R

Vcntrl

O2

O1 Mt

Ia = 30Iu

g2 - g0

g2g1g0 Ib1xx Iu01x 2Iu001 4Iu000 16Iu

Vsrcref

b0

b1 b2 b3

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Die Photo

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Experimental Results

• Lowpass filter with varying cutoff frequency and gain:

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Experimental Results

Entire Prototype Gm-C Filter ICTechnology 0.25 µm CMOS

Supply Voltage 2.5 VIntegrated Area 2.5 mm × 1.7 mm = 4.25 mm2

Power 233 mW (Simulated)250 mW (Measured)

First Order Filter Test StructureTHD with 200 mVpp input, 120 mVpp output tone at 8 MHz -41 dB

5th Order Lowpass Orthonormal Ladder Filter Core (40 MHz passband)

Integrated Area 1.25 mm × 0.38 mm = 0.469 mm2

Power with 9-Bit Programmable Coefficients 130 mW (Simulated)a

a. Includes shared bias circuitry.

Power with 5-Bit Programmable Coefficients 87.5 mW (Simulated)a

Noise Power 1.656 mVrms

THD with 125 mVpp input, 170 mVpp output tone at -27.7 dBb

b. Measurements for different transfer functions varied between -20 dB to -30 dB.

SFDR with input tone at 30 dBc

c. Corresponds to input amplitude of 105 mVpp and output amplitude of 145 mVpp.

f3 dB 2⁄

f3 dB 2⁄

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Current consumption of the prototype by block

Test structures,Buffers, etc.,

41.0 mA

DACs, 17.1 mA

CMFBs, 3.9 mA

Transconductors,7.6 mA

Filter Core,52.1 mA

Miller Integrators,21.2 mA

Biasing, 2.4 mA

Entire Prototype IC = 93.1 mA

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Conclusions

• circuit techniques for digitally programmable analog filters in CMOS were explored

• a 5th order filter with digitally programmable poles and zeros was developed

• the speed of operation is faster than any previously reported filter with this degree of programmability (although the linearity is limited)

a 5th order gm-c filter in 0.25 m cmos with digitally ...tcc/iscas_02b_slides.pdf · university of...

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