5 4 3 2 1 cathedral peak ii block diagram pcb p/n : 48...
TRANSCRIPT
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBBLOCK DIAGRAM
A3
1 43Friday, June 20, 2008
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBBLOCK DIAGRAM
A3
1 43Friday, June 20, 2008
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBBLOCK DIAGRAM
A3
1 43Friday, June 20, 2008
Mobile CPU
Cantiga
HOST BUS 667/800/[email protected] DIMM1667/800 MHz
667/800MHz
667/800MHz
ICH9M
X4 DMI400MHz C-Link0
ODD SATA
SATA
HDD SATA
SATA
Blue Tooth(USB)
Camera(USB)
USB3 Port
USB
KBCENE3310
INT.KB
TouchPad
WinbondW25X1616M Bits
BIOS
Launch Buttom
DEBUGCONN.
LPC
LPC BUS
a/b/g/nMini CardPCIex1Kedron
88E8071
LANGiga LAN TXFM RJ45
New card PWR SWTPS2231
MS/MS Pro/xD/MMC/SD5 in 1
CRT
LCD
CLK GEN.ICS 9LPRS365BKLFT (71.09365.A03) THERMAL EMC2102
CodecALC268
MIC In
MDC Card
APA2057OP AMP
AZALIA
MODEM
INT.SPKR
Line Out(NO SPDIF)
RJ11
AGTL+ CPU I/FDDR Memory I/F
INTEGRATED GRAHPICSLVDS, CRT I/F
6 PCIe portsPCI/PCI BRIDGE
ACPI 2.04 SATA
12 USB 2.0/1.1 ports
667/800 MHz
CardReaderRealtekRTS5158E
USB
ETHERNET (10/100/1000MbE)High Definition Audio
LPC I/FSerial Peripheral I/F
Matrix Storage Technology(DO)Active Managemnet Technology(DO)
Penryn 4793
4, 5
6,7,8,9,10,11
12
13
16
14
15
17,18,19,20
21
22
22
23
23
23 24
25 26 26
27 27
24
27
28
29
29
29
29
30
30 30
3131
Cathedral Peak II Block Diagram
PCIex1
PCIex1
INT.MIC
38
VGFXCORE0.7~1.25V
OUTPUTS
CFXCORE DC/DC
INPUTS
DCBATOUT
ISL6263
Project code: 91.4K801.001PCB P/N : 48.4K801.0SBREVISION : 08219-SB
TOP
VCC
S
S
GND
BOTTOM
PCB STACKUP
DCBATOUT
SYSTEM DC/DC
1D8V_S3
INPUTS
SYSTEM DC/DCTPS51125
5V_S5
35
OUTPUTS
RT9026DDR_VREF_S0
36
3D3V_S5
1D8V_S3
37
DCBATOUT1D05V_S0
INPUTS OUTPUTS
TPS51124
DDR_VREF_S3
RT9018A
1D8V_S3 1D5V_S0
36
39
34
VCC_CORE_S00.35~1.5V
OUTPUTS
CPU DC/DC
INPUTS
DCBATOUT
CHARGER
OUTPUTSINPUTS
BT+
DCBATOUTDCBATOUT
BQ24745
ISL6266A
DDR2 DIMM2
16
14
RTM 875N-606-LFT (71.00875.C03)
Launch BoardLED Board
16
-
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBReference
A3
2 43Friday, June 20, 2008
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBReference
A3
2 43Friday, June 20, 2008
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBReference
A3
2 43Friday, June 20, 2008
1 = TLS cipher suite with confidentiality (default)
0 = Transport Layer Security (TLS) cipher suite with no confidentiality
Cantiga chipset and ICH9M I/O controllerHub strapping configuration
page 218
Intel Management engine Crypto strap
CFG6
Reserved This signal should not be pulled high.
GPIO49
SPI_MOSI
GPIO33/HDA_DOCK_EN#
SATALED#
SPKR
TP3
CFG9
00 = Reserve
(Default)CFG16
0 = LFP Disabled (Default)Local Flat Panel(LFP) Present
CFG19
CFG20
SDVO_CTRLDATA
11 = Disabled (default)
1 = Dynamic ODT Enabled0 = Dynamic ODT Disabled
1= LFP Card Present; PCIE disabledL_DDC_DATA
FSB Dynamic ODT
DMI Lane Reversal
NOTE:
PCIE config2 bit2,Rising Edge of PWROK.
GNT2#/GPIO53
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Top-Block Swap Override.Rising Edge of PWROK.
GNT0#:SPI_CS1#/GPIO58
0 = Reverse Lanes,15->0,14->1 ect..
Boot BIOS Destination Selection 0:1.Rising Edge of PWROK.
ESI compatible mode is for server platforms only.This signal should not be pulled low for desttopand mobile.
HDA_SDOUT
HDA_SYNC
GNT3#/GPIO55
Signal
Sampled low:Top-Block Swap mode(inverts A16 forall cycles targeting FWH BIOS space).Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.
This signal has a weak internal pull-up.
XOR Chain Entrance/PCIE Port Config1 bit1,Rising Edge of PWROK
1= Normal operation(Default):Lane Numbered in order
Allows entrance to XOR Chain testing when TP3pulled low.When TP3 not pulled low at rising edgeof PWROK,sets bit1 of RPC.PC(Config Registers:offset 224h). This signal has weak internal pull-down
PCIE config1 bit0,Rising Edge of PWROK.
GPIO20
Usage/When Sampled
ESI Strap (Server Only)Rising Edge of PWROK
Comment
CFG[13:12]
0 = Only Digital Display Port or PCIE is operational (Default)1 =Digital display Port and PCIe are operting simulataneously via the PEG port
0 =No SDVO Card Present (Default)
1 = SDVO Card Present
DMI Termination Voltage,Rising Edge of PWROK.
The signal is required to be low for desktopapplications and required to be high formobile applications.
Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)
CFG[2:0]
CFG[4:3]CFG8CFG[15:14]CFG[18:17]
CFG5
Pin Name
011 = FSB667FSB Frequency Select
0 = DMI x2
others = Reserved
Reserved
(Default)1 = DMI x4
Strap Description
DMI x2 Select
iTPM Host Interface
Configuration
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal has a weak internal pull-down.
GNT1#/GPIO51
Integrated TPM Enable,Rising Edge of CLPWROK
Sample low: the Integrated TPM will be disabled.Sample high: the MCH TPM enable strap is sampledlow and the TPM Disable bit is clear, theIntegrated TPM will be enable.
Flash Descriptor Security Override StrapRising Edge of PWROK
PCI Express Lane Reversal. Rising Edgeof PWROK.
No Reboot.Rising Edge of PWROK.
XOR Chain Entrance.Rising Edge of PWROK.
This signal should not be pull low unless using XOR Chain testing.
If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timersystem reboot feature). The status is readable via the NO REBOOT bit.
ICH9M Functional Strap Definitions
Controllable via Boot BIOS Destination bit(Config Registers:Offset 3410h:bit 11:10).GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
page 92
Sampled low:the Flash Descriptor Security will beoverridden. If high,the security measures will be in effect.This should only be enabled in manufacturingenvironments using an external pull-up resister.
SDVO Present
Montevina Platform Design guide 22339 0.5
LAN MARVELL 88E8071
USB Table
LANE2
LANE1
MiniCard WLAN
PCIE Routing
010 = FSB800
000 = FSB1067
LANE3
NewCard
ICH9 EDS 642879 Rev.1.5
ICH9M
BATTERY
KBC
ThermalEMC2102
BAT_SCL
SMBC_ICH 9LPRS365BKLFT
DDR
CFG7
SMBus
ICH9 EDS 642879 Rev.1.5
ICH9M Integrated Pull-upand Pull-down Resistors
SIGNAL Resistor Type/Value
HDA_BIT_CLK
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GNT[3:0]#/GPIO[55,53,51]
GPIO[20]
LDA[3:0]#/FHW[3:0]#
LDRQ[0]
PME#
PWRBTN#
SATALED#
LAN_RXD[2:0]
LDRQ[1]/GPIO23
TP[3]
SPKR
GLAN_DOCK#
SPI_CS1#/GPIO58/CLGPIO6
USB[11:0][P,N]
CL_RST0#
SPI_MOSI
SPI_MISO
TACH_[3:0]
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 15K
The pull-up or pull-down active when configured for nativeGLAN_DOCK# functionality and determined by LAN controller
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
GPIO[49]
HDA_DOCK_EN#/GPIO33
CL_DATA[1:0]
CL_CLK[1:0]
DPRSLPVR/GPIO16
ENERGY_DETECT
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
0= The iTPM Host Interface is enabled(Note2)1=The iTPM Host Interface is disalbed(default)
PCIE Graphics Lane
CFG10 PCIE Loopback enable0 = Enable (Note 3)1= Disabled (default)
XOR/ALL
1 = Reverse LanesDMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)DMI x2 mode[MCH -> ICH]:(3->0,2->1)
0 = Normal operation(Default): Lane Numbered in Order
Digital Display Port(SDVO/DP/iHDMI)Concurrent with PCIe
1. All strap signals are sampled with respect to the leading edge ofthe (G)MCH Power OK (PWROK) signal.2. iTPM can be disabled by a 'Soft-Strap' option in theFlash-decriptor section of the Firmware. This 'Soft-Strap' isactivated only after enabling iTPM via CFG6.Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
10 = XOR mode Enabled01 = ALLZ mode Enabled (Note 3)
LANE4
LANE5
10
11 NC
NC
USB2
USB1
USB3
Pair
4
MINIC1
USB
5
0
2
3
1
Device
6
7
8
9 NEW1
Bluetooth
WEBCAM
LANE6 NC
NC
NC
NCNC
Card Reader
-
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
3D3V_CLKGEN_S03D3V_48MPWR_S0 3D3V_CLKPLL_S0
PCLKCLK5
PCLKCLK2
PCLKCLK4
CPU_SEL2_R
PCLKCLK3
CLK_PCIE_SATA_1
CLK_CPU_BCLK_1
CLK_PCIE_MINI_1#
CLK_MCH_3GPLL_1#CLK_MCH_3GPLL_1
DREFCLK_1DREFCLK#_1
PCLKCLK1
CLK_MCH_BCLK_1
CLK_CPU_BCLK_1#
CLK_MCH_BCLK_1#
PCLKCLK5PCLKCLK4
CLK48
CLK_PCIE_ICH_1#CLK_PCIE_ICH_1
CLK_PCIE_LAN#_RCLK_PCIE_LAN_R
CLK_PCIE_MINI_1PCLKCLK0
GEN_XTAL_OUT_R
GEN_XTAL_OUT
GEN_XTAL_IN
CLK_PCIE_SATA_1#
3D3V_48MPWR_S0
PCLKCLK2
DREFSSCLK#_1DREFSSCLK_1
CLK_PCIE_NEW#_RCLK_PCIE_NEW_R
3D3V_CLKGEN_S0
3D3V_CLKPLL_S0CLK48_ICHPCLK_ICH
PCLK_KBC
CLK_ICH14
PCLKCLK3
CPU_SEL2_R
PCLK_FWH
3D3V_S03D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
CPU_SEL14,7
PM_STPCPU#18
CLK48_ICH18
CLK_CPU_BCLK 4CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6CLK_MCH_BCLK# 6
CLK_PCIE_SATA 17CLK_PCIE_SATA# 17
CLK_PCIE_ICH 18CLK_PCIE_ICH# 18
CLK_PCIE_MINI1 27CLK_PCIE_MINI1# 27
PM_STPPCI#18
CLK_PWRGD18
PCLK_ICH18
CPU_SEL04,7
PCLK_KBC30CLK_MCH_3GPLL 7CLK_MCH_3GPLL# 7
CLK_PCIE_LAN# 25CLK_PCIE_LAN 25
DREFCLK 7DREFCLK# 7
DREFSSCLK# 7DREFSSCLK 7
CLK_PCIE_NEW 27CLK_PCIE_NEW# 27
CLK_MCH_OE#7
SMBD_ICH12,13,20SMBC_ICH12,13,20
CLK48_5158E24
CLK_ICH1418PCLK_FWH31
CPU_SEL24,7
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
3 43Friday, June 20, 2008
Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
3 43Friday, June 20, 2008
Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
3 43Friday, June 20, 2008
Cathedral Peak II SB
CL=20pF0.2pF
PIN NAME DESCRIPTIONByte 5, bit 10 = SRC3 enabled (default)1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pairByte 5, bit 00 = CR#_D controls SRC1 pair (default)1= CR#_D controls SRC4 pair
SRCC3/CR#_D
SRCC11/CR#_G
SRCT11/CR#_H
Byte 6, bit 70 = SRC7# enabled (default)1= CR#_F controls SRC6
Byte 6, bit 60 = SRC7 enabled (default)1= CR#_F controls SRC8
Byte 6, bit 40 = SRC11 enabled (default)1= CR#_H controls SRC10
Byte 6, bit 50 = SRC11# enabled (default)1= CR#_G controls SRC9
SRCC7/CR#_E
SRCT7/CR#_F
SEL1FSB
SEL0FSA
133M100M
166M800M
0 101 X
667M200M
0 1
CPUSEL2FSC
FSB
0 10
101
1066M266M0 0 0
533M
PIN NAME DESCRIPTIONByte 5, bit 70 = PCI0 enabled (default)1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pairByte 5, bit 60 = CR#_A controls SRC0 pair (default),1= CR#_A controls SRC2 pair
Byte 5, bit 50 = PCI1 enabled (default)1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pairByte 5, bit 40 = CR#_B controls SRC1 pair (default)1= CR#_B controls SRC4 pair
PCI1/CR#_B
0 = Overclocking of CPU and SRC Allowed1 = Overclocking of CPU and SRC NOT allowedPCI2/TME
0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96#1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0#PCI4/27M_SEL
ICS9LPRS365BKLFT setting table
0 =SRC8/SRC8#1 = ITP/ITP#PCI_F5/ITP_EN
PCI3
PCI0/CR#_A
Byte 5, bit 30 = SRC3 enabled (default)1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pairByte 5, bit 20 = CR#_C controls SRC0 pair (default),1= CR#_C controls SRC2 pair
SRCT3/CR#_C
CPU
NB
LAN
New Card
SB DMI
MINI1
NB CLK
SB SATA
NB CLKNB CLK
3.3V PCI clock output
(96 MHz)
2nd:71.00875.C03RTM875N-606-LFT QFN 64P
SB
SB
12
EC58SC
D1U
16V2ZY
-2GP
DYEC58S
CD
1U16V
2ZY-2G
P
DY
12
C462SC
D1U
16V2ZY
-2GP
C462SC
D1U
16V2ZY
-2GP
12
C214
SC
D1U
16V2ZY
-2GP
C214
SC
D1U
16V2ZY
-2GP
1 2R158 0R0402-PADR158 0R0402-PAD
12
C195
SC
4D7U
10V5ZY
-3GP
DY
C195
SC
4D7U
10V5ZY
-3GP
DY
1 2R171 0R0402-PADR171 0R0402-PAD
12
C465SC
D1U
16V2ZY
-2GP
C465SC
D1U
16V2ZY
-2GP
12R156 2K2R2J-2-GPR156 2K2R2J-2-GP
1 2R174 0R0402-PADR174 0R0402-PAD
12
C459SC
D1U
16V2ZY
-2GP
C459SC
D1U
16V2ZY
-2GP
12R154 10MR2J-L-GPDYR154 10MR2J-L-GPDY
1 2
C176SC33P50V2JN-3GP
C176SC33P50V2JN-3GP
12
X3X-14D31818M-44GP82.30005.951
X3X-14D31818M-44GP82.30005.951
1 2R184 0R0402-PADR184 0R0402-PAD
1 2R192 0R0402-PADR192 0R0402-PAD
12R153 0R0402-PADR153 0R0402-PAD
TP158TPAD30 TP158TPAD30
1 2R1970R0603-PAD
R1970R0603-PAD
12 3
4RN17
SRN33J-5-GP-U
RN17
SRN33J-5-GP-U
12
C234
SC
D1U
16V2ZY
-2GP
C234
SC
D1U
16V2ZY
-2GP
1 2R194 0R0402-PADR194 0R0402-PAD
1 2R182 0R0402-PADR182 0R0402-PAD
12
C453
SC
D1U
16V2ZY
-2GP
C453
SC
D1U
16V2ZY
-2GP
12
EC57SC5P50V2CN-2GPDY
EC57SC5P50V2CN-2GPDY
1 2R176 0R0402-PADR176 0R0402-PAD
1 2R167 0R0402-PADR167 0R0402-PAD
1 2R160 0R0402-PADR160 0R0402-PAD
12
EC56SC5P50V2CN-2GP
DY
EC56SC5P50V2CN-2GP
DY
12R155 10KR2J-3-GP
DYR155 10KR2J-3-GP
DY
12
C231SC
D1U
16V2ZY
-2GP
DYC231S
CD
1U16V
2ZY-2G
P
DY
1 2R1460R0603-PAD
R1460R0603-PAD
12 3
4RN51
SRN33J-5-GP-URN51
SRN33J-5-GP-U
1 2R166 0R0402-PADR166 0R0402-PAD
12
EC55SC5P50V2CN-2GPDY
EC55SC5P50V2CN-2GPDY
1 2 3 45678
RN59SRN10KJ-6-GPRN59SRN10KJ-6-GP
12
C235SC
4D7U
10V5ZY
-3GP
C235SC
4D7U
10V5ZY
-3GP
12
EC137SC5P50V2CN-2GPDY
EC137SC5P50V2CN-2GPDY
1 2R161 0R0402-PADR161 0R0402-PAD
1 2R168 0R0402-PADR168 0R0402-PAD
12
C246
SC
D1U
16V2ZY
-2GP
DYC246
SC
D1U
16V2ZY
-2GP
DY
12
EC59SC5P50V2CN-2GP
DY
EC59SC5P50V2CN-2GP
DY
12
C183SC
1U16V
3ZY-G
P
C183SC
1U16V
3ZY-G
P
1 2R177 0R0402-PADR177 0R0402-PAD
GN
DR
EF
1
X22X13
VD
DR
EF
4
REF0/FSLC/TEST_SEL5
SDATA6SCLK7
PCI0/CR#_A8
VD
DP
CI
9
PCI1/CR#_B10PCI2/TME11PCI312PCI4/27_SELECT13PCI_F5/ITP_EN14
GN
DP
CI
15V
DD
4816
USB_48MHZ/FSLA17
GN
D48
18
VD
D96
_IO
19
SRCT0/DOTT_96 20SRCC0/DOTC_96 21
GN
D22
VD
DP
LL3
23
27MHZ_NONSS/SRCT1/SE1 2427MHZ_SS/SRCC1/SE2 25
GN
D26
VD
DP
LL3_
IO27
SRCT2/SATAT 28SRCC2/SATAC 29
GN
DS
RC
30
SRCT3/CR#_C 31SRCC3/CR#_D 32
VD
DS
RC
_IO
33
SRCT4 34SRCC4 35
GN
DS
RC
36
SRCT9 37SRCC9 38
SRCC11/CR#_G 39SRCT11/CR#_H 40
SRCT10 41SRCC10 42
VD
DS
RC
_IO
43
CPU_STOP#44PCI_STOP#45
VD
DS
RC
46
SRCC6 47SRCT6 48
GN
DS
RC
49
SRCC7/CR#_E 50SRCT7/CR#_F 51
VD
DS
RC
_IO
52
CPUC2_ITP/SRCC8 53CPUT2_ITP/SRCT8 54
NC#5555
VD
DC
PU
_IO
56
CPUC1_F 57CPUT1_F 58
GN
DC
PU
59
CPUC0 60CPUT0 61V
DD
CP
U62
CK_PWRGD/PD#63
FSLB/TEST_MODE64
GN
D65
U19
ICS9LPRS365BKLFT-GP71.09365.A03
U19
ICS9LPRS365BKLFT-GP71.09365.A03
1 2R180 0R0402-PADR180 0R0402-PAD
1 2
C177SC33P50V2JN-3GP
C177SC33P50V2JN-3GP
1 2R193 0R0402-PADR193 0R0402-PAD
1 2R1570R0603-PAD
R1570R0603-PAD
1 2R150475R2F-L1-GP
DYR150475R2F-L1-GP
DY
12 3
4
RN70SRN33J-5-GP-U
RN70SRN33J-5-GP-U
1 2R195 0R0402-PADR195 0R0402-PAD
12
C190
SC
4D7U
6D3V
3KX
-GP
DYC190
SC
4D7U
6D3V
3KX
-GP
DY
1 2R181 0R0402-PADR181 0R0402-PAD
1 2R173 0R0402-PADR173 0R0402-PAD
12
C184
SC
D1U
16V2ZY
-2GP
DYC184
SC
D1U
16V2ZY
-2GP
DY
12
C198
SC
D1U
16V2ZY
-2GP
C198
SC
D1U
16V2ZY
-2GP
12
C463SC
D1U
16V2ZY
-2GP
DY
C463SC
D1U
16V2ZY
-2GP
DY
1 2R169 0R0402-PADR169 0R0402-PAD
-
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_A#18
H_A#20H_A#21H_A#22
H_A#17
H_A#19
H_A#23H_A#24H_A#25H_A#26H_A#27H_A#28H_A#29H_A#30H_A#31
H_A#3H_A#4H_A#5H_A#6H_A#7H_A#8H_A#9H_A#10H_A#11H_A#12H_A#13H_A#14H_A#15H_A#16
H_REQ#0H_REQ#1H_REQ#2H_REQ#3H_REQ#4
H_A#[35..3]
H_RS#1H_RS#0
H_RS#2
H_IERR#
XDP_BPM#0XDP_BPM#1XDP_BPM#2XDP_BPM#3XDP_BPM#4
XDP_TCKXDP_TDI
XDP_TMSXDP_TRST#
XDP_TDO
XDP_DBRESET#
XDP_BPM#5
H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39
H_D#41H_D#40
H_D#42H_D#43
H_D#[63..0]
H_D#44H_D#45H_D#46H_D#47
H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7H_D#8H_D#9
H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15
H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31
H_D#48H_D#49
H_D#51H_D#50
H_D#52H_D#53H_D#54H_D#55
H_D#57H_D#56
H_D#58H_D#59H_D#60H_D#61
H_D#63H_D#62
COMP0COMP1COMP2COMP3
TEST1
TEST2
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_DINV#[3..0]
RSVD_CPU_12
RSVD_CPU_13RSVD_CPU_14
RSVD_CPU_4
RSVD_CPU_1
RSVD_CPU_8
RSVD_CPU_5RSVD_CPU_6RSVD_CPU_7
RSVD_CPU_2RSVD_CPU_3
RSVD_CPU_10
RSVD_CPU_11
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_DBRESET#
XDP_TCK
H_THERMDC
H_THERMDA
CPU_GTLREF0
RSVD_CPU_9
CPU_PROCHOT#
TEST4
TEST1TEST2
TEST4
H_A#32H_A#33H_A#34H_A#35
XDP_BPM#5
H_CPURST#
XDP_TDO
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
3D3V_S0
1D05V_S0
H_ADS# 6H_BNR# 6
H_DRDY# 6H_DBSY# 6
H_BREQ#0 6
H_HIT# 6H_HITM# 6
H_LOCK# 6
H_DSTBN#2 6H_DSTBP#2 6H_DINV#2 6
H_D#[63..0] 6
H_DSTBN#3 6H_DSTBP#3 6H_DINV#3 6
H_ADSTB#16
H_A#[35..3]6
H_ADSTB#06H_REQ#[4..0]6
H_DSTBN#06H_DSTBP#06H_DINV#06
H_DSTBN#16H_DSTBP#16H_DINV#16
H_BPRI# 6
H_DEFER# 6
H_INIT# 17
H_CPURST# 6,41H_RS#[2..0] 6
H_TRDY# 6
H_THERMDA 21
CLK_CPU_BCLK 3CLK_CPU_BCLK# 3
H_DPRSTP# 7,17,34H_DPSLP# 17H_DPWR# 6H_PWRGD 17,32,41H_CPUSLP# 6
H_FERR#17
H_THERMDC 21
PM_THRMTRIP-A# 7,17,32
H_INTR17H_NMI17H_SMI#17
H_IGNNE#17
H_A20M#17
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
CPU_SEL23,7
CPU_SEL03,7CPU_SEL13,7
H_STPCLK#17
PSI# 34
CPU_PROCHOT#_R 34
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
4 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
4 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
4 43Friday, June 20, 2008Cathedral Peak II SB
H_IERR# with a GND0.1" away
Place testpoint on
Layout Note:Comp0, 2 connect with Zo=27.4 ohm, make
Comp1, 3 connect with Zo=55 ohm, maketrace length shorter than 0.5" .
trace length shorter than 0.5" .
Layout Note:"CPU_GTLREF0"0.5" max length.
( No stub)
should connect toPM_THRMTRIP#
without T-ingICH9 and MCH
All place within 2" to CPU
Net "TEST4" as short as possible,make sure "TEST4" routing isreference to GND and away othernoisy signals
Side BandNon GTL
Follow Demo Circuit
2nd: 62.10053.401
TP93TPAD30 TP93TPAD30
TP44 TPAD30TP44 TPAD30
TP88TPAD30 TP88TPAD30
TP29 TPAD30TP29 TPAD30
TP34 TPAD30TP34 TPAD30
12
C352SC
1KP
50V2K
X-1G
PDY
C352SC
1KP
50V2K
X-1G
PDY
D16#N22D17#K25D18#P26D19#R23D20#L23D21#M24D22#L22D23#M23D24#P25D25#P23D26#P22D27#T24D28#R24D29#L25D30#T25D31#N25
DINV0#H25
DINV1#N24
DSTBN0#J26
DSTBN1#L26
DSTBP0#H26
DSTBP1#M26
D0#E22D1#F24D2#E26D3#G22D4#F23D5#G25D6#E25D7#E23D8#K24D9#G24D10#J24D11#J23D12#H22D13#F26D14#K22D15#H23
D53# AC26
D60# AC22
D63# AC23
GTLREFAD26
TEST2D25
BSEL0B22BSEL1B23BSEL2C21
DINV2# U22
D32# Y22D33# AB24D34# V24D35# V26D36# V23
D38# U25D39# U23D40# Y25D41# W22D42# Y23D43# W24D44# W25D45# AA23D46# AA24D47# AB25
DSTBP2# AA26DSTBN2# Y26
D48# AE24D49# AD24
D52# AB21
D54# AD20D55# AE22D56# AF23D57# AC25D58# AE21D59# AD21
D61# AD23
DINV3# AC20
DSTBN3# AE25
D51# AB22D50# AA21
D62# AF22
COMP0 R26COMP1 U26
DPRSTP# E5DPSLP# B5DPWR# D24
PWRGOOD D6SLP# D7PSI# AE6
TEST1C23
TEST6A26
TEST3C24
TEST5AF1TEST4AF26
D37# T22
DSTBP3# AF24
COMP2 AA1COMP3 Y1
2 OF 4
DATA GRP0
DATA GRP1
DATA GRP2
DATA GRP3
MISC
U33B
BGA479-SKT6-GPU662.10079.001
2 OF 4
DATA GRP0
DATA GRP1
DATA GRP2
DATA GRP3
MISC
U33B
BGA479-SKT6-GPU662.10079.001
1 2R96 54D9R2F-L1-GPR96 54D9R2F-L1-GP
TP90TPAD30 TP90TPAD30
TP39 TPAD30TP39 TPAD30
1 2R121 1KR2J-1-GPDYR121 1KR2J-1-GPDY
1 2R116 51R2F-2-GPDYR116 51R2F-2-GPDY
12
R2631KR2F-3-GP
R2631KR2F-3-GPTP47TPAD30 TP47TPAD30
TP41 TPAD30TP41 TPAD30
TP57 TPAD30TP57 TPAD30
TP86TPAD30 TP86TPAD30
TP48TPAD30 TP48TPAD30
TP52TPAD30 TP52TPAD30
1 2R101 54D9R2F-L1-GPR101 54D9R2F-L1-GP
1 2R105 27D4R2F-L1-GPR105 27D4R2F-L1-GP1 2R104 54D9R2F-L1-GPR104 54D9R2F-L1-GP
A3#J4A4#L5A5#L4A6#K5A7#M3A8#N2A9#J1A10#N3A11#P5A12#P2A13#L2A14#P4A15#P1A16#R1
A20M#A6
ADS# H1
ADSTB0#M1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L1
A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5
A30#U2
A24#R4A25#T5A26#T3
A32#W3
A28#W5A29#Y4
A27#W2
A31#V4
A33#AA4A34#AB2A35#AA3
FERR#A5IGNNE#C4
RSVD#M4M4RSVD#N5N5RSVD#T2T2RSVD#V3V3RSVD#B2B2RSVD#C3C3
BNR# E2BPRI# G5
DEFER# H5
DBSY# E1DRDY# F21
BR0# F1
IERR# D20INIT# B3
LOCK# H4
RS0# F3RS1# F4RS2# G3
TRDY# G2
HIT# G6HITM# E4
BPM0# AD4BPM1# AD3BPM2# AD1BPM3# AC4PRDY# AC2PREQ# AC1
TCK AC5TDI AA6
TDO AB3TMS AB5
TRST# AB6DBR# C20
PROCHOT# D21THRMDA A24
THERMTRIP# C7
BCLK0 A22BCLK1 A21
RSVD#D2D2
RSVD#F6F6RSVD#D3D3RSVD#D22D22
STPCLK#D5LINT0C6LINT1B4SMI#A3
A23#U1
ADSTB1#V1
RESET# C1
KEY_NCB1
THRMDC B25
1 OF 4
RESERVED
HCLK
THERMAL
ADDR GROUP 1
XDP/ITP SIGNALS
CONTROL
ADDR GROUP 0
ICH
U33A
BGA479-SKT6-GPU662.10079.001
1 OF 4
RESERVED
HCLK
THERMAL
ADDR GROUP 1
XDP/ITP SIGNALS
CONTROL
ADDR GROUP 0
ICH
U33A
BGA479-SKT6-GPU662.10079.001
TP72TPAD30 TP72TPAD30
TP30 TPAD30TP30 TPAD30
TP92TPAD30 TP92TPAD30
TP40 TPAD30TP40 TPAD30
TP37 TPAD30TP37 TPAD30
12C351 SCD1U10V2KX-4GP
DYC351 SCD1U10V2KX-4GP
DY
TP150TPAD30 TP150TPAD30
TP49TPAD30 TP49TPAD30
TP28 TPAD30TP28 TPAD30
12
R12368R2-GPR12368R2-GP
1 2R124
0R2J-2-GP
DYR124
0R2J-2-GP
DY
1 2R295 1KR2J-1-GP
DYR295 1KR2J-1-GP
DY
TP27 TPAD30TP27 TPAD30
12
C136SC2200P50V2KX-2GPDYC136SC2200P50V2KX-2GPDY
TP95 TPAD30TP95 TPAD30
1 2R94 54D9R2F-L1-GPR94 54D9R2F-L1-GP
1 2R98 27D4R2F-L1-GPR98 27D4R2F-L1-GP
TP25 TPAD30TP25 TPAD30
TP91 TPAD30TP91 TPAD30
1 2R97 54D9R2F-L1-GPR97 54D9R2F-L1-GP
TP87TPAD30 TP87TPAD30
1 2R99 54D9R2F-L1-GPR99 54D9R2F-L1-GP
12
R12556R2J-4-GPR12556R2J-4-GP
TP89TPAD30 TP89TPAD30
12
R2662KR2F-3-GP
R2662KR2F-3-GP
1 2R118 1KR2J-1-GP
DYR118 1KR2J-1-GP
DY
1 2R102 54D9R2F-L1-GPR102 54D9R2F-L1-GP
1 2R100 54D9R2F-L1-GPDYR100 54D9R2F-L1-GPDY
TP21TPAD30 TP21TPAD30
-
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_VID0H_VID1H_VID2H_VID3H_VID4H_VID5H_VID6
VCCP_1D05
1D5V_S01D5V_VCCA_S0
1D05V_S0
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
1D05V_S0
VCC_COREVCC_CORE
VCC_CORE
VCC_SENSE 34
VSS_SENSE 34
H_VID[6..0] 34
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
5 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
5 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
5 43Friday, June 20, 2008Cathedral Peak II SB
Layout Note:
should be of equal length.VCCSENSE and VSSSENSE lines
Layout Note:Provide a test point (withno stub) to connect a differential probe between VCCSENSE andVSSSENSE at the locationwhere the two 54.9ohmresistors terminate the55 ohm transmission line.
layout note: "1D5V_VCCA_S0"as short as possible
12
C98S
CD
1U10V
2KX
-4GP
C98S
CD
1U10V
2KX
-4GP
TP94TPAD30TP94TPAD30
1 2G5
GAP-CLOSE-PWR-2U
G5
GAP-CLOSE-PWR-2U
12
C130
SC
D1U
10V2K
X-4G
P
DY
C130
SC
D1U
10V2K
X-4G
P
DY
12
C101
SC
D1U
10V2K
X-4G
P
C101
SC
D1U
10V2K
X-4G
P
VCCA7VCCA9
VCCAC10
VCCA10VCCA12VCCA13VCCA15VCCA17VCCA18VCCA20VCCB7VCCB9VCCB10VCCB12VCCB14VCCB15VCCB17VCCB18VCCB20VCCC9VCCC10VCCC12VCCC13VCCC15VCCC17VCCC18VCCD9VCCD10VCCD12VCCD14VCCD15VCCD17VCCD18VCCE7VCCE9VCCE10VCCE12VCCE13VCCE15
VCCAA7VCCAA9VCCAA10VCCAA12VCCAA13VCCAA15VCCAA17VCCAA18VCCAA20VCCAB9
VCCAB12VCCAB14VCCAB15VCCAB17VCCAB18
VCCE17VCCE18VCCE20VCCF7VCCF9VCCF10VCCF12VCCF14VCCF15VCCF17VCCF18VCCF20
VCC AB20VCC AB7VCC AC7VCC AC9VCC AC12VCC AC13VCC AC15VCC AC17VCC AC18VCC AD7VCC AD9VCC AD10VCC AD12VCC AD14VCC AD15VCC AD17VCC AD18VCC AE9VCC AE10VCC AE12VCC AE13VCC AE15VCC AE17VCC AE18VCC AE20VCC AF9VCC AF10VCC AF12VCC AF14VCC AF15VCC AF17VCC AF18VCC AF20
VCCP G21
VCCP J6
VCCP J21
VCCP K6
VCCP K21
VCCP M6
VCCP M21
VCCP N6VCCP N21
VCCP R6VCCP R21
VCCP T6VCCP T21
VCCP V6
VCCP V21VCCP W21
VCCA B26VCCA C26
VID0 AD6
VID6 AE2
VID4 AE3
VID2 AE5
VID5 AF3
VID3 AF4
VID1 AF5
VSSSENSE AE7
VCCSENSE AF7
VCCAB10
3 OF 4U33C
BGA479-SKT6-GPU662.10079.001
3 OF 4U33C
BGA479-SKT6-GPU662.10079.001
12
C381
SC
10U6D
3V5M
X-3G
P
DY
C381
SC
10U6D
3V5M
X-3G
P
DY
12
C120SC
D1U
10V2K
X-4G
P
DY
C120SC
D1U
10V2K
X-4G
P
DY
12
C89
SC
D1U
10V2K
X-4G
P
DY
C89
SC
D1U
10V2K
X-4G
P
DY
12
R77100R2F-L1-GP-UR77100R2F-L1-GP-U
12
C123
SC
10U6D
3V5M
X-3G
P
CAP
C123
SC
10U6D
3V5M
X-3G
P
CAP
12
C99
SC
4D7U
6D3V
3KX
-GP
C99
SC
4D7U
6D3V
3KX
-GP
12
C114SC
D1U
10V2K
X-4G
P
C114SC
D1U
10V2K
X-4G
P
12
C106
SC
10U6D
3V5M
X-3G
P
DY
C106
SC
10U6D
3V5M
X-3G
P
DY
12
R88100R2F-L1-GP-UR88100R2F-L1-GP-U
12
C124
SC
D1U
10V2K
X-4G
P
DY
C124
SC
D1U
10V2K
X-4G
P
DY
12
C100SC
D1U
10V2K
X-4G
P
DY
C100SC
D1U
10V2K
X-4G
P
DY
12
C421SC
D01U
16V2K
X-3G
P
DY
C421SC
D01U
16V2K
X-3G
P
DY
TP23TPAD30TP23TPAD30
12
C71
SC
10U6D
3V5M
X-3G
P
DY
C71
SC
10U6D
3V5M
X-3G
P
DY
VSSAF2
VSSA4VSSA8VSSA11VSSA14VSSA16VSSA19VSSA23
VSSB6VSSB8VSSB11VSSB13VSSB16VSSB19VSSB21VSSB24VSSC5VSSC8VSSC11VSSC14VSSC16VSSC19VSSC2VSSC22VSSC25VSSD1VSSD4VSSD8VSSD11VSSD13VSSD16VSSD19VSSD23VSSD26VSSE3VSSE6VSSE8VSSE11VSSE14VSSE16VSSE19VSSE21VSSE24VSSF5VSSF8VSSF11VSSF13VSSF16VSSF19VSSF2VSSF22VSSF25VSSG4VSSG1VSSG23VSSG26VSSH3VSSH6VSSH21VSSH24VSSJ2VSSJ5VSSJ22VSSJ25VSSK1VSSK4VSSK23VSSK26VSSL3VSSL6VSSL21VSSL24VSSM2VSSM5VSSM22VSSM25VSSN1VSSN4VSSN23VSSN26VSSP3
VSS P6VSS P21VSS P24VSS R2VSS R5VSS R22VSS R25VSS T1VSS T4VSS T23VSS T26VSS U3VSS U6VSS U21VSS U24VSS V2VSS V5VSS V22VSS V25VSS W1VSS W4VSS W23VSS W26VSS Y3VSS Y6VSS Y21VSS Y24VSS AA2VSS AA5VSS AA8VSS AA11VSS AA14VSS AA16VSS AA19VSS AA22VSS AA25VSS AB1VSS AB4VSS AB8VSS AB11VSS AB13VSS AB16VSS AB19VSS AB23VSS AB26VSS AC3VSS AC6VSS AC8VSS AC11VSS AC14VSS AC16VSS AC19VSS AC21VSS AC24VSS AD2VSS AD5VSS AD8VSS AD11VSS AD13VSS AD16VSS AD19VSS AD22VSS AD25VSS AE1VSS AE4VSS AE8VSS AE11VSS AE14VSS AE16VSS AE19VSS AE23VSS AE26VSS A2VSS AF6VSS AF8VSS AF11VSS AF13VSS AF16VSS AF19VSS AF21VSS A25VSS AF25
4 OF 4U33D
BGA479-SKT6-GPU662.10079.001
4 OF 4U33D
BGA479-SKT6-GPU662.10079.001
12
C86SC
D1U
10V2K
X-4G
P
DY
C86SC
D1U
10V2K
X-4G
P
DY
12
C110
SC
D1U
10V2K
X-4G
P
C110
SC
D1U
10V2K
X-4G
P
12
C103
SC
10U6D
3V5M
X-3G
P
DY
C103
SC
10U6D
3V5M
X-3G
P
DY
12
C102
SC
10U6D
3V5M
X-3G
P
CAP
C102
SC
10U6D
3V5M
X-3G
P
CAP
12
C380
SC
10U6D
3V5M
X-3G
P
CAP
C380
SC
10U6D
3V5M
X-3G
P
CAP
12
C433
SC
4D7U
6D3V
3KX
-GP
DY
C433
SC
4D7U
6D3V
3KX
-GP
DY
12
C70
SC
10U6D
3V5M
X-3G
P
DY
C70
SC
10U6D
3V5M
X-3G
P
DY
12
C122SC
D1U
10V2K
X-4G
P
DY
C122SC
D1U
10V2K
X-4G
P
DY
12
C427SC
10U6D
3V5M
X-3G
P
C427SC
10U6D
3V5M
X-3G
P
12
C108
SC
D1U
10V2K
X-4G
P
C108
SC
D1U
10V2K
X-4G
P
TP24TPAD30TP24TPAD30
12
C135
SC
10U6D
3V5M
X-3G
P
CAP
C135
SC
10U6D
3V5M
X-3G
P
CAP
12
C94
SC
10U6D
3V5M
X-3G
P
DY
C94
SC
10U6D
3V5M
X-3G
P
DY
12
C375
SC
10U6D
3V5M
X-3G
P
CAP
C375
SC
10U6D
3V5M
X-3G
P
CAP
12
C95
SC
D1U
10V2K
X-4G
PDY
C95
SC
D1U
10V2K
X-4G
PDY
12
C374
SC
10U6D
3V5M
X-3G
P
DY
C374
SC
10U6D
3V5M
X-3G
P
DY
TP22TPAD30TP22
TPAD30
TP151TPAD30TP151TPAD30
12
C112
SC
D1U
10V2K
X-4G
P
C112
SC
D1U
10V2K
X-4G
P
TP26TPAD30TP26TPAD30
12
C104
SC
D1U
10V2K
X-4G
P
C104
SC
D1U
10V2K
X-4G
P
12
C105
SC
10U6D
3V5M
X-3G
P
DY
C105
SC
10U6D
3V5M
X-3G
P
DY
12
C88SC
D1U
10V2K
X-4G
P
DY
C88SC
D1U
10V2K
X-4G
P
DY
12 3
4
TC9
ST900U2D5VM-1-GP
NEC77.E9071.011
TC9
ST900U2D5VM-1-GP
NEC77.E9071.011
12
C90
SC
D1U
10V2K
X-4G
P
DY
C90
SC
D1U
10V2K
X-4G
P
DY
12
C93
SC
10U6D
3V5M
X-3G
P
CAP
C93
SC
10U6D
3V5M
X-3G
P
CAP
1 2
L11
PBY160808T-121Y-GP68.00206.021
L11
PBY160808T-121Y-GP68.00206.021
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[63..0]H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7H_D#8H_D#9H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39H_D#40H_D#41H_D#42H_D#43H_D#44H_D#45H_D#46H_D#47H_D#48H_D#49H_D#50H_D#51H_D#52H_D#53H_D#54H_D#55H_D#56H_D#57H_D#58H_D#59H_D#60H_D#61H_D#62H_D#63
H_A#35
H_A#29H_A#30H_A#31
H_A#26H_A#27H_A#28
H_A#23H_A#24H_A#25
H_A#20H_A#21H_A#22
H_A#17H_A#18H_A#19
H_A#14H_A#15H_A#16
H_A#11H_A#12H_A#13
H_A#8H_A#9H_A#10
H_A#5H_A#6H_A#7
H_A#3H_A#4
H_A#[35..3]
H_A#33H_A#34
H_A#32
H_RS#1H_RS#2
H_RS#0
H_REQ#1
H_REQ#3H_REQ#2
H_REQ#0
H_REQ#4
H_DSTBN#[3..0]
H_DSTBN#3H_DSTBN#2H_DSTBN#1H_DSTBN#0
H_DSTBP#[3..0]
H_DSTBP#2
H_DSTBP#0
H_DSTBP#3
H_DSTBP#1
H_DINV#0H_DINV#1H_DINV#2H_DINV#3
H_DINV#[3..0]
H_RCOMP
H_SWING
H_AVREF
H_SWINGH_RCOMP
1D05V_S0
1D05V_S0
H_D#[63..0]4
H_CPURST#4,41H_CPUSLP#4
H_A#[35..3] 4
H_BNR# 4
H_BREQ#0 4
H_ADS# 4H_ADSTB#0 4H_ADSTB#1 4
H_DBSY# 4
H_DRDY# 4H_HIT# 4H_HITM# 4
CLK_MCH_BCLK 3CLK_MCH_BCLK# 3
H_LOCK# 4
H_BPRI# 4
H_DEFER# 4
H_DPWR# 4
H_TRDY# 4
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (1 of 6)
6 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (1 of 6)
6 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (1 of 6)
6 43Friday, June 20, 2008Cathedral Peak II SB
Place them near to the chip ( < 0.5")
H_RCOMP routing Trace width andSpacing use 10 / 20 mil
H_SWING routing Trace width andSpacing use 10 / 20 mil
H_SWING Resistors andCapacitors close MCH500 mil ( MAX )
1 2R312 24D9R2F-L-GPR312 24D9R2F-L-GP
12
C450SCD1U10V2KX-4GP
C450SCD1U10V2KX-4GP
12
R316100R2F-L1-GP-UR316100R2F-L1-GP-U
12
R317221R2F-2-GPR317221R2F-2-GP
H_A#_10 P16H_A#_11 R16H_A#_12 N17H_A#_13 M13H_A#_14 E17H_A#_15 P17H_A#_16 F17H_A#_17 G20H_A#_18 B19H_A#_19 J16H_A#_20 E20H_A#_21 H16H_A#_22 J20H_A#_23 L17H_A#_24 A17H_A#_25 B17H_A#_26 L16H_A#_27 C21H_A#_28 J17H_A#_29 H20
H_A#_3 A14
H_A#_30 B18H_A#_31 K17
H_A#_4 C15H_A#_5 F16H_A#_6 H13H_A#_7 C18H_A#_8 M16H_A#_9 J13
H_ADS# H12H_ADSTB#_0 B16H_ADSTB#_1 G17
H_BNR# A9H_BPRI# F11
H_BREQ# G12
HPLL_CLK# AH6
H_CPURST#C12
HPLL_CLK AH7
H_D#_0F2
H_REQ#_2 F13H_REQ#_3 B13
H_D#_1G8
H_D#_10M9
H_D#_20L6
H_D#_30N10
H_D#_40AA8
H_D#_50AA2
H_D#_60AE11
H_D#_8D4H_D#_9H3
H_DBSY# B10
H_D#_11M11H_D#_12J1H_D#_13J2H_D#_14N12H_D#_15J6H_D#_16P2H_D#_17L2H_D#_18R2H_D#_19N9
H_D#_2F8
H_D#_21M5H_D#_22J3H_D#_23N2H_D#_24R1H_D#_25N5H_D#_26N6H_D#_27P13H_D#_28N8H_D#_29L7
H_D#_3E6
H_D#_31M3H_D#_32Y3H_D#_33AD14H_D#_34Y6H_D#_35Y10H_D#_36Y12H_D#_37Y14H_D#_38Y7H_D#_39W2
H_D#_4G2
H_D#_41Y9H_D#_42AA13H_D#_43AA9H_D#_44AA11H_D#_45AD11H_D#_46AD10H_D#_47AD13H_D#_48AE12H_D#_49AE9
H_D#_5H6
H_D#_51AD8H_D#_52AA3H_D#_53AD3H_D#_54AD7H_D#_55AE14H_D#_56AF3H_D#_57AC1H_D#_58AE3H_D#_59AC3
H_D#_6H2
H_D#_61AE8H_D#_62AG2H_D#_63AD6
H_D#_7F6
H_DEFER# E9
H_DINV#_0 J8H_DINV#_1 L3H_DINV#_2 Y13H_DINV#_3 Y1
H_DPWR# J11H_DRDY# F9
H_DSTBN#_0 L10H_DSTBN#_1 M7H_DSTBN#_2 AA5H_DSTBN#_3 AE6
H_DSTBP#_0 L9H_DSTBP#_1 M8H_DSTBP#_2 AA6H_DSTBP#_3 AE5
H_AVREFA11H_DVREFB11
H_TRDY# C9
H_HIT# H9H_HITM# E12H_LOCK# H11
H_REQ#_0 B15H_REQ#_1 K13
H_REQ#_4 B14
H_A#_32 B20H_A#_33 F21H_A#_34 K21H_A#_35 L20
H_SWINGC5
H_CPUSLP#E11
H_RCOMPE3
H_RS#_0 B6H_RS#_1 F12H_RS#_2 C8
HOST
1 OF 10U35A
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
HOST
1 OF 10U35A
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
12
R3182KR2F-3-GPR3182KR2F-3-GP
12
R3221KR2F-3-GPR3221KR2F-3-GP
12
C455SCD1U16V2ZY-2GPC455SCD1U16V2ZY-2GP
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG5CFG6CFG7
CFG9CFG10
CFG12CFG13
CFG16
CFG20CFG19
PM_EXTTS#1PM_EXTTS#0
PM_SYNC#
RSTIN#
PM_DPRSLPVRPM_THRMTRIP-A#
PWROK_GD
H_DPRSTP#
M_RCOMPPM_RCOMPN
SM_RCOMP_VOHSM_RCOMP_VOL
DREFSSCLK#
DREFCLK#DREFSSCLK
DREFCLK
DMI_TXP3
DMI_RXN3
DMI_TXN2DMI_TXN1DMI_TXN0
DMI_TXN3
DMI_RXP3DMI_RXP2DMI_RXP1DMI_RXP0
DMI_TXP2DMI_TXP1DMI_TXP0
DMI_RXN2DMI_RXN1DMI_RXN0
GFXVR_EN
CLPWROK_MCH
MCH_CLVREF
M_RCOMPP
M_RCOMPN
CFG6
CFG5
CFG7
CFG9
CFG10
CFG13
CFG12
CFG16
CFG20
CFG19
CLK_MCH_OE#
GMCH_LCDVDD_ON
CLK_DDC_EDIDLCTLB_DATA
LCTLA_CLK
DAT_DDC_EDID
GMCH_BL_ONL_BKLTCTL
L_LVBGLIBG
GMCH_DDCDATAGMCH_DDCCLK
GMCH_HS
GMCH_VS
CRT_IREF
GMCH_BLUE
GMCH_GREEN
GMCH_RED
PEG_CMP
SM_RCOMP_VOH
SM_RCOMP_VOL
PM_EXTTS#0PM_EXTTS#1
LIBG
SM_REXTTP_SM_DRAMRST#
GFX_VID1GFX_VID2GFX_VID3
GFX_VID0
GFX_VID4
MCH_TSATN#
MCH_TSATN#
GFXVR_EN
TVA_DAC
TVC_DACTVB_DAC
TVC_DACTVB_DACTVA_DAC
LCTLB_DATALCTLA_CLK
GMCH_BL_ONGMCH_LCDVDD_ON
GMCH_RED
GMCH_GREENGMCH_BLUE
1D05V_S0
3D3V_S0
1D05V_S0
1D8V_S3
3D3V_S0
1D8V_S3
DDR_VREF_S3
1D05V_S0
3D3V_S0
CPU_SEL13,4CPU_SEL23,4
CPU_SEL03,4
H_DPRSTP#4,17,34PM_SYNC#18
PLT_RST1#18,25,27,30,31
VGATE_PWRGD18,21,34
PM_THRMTRIP-A#4,17,32
M_CLK_DDR#2 12M_CLK_DDR#3 12
M_CLK_DDR0 13M_CLK_DDR1 13
M_CKE0 13M_CKE1 13M_CKE2 12M_CKE3 12
M_CLK_DDR2 12M_CLK_DDR3 12
M_CS1# 13M_CS2# 12M_CS3# 12
M_CS0# 13
M_CLK_DDR#0 13M_CLK_DDR#1 13
M_ODT0 13M_ODT1 13M_ODT2 12M_ODT3 12
CLK_MCH_3GPLL 3CLK_MCH_3GPLL# 3
DREFCLK# 3DREFCLK 3
DREFSSCLK# 3DREFSSCLK 3
DMI_RXN0 18
DMI_TXN0 18DMI_TXN1 18
DMI_TXP1 18
DMI_TXN2 18DMI_TXN3 18
DMI_TXP0 18
DMI_TXP2 18DMI_TXP3 18
DMI_RXN1 18DMI_RXN2 18DMI_RXN3 18
DMI_RXP0 18
DMI_RXP2 18DMI_RXP3 18
DMI_RXP1 18
CL_RST#0 18
CL_CLK0 18CL_DATA0 18
PWROK 18,32
MCH_ICH_SYNC# 18
L_BKLTCTL14
GMCH_LCDVDD_ON14
CLK_DDC_EDID14DAT_DDC_EDID14
GMCH_BL_ON30
GMCH_TXAOUT0+14GMCH_TXAOUT1+14GMCH_TXAOUT2+14
GMCH_TXAOUT0-14GMCH_TXAOUT1-14GMCH_TXAOUT2-14
GMCH_TXACLK-14GMCH_TXACLK+14
GMCH_DDCCLK15GMCH_DDCDATA15
GMCH_GREEN15
GMCH_BLUE15
GMCH_RED15
GFX_VID[4..0] 38
GMCH_TXBCLK-14GMCH_TXBCLK+14
GMCH_TXBOUT0+14GMCH_TXBOUT1+14GMCH_TXBOUT2+14
GMCH_TXBOUT0-14GMCH_TXBOUT1-14GMCH_TXBOUT2-14
CLK_MCH_OE# 3
PM_DPRSLPVR18,34
PWROK18,32GFXVR_EN 38
GMCH_HSYNC15GMCH_VSYNC15
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)
7 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)
7 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)
7 43Friday, June 20, 2008Cathedral Peak II SB
FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm
CRT_IREF routing Tracewidth use 20 mil
FOR Cantiga:500 ohm Teenah: 392 ohm
Close to GMCH as 500 mils.
layout take note
Pin Name Strap Description Configuration
CFG20 Digital DisplayPort(SDVO/DP/HDMI)Concurrent withPCIE
Low = Only digital DisplayPort(SDVO/DP/HDMI) or PCIE is operational (default)
High = Digital DisplayPort(SDVO/DP/HDMI) and PCIE are operating simultaneously via the PEG port
12R353 0R0402-PADR353 0R0402-PAD
1 2R185 2K21R2F-GPDYR185 2K21R2F-GPDY 12
R356511R2F-2-GPR356511R2F-2-GP
12
R3391KR2F-3-GPR3391KR2F-3-GP
1 2R140 300R2F-GPR140 300R2F-GP
12
C475SCD01U16V2KX-3GPC475SCD01U16V2KX-3GP
12
R3341KR2F-3-GPR3341KR2F-3-GP
TP120TPAD30TP120TPAD30
1234 5
678
RN63
SRN100KJ-8-GP-U
RN63
SRN100KJ-8-GP-U
1 2R354 0R2J-2-GP
DYR354 0R2J-2-GP
DY
1 2R208 4K02R2F-GPDYR208 4K02R2F-GPDY
12
R32456R2J-4-GPR32456R2J-4-GP
PEG_COMPI T37PEG_COMPO T36
PEG_RX#_0 H44PEG_RX#_1 J46PEG_RX#_2 L44PEG_RX#_3 L40PEG_RX#_4 N41PEG_RX#_5 P48PEG_RX#_6 N44PEG_RX#_7 T43PEG_RX#_8 U43PEG_RX#_9 Y43
PEG_RX#_10 Y48PEG_RX#_11 Y36PEG_RX#_12 AA43PEG_RX#_13 AD37PEG_RX#_14 AC47PEG_RX#_15 AD39
PEG_RX_0 H43PEG_RX_1 J44PEG_RX_2 L43PEG_RX_3 L41PEG_RX_4 N40PEG_RX_5 P47PEG_RX_6 N43PEG_RX_7 T42PEG_RX_8 U42PEG_RX_9 Y42
PEG_RX_10 W47PEG_RX_11 Y37PEG_RX_12 AA42PEG_RX_13 AD36PEG_RX_14 AC48PEG_RX_15 AD40
PEG_TX#_0 J41
PEG_TX#_10 Y40
PEG_TX#_3 M40PEG_TX#_4 M42PEG_TX#_5 R48PEG_TX#_6 N38PEG_TX#_7 T40PEG_TX#_8 U37PEG_TX#_9 U40
PEG_TX#_1 M46
PEG_TX#_11 AA46PEG_TX#_12 AA37PEG_TX#_13 AA40PEG_TX#_14 AD43PEG_TX#_15 AC46
PEG_TX#_2 M47
PEG_TX_0 J42PEG_TX_1 L46PEG_TX_2 M48PEG_TX_3 M39PEG_TX_4 M43PEG_TX_5 R47PEG_TX_6 N37PEG_TX_7 T39PEG_TX_8 U36PEG_TX_9 U39
PEG_TX_10 Y39PEG_TX_11 Y46PEG_TX_12 AA36PEG_TX_13 AA39PEG_TX_14 AD42PEG_TX_15 AD46
L_CTRL_CLKM32
L_CTRL_DATAM33L_DDC_CLKK33L_DDC_DATAJ33
L_VDD_ENM29LVDS_IBGC44LVDS_VBGB43LVDS_VREFHE37LVDS_VREFLE38LVDSA_CLK#C41LVDSA_CLKC40
LVDSA_DATA#_0H47LVDSA_DATA#_1E46LVDSA_DATA#_2G40
LVDSA_DATA_1D45LVDSA_DATA_2F40
LVDSB_CLK#B37LVDSB_CLKA37
LVDSB_DATA#_0A41LVDSB_DATA#_1H38LVDSB_DATA#_2G37
LVDSB_DATA_1G38LVDSB_DATA_2F37
L_BKLT_ENG32
TVA_DACF25TVB_DACH25TVC_DACK25
TV_RTNH24
CRT_BLUEE28
CRT_DDC_CLKH32CRT_DDC_DATAJ32
CRT_GREENG28
CRT_HSYNCJ29CRT_TVO_IREFE29
CRT_REDJ28
CRT_IRTNG29
CRT_VSYNCL29
LVDSA_DATA_0H48
LVDSB_DATA_0B42
L_BKLT_CTRLL32
TV_DCONSEL_0C31TV_DCONSEL_1E32
LVDSA_DATA#_3A40
LVDSA_DATA_3B40
LVDSB_DATA#_3J37
LVDSB_DATA_3K37
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
3 OF 10U35C
CANTIGA-GM-GP-U-NF71.CNTIG.00U
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
3 OF 10U35C
CANTIGA-GM-GP-U-NF71.CNTIG.00U
12 3
4
RN71SRN33J-5-GP-U
RN71SRN33J-5-GP-U
TP115TPAD30TP115TPAD30
1 2R332 2K21R2F-GPDYR332 2K21R2F-GPDY
1 2R189 2K21R2F-GPDYR189 2K21R2F-GPDY
1 2R336 2K21R2F-GPDYR336 2K21R2F-GPDY
TP110TPAD30TP110TPAD30
12
C472SCD01U16V2KX-3GPC472SCD01U16V2KX-3GP
12
C165SC100P50V2JN-3GP
DYC165SC100P50V2JN-3GP
DY
12
C477
SC2D2U6D3V3MX-1-GP
C477
SC2D2U6D3V3MX-1-GP
1234 5
678
RN62
SRN75J-1-GP
RN62
SRN75J-1-GP
1 2R190 2K21R2F-GPDYR190 2K21R2F-GPDY
12345
678
RN33
SRN10KJ-6-GP
RN33
SRN10KJ-6-GP
12
R3551KR2F-3-GPR3551KR2F-3-GP
12
R33080D6R2F-L-GPR33080D6R2F-L-GP
TP121TPAD30 TP121TPAD30
12
R3383K01R2F-3-GPR3383K01R2F-3-GP
SA_CK_0 AP24SA_CK_1 AT21SB_CK_0 AV24
SA_CK#_0 AR24SA_CK#_1 AR21SB_CK#_0 AU24
SA_CKE_0 BC28SA_CKE_1 AY28SB_CKE_0 AY36SB_CKE_1 BB36
SA_CS#_0 BA17SA_CS#_1 AY16SB_CS#_0 AV16SB_CS#_1 AR13
SM_DRAMRST# BC36
SA_ODT_0 BD17SA_ODT_1 AY17SB_ODT_0 BF15SB_ODT_1 AY13
SM_RCOMP BG22SM_RCOMP# BH21
CFG_18P29CFG_19R28
CFG_2P25
CFG_0T25CFG_1R25
CFG_20T28
CFG_3P20CFG_4P24CFG_5C25CFG_6N24CFG_7M24CFG_8E21CFG_9C23CFG_10C24CFG_11N21CFG_12P21CFG_13T21CFG_14R20CFG_15M20CFG_16L21CFG_17H21
PM_SYNC#R29
PM_EXT_TS#_0N33PM_EXT_TS#_1P32PWROKAT40RSTIN#AT11
DPLL_REF_CLK B38DPLL_REF_CLK# A38
DPLL_REF_SSCLK E41DPLL_REF_SSCLK# F41
DMI_RXN_0 AE41DMI_RXN_1 AE37DMI_RXN_2 AE47DMI_RXN_3 AH39
DMI_RXP_0 AE40DMI_RXP_1 AE38DMI_RXP_2 AE48DMI_RXP_3 AH40
DMI_TXN_0 AE35DMI_TXN_1 AE43DMI_TXN_2 AE46DMI_TXN_3 AH42
DMI_TXP_0 AD35DMI_TXP_1 AE44DMI_TXP_2 AF46DMI_TXP_3 AH43
RESERVED#AL34AL34
RESERVED#AN35AN35RESERVED#AK34AK34
RESERVED#AM35AM35
RESERVED#BG23BG23RESERVED#BF23BF23RESERVED#BH18BH18RESERVED#BF18BF18
PM_DPRSTP#B7
SB_CK_1 AU20
SB_CK#_1 AV20
RESERVED#AY21AY21
RESERVED#AH9AH9RESERVED#AH10AH10RESERVED#AH12AH12RESERVED#AH13AH13
RESERVED#M36M36RESERVED#N36N36RESERVED#R33R33RESERVED#T33T33
GFX_VID_0 B33GFX_VID_1 B32GFX_VID_2 G33GFX_VID_3 F33
GFX_VR_EN C34
SM_RCOMP_VOH BF28SM_RCOMP_VOL BH28
THERMTRIP#T20DPRSLPVRR32
RESERVED#K12K12
CL_CLK AH37CL_DATA AH36
CL_PWROK AN36CL_RST# AJ35CL_VREF AH34
NC#A47A47
NC#BG48BG48NC#BF48BF48NC#BD48BD48NC#BC48BC48NC#BH47BH47NC#BG47BG47NC#BE47BE47NC#BH46BH46NC#BF46BF46NC#BG45BG45NC#BH44BH44NC#BH43BH43NC#BH6BH6NC#BH5BH5NC#BG4BG4
SDVO_CTRLCLK G36SDVO_CTRLDATA E36
CLKREQ# K36
RESERVED#T24T24
ICH_SYNC# H36
TSATN# B12
PEG_CLK# E43PEG_CLK F43
NC#BH3BH3
GFX_VID_4 E33
RESERVED#B31B31
DDPC_CTRLCLK N28
NC#BF3BF3NC#BH2BH2NC#BG2BG2NC#BE2BE2NC#BG1BG1NC#BF1BF1NC#BD1BD1NC#BC1BC1NC#F1F1
SM_VREF AV42SM_PWROK AR36
SM_REXT BF17
RESERVED#M1M1
HDA_BCLK B28HDA_RST# B30
HDA_SDI B29HDA_SDO C29
HDA_SYNC A28
DDPC_CTRLDATA M28
RESERVED#B2B2
PM
MISC
NC
DDR CLK/ CONTROL/COMPENSATION
CLK
DMI
CFG
RSVD
GRAPHICS VID
ME
HDA
2 OF 10U35B
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
PM
MISC
NC
DDR CLK/ CONTROL/COMPENSATION
CLK
DMI
CFG
RSVD
GRAPHICS VID
ME
HDA
2 OF 10U35B
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
1 2R207 4K02R2F-GPDYR207 4K02R2F-GPDY
123
4RN32
SRN10KJ-5-GP
RN32
SRN10KJ-5-GP
1 2R345 2K21R2F-GPDYR345 2K21R2F-GPDY
12
C470
SC2D2U6D3V3MX-1-GP
C470
SC2D2U6D3V3MX-1-GP
12
R33180D6R2F-L-GPR33180D6R2F-L-GP
12R214
49D9R2F-GP
R214
49D9R2F-GP
1 2R186 2K21R2F-GPDYR186 2K21R2F-GPDY
1 2R188 2K21R2F-GPDYR188 2K21R2F-GPDY
1 2R347 1K02R2F-1-GPR347 1K02R2F-1-GP
1 2R328499R2F-2-GP
R328499R2F-2-GP
12
C270SC
D1U
10V2K
X-4G
P
C270SC
D1U
10V2K
X-4G
P
1234 5
678
RN72
SRN150F-1-GP
RN72
SRN150F-1-GP
TP118TPAD30 TP118TPAD30TP119TPAD30 TP119TPAD30
12 R3520R0402-PADR3520R0402-PAD
12
C487SC
D1U
10V2K
X-4G
P
C487SC
D1U
10V2K
X-4G
P
1 2R216
2K37R2F-GP
R216
2K37R2F-GP
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40M_A_DQ39
M_A_DQ37
M_A_DQ35M_A_DQ34
M_A_DQ59
M_A_DQ54M_A_DQ53
M_A_DQ63
M_A_DQ60M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63..0]M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3
M_A_DQ7
M_A_DQ5M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9M_A_DQ8
M_A_DQ11
M_A_DQ15M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22M_A_DQ23M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DQS#3
M_A_DQS#0
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_A0
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1M_A_A2
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_DM[7..0]M_A_DM0M_A_DM1M_A_DM2M_A_DM3M_A_DM4M_A_DM5M_A_DM6M_A_DM7
M_A_DQS[7..0]
M_A_DQS5
M_A_DQS7
M_A_DQS2M_A_DQS3M_A_DQS4
M_A_DQS0M_A_DQS1
M_A_DQS6
M_A_A14
M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11
M_B_DQ15
M_B_DQ13M_B_DQ12
M_B_DQ14
M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19
M_B_DQ23
M_B_DQ21M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32M_B_DQ33M_B_DQ34M_B_DQ35
M_B_DQ39
M_B_DQ37M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48M_B_DQ49M_B_DQ50M_B_DQ51
M_B_DQ55
M_B_DQ53M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63..0]
M_B_DQS#[7..0]M_B_DQS#0M_B_DQS#1M_B_DQS#2M_B_DQS#3M_B_DQS#4M_B_DQS#5M_B_DQS#6M_B_DQS#7
M_B_DQS[7..0]M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_A[14..0]M_B_A0M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5M_B_A6M_B_A7
M_B_DM[7..0]M_B_DM0M_B_DM1M_B_DM2M_B_DM3M_B_DM4M_B_DM5M_B_DM6M_B_DM7
M_B_A14
M_A_DQ[63..0]13M_A_BS#0 13M_A_BS#1 13M_A_BS#2 13
M_A_CAS# 13
M_A_DQS#[7..0] 13
M_A_DQS[7..0] 13
M_A_A[14..0] 13
M_A_DM[7..0] 13
M_A_RAS# 13
M_A_WE# 13
M_B_DQ[63..0]12M_B_BS#0 12M_B_BS#1 12M_B_BS#2 12
M_B_CAS# 12M_B_RAS# 12
M_B_WE# 12
M_B_DQS#[7..0] 12
M_B_DQS[7..0] 12
M_B_A[14..0] 12
M_B_DM[7..0] 12
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (3 of 6)
8 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (3 of 6)
8 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (3 of 6)
8 43Friday, June 20, 2008Cathedral Peak II SB
SB_DQ_0AK47SB_DQ_1AH46
SB_DQ_10BA48SB_DQ_11AY48SB_DQ_12AT47SB_DQ_13AR47SB_DQ_14BA47SB_DQ_15BC47SB_DQ_16BC46SB_DQ_17BC44SB_DQ_18BG43SB_DQ_19BF43
SB_DQ_2AP47
SB_DQ_20BE45SB_DQ_21BC41SB_DQ_22BF40SB_DQ_23BF41SB_DQ_24BG38SB_DQ_25BF38SB_DQ_26BH35SB_DQ_27BG35SB_DQ_28BH40SB_DQ_29BG39
SB_DQ_3AP46
SB_DQ_30BG34SB_DQ_31BH34SB_DQ_32BH14SB_DQ_33BG12SB_DQ_34BH11SB_DQ_35BG8SB_DQ_36BH12SB_DQ_37BF11SB_DQ_38BF8SB_DQ_39BG7
SB_DQ_4AJ46
SB_DQ_40BC5SB_DQ_41BC6SB_DQ_42AY3SB_DQ_43AY1SB_DQ_44BF6SB_DQ_45BF5SB_DQ_46BA1SB_DQ_47BD3SB_DQ_48AV2SB_DQ_49AU3
SB_DQ_5AJ48
SB_DQ_50AR3SB_DQ_51AN2SB_DQ_52AY2SB_DQ_53AV1SB_DQ_54AP3SB_DQ_55AR1SB_DQ_56AL1SB_DQ_57AL2SB_DQ_58AJ1SB_DQ_59AH1
SB_DQ_6AM48
SB_DQ_60AM2SB_DQ_61AM3SB_DQ_62AH3SB_DQ_63AJ3
SB_DQ_7AP48SB_DQ_8AU47SB_DQ_9AU46
SB_BS_0 BC16SB_BS_1 BB17SB_BS_2 BB33
SB_CAS# BG16
SB_DM_0 AM47SB_DM_1 AY47SB_DM_2 BD40SB_DM_3 BF35SB_DM_4 BG11SB_DM_5 BA3SB_DM_6 AP1SB_DM_7 AK2
SB_DQS_0 AL47SB_DQS_1 AV48SB_DQS_2 BG41SB_DQS_3 BG37SB_DQS_4 BH9SB_DQS_5 BB2SB_DQS_6 AU1SB_DQS_7 AN6
SB_DQS#_0 AL46SB_DQS#_1 AV47SB_DQS#_2 BH41SB_DQS#_3 BH37SB_DQS#_4 BG9SB_DQS#_5 BC2SB_DQS#_6 AT2SB_DQS#_7 AN5
SB_MA_0 AV17SB_MA_1 BA25
SB_MA_10 BB16SB_MA_11 AW33SB_MA_12 AY33SB_MA_13 BH15
SB_MA_2 BC25SB_MA_3 AU25SB_MA_4 AW25SB_MA_5 BB28SB_MA_6 AU28SB_MA_7 AW28SB_MA_8 AT33SB_MA_9 BD33
SB_MA_14 AU33
SB_RAS# AU17
SB_WE# BF14
DDR SYSTEM MEMORY B
5 OF 10U35E
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
DDR SYSTEM MEMORY B
5 OF 10U35E
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
SA_DQ_0AJ38SA_DQ_1AJ41
SA_DQ_10AU40SA_DQ_11AT38SA_DQ_12AN41SA_DQ_13AN39SA_DQ_14AU44SA_DQ_15AU42SA_DQ_16AV39SA_DQ_17AY44SA_DQ_18BA40SA_DQ_19BD43
SA_DQ_2AN38
SA_DQ_20AV41SA_DQ_21AY43SA_DQ_22BB41SA_DQ_23BC40SA_DQ_24AY37SA_DQ_25BD38SA_DQ_26AV37SA_DQ_27AT36SA_DQ_28AY38SA_DQ_29BB38
SA_DQ_3AM38
SA_DQ_30AV36SA_DQ_31AW36SA_DQ_32BD13SA_DQ_33AU11SA_DQ_34BC11SA_DQ_35BA12SA_DQ_36AU13SA_DQ_37AV13SA_DQ_38BD12SA_DQ_39BC12
SA_DQ_4AJ36
SA_DQ_40BB9SA_DQ_41BA9SA_DQ_42AU10SA_DQ_43AV9SA_DQ_44BA11SA_DQ_45BD9SA_DQ_46AY8SA_DQ_47BA6SA_DQ_48AV5SA_DQ_49AV7
SA_DQ_5AJ40
SA_DQ_50AT9SA_DQ_51AN8SA_DQ_52AU5SA_DQ_53AU6SA_DQ_54AT5SA_DQ_55AN10SA_DQ_56AM11SA_DQ_57AM5SA_DQ_58AJ9SA_DQ_59AJ8
SA_DQ_6AM44
SA_DQ_60AN12SA_DQ_61AM13SA_DQ_62AJ11SA_DQ_63AJ12
SA_DQ_7AM42SA_DQ_8AN43SA_DQ_9AN44
SA_BS_0 BD21SA_BS_1 BG18SA_BS_2 AT25
SA_CAS# BD20
SA_DM_0 AM37SA_DM_1 AT41SA_DM_2 AY41SA_DM_3 AU39SA_DM_4 BB12SA_DM_5 AY6SA_DM_6 AT7
SA_DQS_0 AJ44SA_DQS_1 AT44SA_DQS_2 BA43SA_DQS_3 BC37SA_DQS_4 AW12SA_DQS_5 BC8SA_DQS_6 AU8SA_DQS_7 AM7
SA_DM_7 AJ5
SA_DQS#_0 AJ43SA_DQS#_1 AT43SA_DQS#_2 BA44SA_DQS#_3 BD37SA_DQS#_4 AY12SA_DQS#_5 BD8SA_DQS#_6 AU9SA_DQS#_7 AM8
SA_MA_0 BA21SA_MA_1 BC24
SA_MA_10 BC21SA_MA_11 BG26SA_MA_12 BH26SA_MA_13 BH17
SA_MA_2 BG24SA_MA_3 BH24SA_MA_4 BG25SA_MA_5 BA24SA_MA_6 BD24SA_MA_7 BG27SA_MA_8 BF25SA_MA_9 AW24
SA_RAS# BB20
SA_WE# AY20
SA_MA_14 AY25DDR
SYS
TEM
MEM
ORY
A
4 OF 10U35D
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
DDR
SYS
TEM
MEM
ORY
A
4 OF 10U35D
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM_LF6_GMCHSM_LF7_GMCH
SM_LF1_GMCHSM_LF2_GMCHSM_LF3_GMCHSM_LF4_GMCHSM_LF5_GMCH
VCC_GMCH_35
1D8V_S3
1D05V_S0
1D05V_S0
1D8V_S3
VCC_GFXCORE
VCC_GFXCORE
VCC_GFXCORE
VCC_AXG_SENSE38VSS_AXG_SENSE38
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
9 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
9 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
9 43Friday, June 20, 2008Cathedral Peak II SB
FOR VCC SM
Place on the Edge
Place CAP whereLVDS and DDR2 taps
Coupling CAP 370 mils from the Edge
Coupling CAP
Place on the Edge Coupling CAP
place near Cantiga
667MTS 2400mA800MTS 3000mA
12
TC18SE220U2D5VDM-3GP DY
TC18SE220U2D5VDM-3GP DY
12
C178
SC
D22
U10
V2K
X-1
GP
C178
SC
D22
U10
V2K
X-1
GP
12
C488 SC
D47U
16V3ZY
-3GP
C488 SC
D47U
16V3ZY
-3GP
12
C142SC
10U6D
3V5M
X-3G
P
DY
C142SC
10U6D
3V5M
X-3G
P
DY
12
C233SC
1U10V
3ZY-6G
P
C233SC
1U10V
3ZY-6G
P
12
C141SC
10U6D
3V5M
X-3G
P
DY
C141SC
10U6D
3V5M
X-3G
P
DY
1 2G11
GAP-CLOSE-PWR
G11
GAP-CLOSE-PWR
12
C255SC
10U6D
3V5M
X-3G
P
C255SC
10U6D
3V5M
X-3G
P
12
C157SC
10U6D
3V5M
X-3G
P
DY
C157SC
10U6D
3V5M
X-3G
P
DY
12
C438SC
10U6D
3V5M
X-3G
P
DY
C438SC
10U6D
3V5M
X-3G
P
DY
12
C491 SC
1U10V
3KX
-3GP
C491 SC
1U10V
3KX
-3GP
12
C437SC
10U6D
3V5M
X-3G
P
DY
C437SC
10U6D
3V5M
X-3G
P
DY
12
C249SC
D1U
10V2K
X-4G
P
C249SC
D1U
10V2K
X-4G
P
12
TC19
SE
330U2D
5VD
M-LG
P
DYTC19
SE
330U2D
5VD
M-LG
P
DY
12
C434SC
D1U
10V2K
X-4G
P
DY
C434SC
D1U
10V2K
X-4G
P
DY
VCC_NCTF AM32
VCC_NCTF AC30
VCC_NCTF AJ29
VCC_NCTF AK25
VCC_NCTF AA32VCC_NCTF Y32VCC_NCTF W32VCC_NCTF U32VCC_NCTF AM30VCC_NCTF AL30VCC_NCTF AK30
VCC_NCTF AG30VCC_NCTF AF30VCC_NCTF AE30
VCC_NCTF AL32
VCC_NCTF W30VCC_NCTF V30
VCC_NCTF AK32
VCC_NCTF AH29VCC_NCTF AG29VCC_NCTF AE29
VCC_NCTF AL28VCC_NCTF AK28VCC_NCTF AL26VCC_NCTF AK26
VCC_NCTF AJ32
VCC_NCTF AK24
VCC_NCTF AH32VCC_NCTF AG32VCC_NCTF AE32VCC_NCTF AC32
VCC_NCTF AC29VCC_NCTF AA29VCC_NCTF Y29VCC_NCTF W29VCC_NCTF V29
VCC_NCTF U30VCC_NCTF AL29VCC_NCTF AK29
VCC_NCTF AH30
VCC_NCTF AB30VCC_NCTF AA30VCC_NCTF Y30
VCCAG34VCCAC34VCCAB34VCCAA34VCCY34VCCV34VCCU34VCCAM33VCCAK33VCCAJ33VCCAG33VCCAF33
VCCAE33VCCAC33VCCAA33VCCY33VCCW33VCCV33VCCU33VCCAH28VCCAF28VCCAC28VCCAA28VCCAJ26VCCAG26VCCAE26VCCAC26VCCAH25VCCAG25VCCAF25VCCAG24VCCAJ23VCCAH23VCCAF23
VCCT32
VCC_NCTF AK23
POWER
VCC NCTF
VCC CORE
6 OF 10U35F
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
POWER
VCC NCTF
VCC CORE
6 OF 10U35F
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
12
C492 SC
1U10V
3KX
-3GP
C492 SC
1U10V
3KX
-3GP
12
C258SC
10U6D
3V5M
X-3G
P
DY
C258SC
10U6D
3V5M
X-3G
P
DY
12
C164 SC
D1U
10V2K
X-4G
P
C164 SC
D1U
10V2K
X-4G
P
12
C248SC
D1U
10V2K
X-4G
P
C248SC
D1U
10V2K
X-4G
P
12
C464 SC
D1U
10V2K
X-4G
P
C464 SC
D1U
10V2K
X-4G
P
12
C254SC
10U6D
3V5M
X-3G
P
DY
C254SC
10U6D
3V5M
X-3G
P
DY
12
C236SC
D1U
10V2K
X-4G
P
C236SC
D1U
10V2K
X-4G
P
12
C252SC
D1U
10V2K
X-4G
P
DYC252S
CD
1U10V
2KX
-4GP
DY
12
C436SC
D1U
10V2K
X-4G
P
C436SC
D1U
10V2K
X-4G
P
VCC_SMAY32
VCC_SMBF31
VCC_SMAW29
VCC_SMBD32VCC_SMBC32VCC_SMBB32VCC_SMBA32
VCC_SMAW32VCC_SMAV32VCC_SMAU32VCC_SMAT32VCC_SMAR32VCC_SMAP32VCC_SMAN32VCC_SMBH31VCC_SMBG31
VCC_SMAN33
VCC_SMBG30VCC_SMBH29VCC_SMBG29VCC_SMBF29VCC_SMBD29VCC_SMBC29VCC_SMBB29VCC_SMBA29VCC_SMAY29
VCC_SMBH32
VCC_SMAV29VCC_SMAU29VCC_SMAT29VCC_SMAR29
VCC_AXG_NCTF V23VCC_AXG_NCTF AM21VCC_AXG_NCTF AL21VCC_AXG_NCTF AK21VCC_AXG_NCTF W21VCC_AXG_NCTF V21VCC_AXG_NCTF U21VCC_AXG_NCTF AM20VCC_AXG_NCTF AK20VCC_AXG_NCTF W20
VCC_AXG_NCTF V28
VCC_AXG_NCTF U20VCC_AXG_NCTF AM19VCC_AXG_NCTF AL19VCC_AXG_NCTF AK19VCC_AXG_NCTF AJ19VCC_AXG_NCTF AH19VCC_AXG_NCTF AG19VCC_AXG_NCTF AF19VCC_AXG_NCTF AE19VCC_AXG_NCTF AB19
VCC_AXG_NCTF W26
VCC_AXG_NCTF AA19VCC_AXG_NCTF Y19VCC_AXG_NCTF W19VCC_AXG_NCTF V19VCC_AXG_NCTF U19VCC_AXG_NCTF AM17VCC_AXG_NCTF AK17VCC_AXG_NCTF AH17VCC_AXG_NCTF AG17VCC_AXG_NCTF AF17
VCC_AXG_NCTF V26
VCC_AXG_NCTF AE17VCC_AXG_NCTF AC17VCC_AXG_NCTF AB17VCC_AXG_NCTF Y17VCC_AXG_NCTF W17VCC_AXG_NCTF V17VCC_AXG_NCTF AM16VCC_AXG_NCTF AL16VCC_AXG_NCTF AK16VCC_AXG_NCTF AJ16
VCC_AXG_NCTF W25
VCC_AXG_NCTF AH16VCC_AXG_NCTF AG16VCC_AXG_NCTF AF16VCC_AXG_NCTF AE16VCC_AXG_NCTF AC16VCC_AXG_NCTF AB16VCC_AXG_NCTF AA16
VCC_AXG_NCTF V25VCC_AXG_NCTF W24VCC_AXG_NCTF V24VCC_AXG_NCTF W23
VCC_SMAP29
VCC_SMBG32VCC_SMBF32
VCC_AXG_NCTF W28VCC_SMAP33
VCC_AXGY26VCC_AXGAE25VCC_AXGAB25VCC_AXGAA25VCC_AXGAE24VCC_AXGAC24VCC_AXGAA24VCC_AXGY24VCC_AXGAE23VCC_AXGAC23VCC_AXGAB23VCC_AXGAA23VCC_AXGAJ21VCC_AXGAG21VCC_AXGAE21VCC_AXGAC21VCC_AXGAA21VCC_AXGY21VCC_AXGAH20VCC_AXGAF20VCC_AXGAE20VCC_AXGAC20VCC_AXGAB20VCC_AXGAA20VCC_AXGT17
VCC_AXGAM15VCC_AXGAL15
VCC_AXGAJ15VCC_AXGAH15
VCC_AXGAF15VCC_AXGAB15
VCC_SM_LF AV44VCC_SM_LF BA37VCC_SM_LF AM40VCC_SM_LF AV21VCC_SM_LF AY5VCC_SM_LF AM10VCC_SM_LF BB13
VCC_AXGT16
VCC_AXGAG15
VCC_AXGAA15VCC_AXGY15VCC_AXGV15VCC_AXGU15VCC_AXGAN14VCC_AXGAM14VCC_AXGU14VCC_AXGT14
VCC_AXG_SENSEAJ14VSS_AXG_SENSEAH14
VCC_AXG_NCTF Y16VCC_AXG_NCTF W16VCC_AXG_NCTF V16VCC_AXG_NCTF U16
VCC_SM/NCBA36VCC_SM/NCBB24VCC_SM/NCBD16VCC_SM/NCBB21VCC_SM/NCAW16VCC_SM/NCAW13VCC_SM/NCAT13
VCC_AXGAE15
POWER
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
7 OF 10U35G
CANTIGA-GM-GP-U-NF71.CNTIG.00U
POWER
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
7 OF 10U35G
CANTIGA-GM-GP-U-NF71.CNTIG.00U
12
C468 SC
D22U
10V2K
X-1G
P
C468 SC
D22U
10V2K
X-1G
P
12
C259SC
10U6D
3V5M
X-3G
P
C259SC
10U6D
3V5M
X-3G
P
12
C435SC
D1U
10V2K
X-4G
P
DY
C435SC
D1U
10V2K
X-4G
P
DY
12
C266SC
D1U
10V2K
X-4G
P
C266SC
D1U
10V2K
X-4G
P
12
C225
SC
10U6D
3V5M
X-3G
P
C225
SC
10U6D
3V5M
X-3G
P
12
C244
SC
10U6D
3V5M
X-3G
P
C244
SC
10U6D
3V5M
X-3G
P
12
C167
SC
10U6D
3V5M
X-3G
P
DY
C167
SC
10U6D
3V5M
X-3G
P
DY
12
C253SC
D1U
10V2K
X-4G
P
C253SC
D1U
10V2K
X-4G
P
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_VCCA_HPLL
M_VCCA_MPLL
M_VCCA_DPLLA
M_VCCA_DPLLB
1D8V_TXLVDS_S3
1D05V_RUN_PEGPLL
VCCA_PEG_BG
1D5VRUN_QDAC
1D8V_SUS_DLVDS
1D5VRUN_TVDAC
VTTLF1VTTLF2VTTLF3
1D05V_HV_S0
M_VCCA_DAC_BG
M_VCCA_DPLLB
M_VCCA_DPLLA
M_VCCA_MPLL
M_VCCA_HPLL
1D05V_SM
1D05V_RUN_PEGPLL
1D05V_SM_CK
3D3V_CRTDAC_S0
1D8V_SUS_SM_CK_RC
1D5VRUN_QDAC
3D3VTVDAC
1D5VRUN_TVDAC
1D05V_RUN_PEGPLL
1D8V_TXLVDS_S3
1D8V_S3
1D05V_SUS_MCH_PLL2
1D05V_S0
1D05V_S0
1D8V_TXLVDS_S3
3D3V_HV_S0
1D8V_S3
1D8V_S31D8V_SUS_SM_CK
1D05V_S0
1D05V_S0
3D3V_S0 3D3V_HV_S0
3D3V_S0_DAC
3D3V_S0_DAC
1D05V_SUS_MCH_PLL2
1D5V_S0
1D5V_S0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
3D3V_S0_DAC
5V_S03D3V_S0_DAC
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (5 of 6)
10 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (5 of 6)
10 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (5 of 6)
10 43Friday, June 20, 2008Cathedral Peak II SB
1782mA
456mA
106mA
119mA
124mA
322mA
852mA73mA
5mA
120ohm 100MHz
120ohm 100MHz
220ohm 100MHz
180ohm 100MHz
65mA
65mA
24mA
139.2mA
13.2mA
720mA
26mA
35mA
50mA
157.2mA
50mA
60.3mA
Imax = 300 mA
79mA
12
C277SC1KP50V2KX-1GP
DYC277SC1KP50V2KX-1GP
DY
12
C260SC
4D7U
6D3V
3KX
-GP
C260SC
4D7U
6D3V
3KX
-GP
1 2R179
0R0603-PAD
R179
0R0603-PAD
12
C476SC22U16V0KX-1GPC476SC22U16V0KX-1GP
12
C261SC
4D7U
6D3V
3KX
-GP
C261SC
4D7U
6D3V
3KX
-GP
12R350
0R0402-PAD
R350
0R0402-PAD
12
C171 SC
10U6D
3V5M
X-3G
P
C171 SC
10U6D
3V5M
X-3G
P
12
C275SC1U10V3KX-3GPC275SC1U10V3KX-3GP
12
C484SCD1U10V2KX-4GPC484SCD1U10V2KX-4GP
12
C239SCD1U10V2KX-4GPC239SCD1U10V2KX-4GP
12
C444SCD1U10V2KX-4GPDY
C444SCD1U10V2KX-4GPDY
12
C262 SC
22U6D
3V5M
X-2G
P
C262 SC
22U6D
3V5M
X-2G
P
1 2L12
FCM1608KF-1-GP68.00217.161
L12
FCM1608KF-1-GP68.00217.161
12
C471SC
D1U
10V2K
X-4G
P
DY
C471SC
D1U
10V2K
X-4G
P
DY
12 C230SCD1U10V2KX-4GP
C230SCD1U10V2KX-4GP
12
C271SC
D1U
10V2K
X-4G
PC271S
CD
1U10V
2KX
-4GP
12
C242SCD1U10V2KX-4GPC242SCD1U10V2KX-4GP
12
C469SCD01U16V2KX-3GPC469SCD01U16V2KX-3GP 1
2C276SC1KP50V2KX-1GPC276
SC1KP50V2KX-1GP
2
1C202
SC
D47U
6D3V
2KX
-GP
2
1C202
SC
D47U
6D3V
2KX
-GP
12
R3100R0603-PADR3100R0603-PAD
12
C175SCD1U10V2KX-4GPC175SCD1U10V2KX-4GP
2
1 C187SC
D47U
6D3V
2KX
-GP
2
1 C187SC
D47U
6D3V
2KX
-GP
12
C439 SC
22U6D
3V5M
X-2G
P
DY
C439 SC
22U6D
3V5M
X-2G
P
DY
1 2L13
FCM1608KF-1-GP68.00217.161
L13
FCM1608KF-1-GP68.00217.161
12
C480SC
D1U
10V2K
X-4G
P
C480SC
D1U
10V2K
X-4G
P
12
C237 SC
10U6D
3V5M
X-3G
P
DY
C237 SC
10U6D
3V5M
X-3G
P
DY
12
EC154SC1U16V3ZY-GPEC154SC1U16V3ZY-GP
12
C257SC
4D7U
6D3V
3KX
-GP
C257SC
4D7U
6D3V
3KX
-GP
12
C490SC
10U6D
3V5M
X-3G
P
C490SC
10U6D
3V5M
X-3G
P
1 2L14
0R0603-PAD
L14
0R0603-PAD
12
C483SCD1U10V2KX-4GP
C483SCD1U10V2KX-4GP
12
C256SC
2D2U
6D3V
3MX
-1-GP
C256SC
2D2U
6D3V
3MX
-1-GP
12
C227 SC
1U10V
3KX
-3GP
C227 SC
1U10V
3KX
-3GP
12
C489SC
10U6D
3V5M
X-3G
P
C489SC
10U6D
3V5M
X-3G
P
1 2
L2
PBY160808T-181Y-GP68.00206.041
L2
PBY160808T-181Y-GP68.00206.041
1
2
3
D22
BAT54-7-F-GP
D22
BAT54-7-F-GP
2
1C185
SC
D47U
6D3V
2KX
-GP
2
1C185
SC
D47U
6D3V
2KX
-GP
12
EC153SC
1U16V
3ZY-G
P
DY
EC153SC
1U16V
3ZY-G
P
DY
12
C478SC
D01U
16V2K
X-3G
P
C478SC
D01U
16V2K
X-3G
P
12
C447 SC
4D7U
6D3V
3KX
-GP
DY
C447 SC
4D7U
6D3V
3KX
-GP
DY
1 2R3420R0603-PADR3420R0603-PAD
1 2R3460R0603-PADR3460R0603-PAD
12
R3510R0402-PADR3510R0402-PAD
12
C486SCD1U10V2KX-4GPDY
C486SCD1U10V2KX-4GPDY
12
C186SC
D1U
10V2K
X-4G
P
C186SC
D1U
10V2K
X-4G
P
12
C219 SC
1U10V
3KX
-3GP
C219 SC
1U10V
3KX
-3GP
1 2R183
1R2F-GP
R183
1R2F-GP
12
C479SCD1U10V2KX-4GPC479SCD1U10V2KX-4GP
12
C274SC10U6D3V5MX-3GPC274SC10U6D3V5MX-3GP
12C442
SC
10U6D
3V5M
X-3G
P
DYC442
SC
10U6D
3V5M
X-3G
P
DY
1 2R1910R0603-PADR1910R0603-PAD
2
1C445
SCD47U6D3V2KX-GP 2
1C445
SCD47U6D3V2KX-GP
12
C474SCD1U10V2KX-4GPC474SCD1U10V2KX-4GP
1 2R357
0R0603-PAD
R357
0R0603-PAD
12
C460SC10U6D3V5MX-3GPDY
C460SC10U6D3V5MX-3GPDY1
2
C224 SC
4D7U
6D3V
3KX
-GP
DYC224 S
C4D
7U6D
3V3K
X-G
P
DY
12
C251SC
10U6D
3V5M
X-3G
P
C251SC
10U6D
3V5M
X-3G
P
1 2R2030R0603-PADR2030R0603-PAD
12
C441SC10U6D3V5MX-3GPC441SC10U6D3V5MX-3GP
VTT V3VTT U3VTT V2VTT U2
VCCA_PEG_BGAD48
VCCA_PEG_PLLAA48
VCCA_CRT_DACB27VCCA_CRT_DACA26
VCCA_DPLLAF47
VCCA_DPLLBL48
VCCA_HPLLAD1
VCCA_LVDSJ48
VCCA_MPLLAE1
VCCA_TV_DACB24VCCA_TV_DACA24
VCCD_PEG_PLLAA47
VTT U6VTT T6VTT U5VTT T5
VTT T8VTT U7VTT T7
VCCD_HPLLAF1
VTT U13VTT T13
VTT T12VTT U11VTT T11VTT U10VTT T10VTT U9VTT T9VTT U8
VTT U12
VCCA_SM_CKAP28VCCA_SM_CKAN28
VCCA_DAC_BGA25
VCCD_TVDACM25
VTTLF A8VTTLF L1VTTLF AB2
VCC_DMI AH48VCC_DMI AF48
VCC_SM_CK BF21VCC_SM_CK BH20VCC_SM_CK BG20VCC_SM_CK BF20
VCCD_LVDSM38
VCCD_QDACL28
VCC_AXF B22VCC_AXF B21VCC_AXF A21
VCCA_SMAR20VCCA_SMAP20VCCA_SMAN20VCCA_SMAR17VCCA_SMAP17
VCCA_SMAT16VCCA_SMAR16VCCA_SMAP16
VCC_TX_LVDS K47
VSSA_LVDSJ47
VCC_HV C35VCC_HV B35
VCC_PEG V48
VCCD_LVDSL37
VCC_PEG U48VCC_PEG V47VCC_PEG U47VCC_PEG U46
VCCA_SMAN17
VCCA_SM_CKAP25VCCA_SM_CKAN25VCCA_SM_CKAN24VCCA_SM_CK_NCTFAM28VCCA_SM_CK_NCTFAM26VCCA_SM_CK_NCTFAM25VCCA_SM_CK_NCTFAL25VCCA_SM_CK_NCTFAM24VCCA_SM_CK_NCTFAL24VCCA_SM_CK_NCTFAM23
VTT T2VTT V1VTT U1
VCC_HV A35
VCC_DMI AH47VCC_DMI AG47
VSSA_DAC_BGB25
VCCA_SM_CK_NCTFAL23
VCC_HDAA32
POWER
CRT
PLL
A PEG
A SM
TV
D TV/CRT
LVDS
VTTLF
PEG
SM CK
AXF
VTT
DMI
HV
A CK
A LVDS
HDA
8 OF 10U35H
CANTIGA-GM-GP-U-NF71.CNTIG.00U
POWER
CRT
PLL
A PEG
A SM
TV
D TV/CRT
LVDS
VTTLF
PEG
SM CK
AXF
VTT
DMI
HV
A CK
A LVDS
HDA
8 OF 10U35H
CANTIGA-GM-GP-U-NF71.CNTIG.00U
12
C467SC
1U10V
3KX
-3GP
C467SC
1U10V
3KX
-3GP
12
C443
SC
4D7U
6D3V
3KX
-GP
C443
SC
4D7U
6D3V
3KX
-GP
1 2
R34910R2F-L-GPR34910R2F-L-GP
VIN1GND2EN/EN#3 NC#4 4
VOUT 5
U36
RT9198-33PBR-GP74.09198.G7F
U36
RT9198-33PBR-GP74.09198.G7F
12
C482SCD1U10V2KX-4GPC482SCD1U10V2KX-4GP
1 2
C222SC10U6D3V5MX-3GPC222SC10U6D3V5MX-3GP
12 C446SCD1U10V2KX-4GP
C446SCD1U10V2KX-4GP
12
C245 SC
2D2U
6D3V
3MX
-1-GP
DY
C245 SC
2D2U
6D3V
3MX
-1-GP
DY
12
C263SC
D1U
10V2K
X-4G
P
C263SC
D1U
10V2K
X-4G
P
1 2R358
0R0603-PAD
R358
0R0603-PAD
12
C440SC10U6D3V5MX-3GPDY
C440SC10U6D3V5MX-3GPDY
1 2R196
0R0603-PAD
R196
0R0603-PAD
1 2
L15
FCM1608CF-221T02-GP68.00217.521
L15
FCM1608CF-221T02-GP68.00217.521
1 2R212
0R0603-PAD
R212
0R0603-PAD
12
C485SCD1U10V2KX-4GPDY
C485SCD1U10V2KX-4GPDY
1 2R217
0R0603-PAD
R217
0R0603-PAD
12
C241SC
D1U
10V2K
X-4G
P
C241SC
D1U
10V2K
X-4G
P
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (6 of 6)
11 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (6 of 6)
11 43Friday, June 20, 2008Cathedral Peak II SB
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (6 of 6)
11 43Friday, June 20, 2008Cathedral Peak II SB
TP156 TPAD30TP156 TPAD30
TP163 TPAD30TP163 TPAD30
TP157 TPAD30TP157 TPAD30
TP155 TPAD30TP155 TPAD30TP164 TPAD30TP164 TPAD30
VSSBG21
VSSAW21VSSAU21VSSAP21VSSAN21VSSAH21VSSAF21VSSAB21VSSR21VSSM21VSSJ21VSSG21VSSBC20VSSBA20VSSAW20VSSAT20VSSAJ20VSSAG20VSSY20VSSN20VSSK20VSSF20VSSC20VSSA20VSSBG19VSSA18VSSBG17VSSBC17VSSAW17VSSAT17VSSR17VSSM17VSSH17VSSC17
VSSBA16
VSSAU16VSSAN16VSSN16VSSK16VSSG16VSSE16VSSBG15
VSSW15VSSA15VSSBG14VSSAA14VSSC14VSSBG13VSSBC13VSSBA13
VSSAN13VSSAJ13VSSAE13VSSN13VSSL13VSSG13VSSE13VSSBF12VSSAV12VSSAT12VSSAM12VSSAA12VSSJ12VSSA12VSSBD11VSSBB11VSSAY11VSSAN11VSSAH11
VSSY11VSSN11VSSG11VSSC11VSSBG10VSSAV10VSSAT10VSSAJ10VSSAE10VSSAA10
VSSBH8VSSB9VSSG9VSSAD9VSSAM9VSSAN9VSSBC9
VSSM10VSSBF9
VSS AH8VSS Y8VSS L8VSS E8VSS B8VSS AY7VSS AU7VSS AN7VSS AJ7VSS AE7VSS AA7VSS N7VSS J7VSS BG6VSS BD6VSS AV6VSS AT6
VSSAC15
VSS AM6VSS M6VSS C6VSS BA5VSS AH5VSS AD5VSS Y5VSS L5VSS J5VSS H5VSS F5VSS BE4
VSS BC3VSS AV3VSS AL3
VSS_NCTF AF32VSS_NCTF AB32VSS_NCTF V32VSS_NCTF AJ30VSS_NCTF AM29VSS_NCTF AF29VSS_NCTF AB29VSS_NCTF U26VSS_NCTF U23VSS_NCTF AL20VSS_NCTF V20VSS_NCTF AC19VSS_NCTF AL17VSS_NCTF AJ17VSS_NCTF AA17VSS_NCTF U17
NCTF_VSS_SCB#BH48 BH48NCTF_VSS_SCB#BH1 BH1NCTF_VSS_SCB#A48 A48NCTF_VSS_SCB#C1 C1NCTF_VSS_SCB#A3 A3
NC#E1 E1NC#D2 D2NC#C3 C3NC#B4 B4NC#A5 A5NC#A6 A6
NC#A43 A43NC#A44 A44NC#B45 B45NC#C46 C46NC#D47 D47NC#B47 B47NC#A46 A46NC#F48 F48NC#E48 E48NC#C48 C48NC#B48 B48
VSS R3VSS P3
VSS BA2
VSS AR2VSS AU2
VSS AP2
VSS F3
VSS AW2
VSS AE2VSS AF2VSS AH2VSS AJ2
VSS AD2VSS AC2VSS Y2VSS M2VSS K2VSS AM1VSS AA1VSS P1VSS H1
VSSBB8VSSAV8VSSAT8
VSS U24VSS U28VSS U25VSS U29
VSSL12
VSS
VSS NCTF
VSS SCB
NC
10 OF 10
NCTF
TES
T PI
N:A3
,C1,
A48,
BH1,
BH48
U35J
CANTIGA-GM-GP-U-NF71.CNTIG.00U
VSS
VSS NCTF
VSS SCB
NC
10 OF 10
NCTF
TES
T PI
N:A3
,C1,
A48,
BH1,
BH48
U35J
CANTIGA-GM-GP-U-NF71.CNTIG.00U
VSSAU48
VSS A23
VSSAR48VSSAL48VSSBB47VSSAW47VSSAN47VSSAJ47VSSAF47VSSAD47VSSAB47VSSY47VSST47VSSN47VSSL47VSSG47VSSBD46VSSBA46
VSSAV46VSSAR46VSSAM46VSSV46VSSR46VSSP46VSSH46VSSF46VSSBF44VSSAH44VSSAD44VSSAA44VSSY44VSSU44VSST44VSSM44VSSF44VSSBC43VSSAV43VSSAU43VSSAM43VSSJ43VSSC43VSSBG42VSSAY42VSSAT42VSSAN42VSSAJ42VSSAE42VSSN42VSSL42VSSBD41VSSAU41VSSAM41VSSAH41VSSAD41VSSAA41VSSY41VSSU41VSST41VSSM41VSSG41VSSB41VSSBG40VSSBB40VSSAV40VSSAN40VSSH40VSSE40VSSAT39VSSAM39VSSAJ39VSSAE39VSSN39VSSL39VSSB39VSSBH38VSSBC38VSSBA38VSSAU38VSSAH38VSSAD38VSSAA38VSSY38VSSU38VSST38VSSJ38VSSF38VSSC38
VSSBD36
VSS AM36VSS AE36VSS P36VSS L36VSS J36VSS F36VSS B36VSS AH35VSS AA35VSS Y35VSS U35VSS T35VSS BF34VSS AM34VSS AJ34VSS AF34VSS AE34VSS W34VSS B34VSS A34VSS BG33VSS BC33VSS BA33VSS AV33VSS AR33VSS AL33VSS AH33VSS AB33VSS P33VSS L33VSS H33VSS N32VSS K32VSS F32VSS C32VSS A31VSS AN29VSS T29VSS N29VSS K29VSS H29VSS F29VSS A29VSS BG28VSS BD28VSS BA28VSS AV28VSS AT28VSS AR28VSS AJ28VSS AG28VSS AE28VSS AB28VSS Y28VSS P28VSS K28VSS H28VSS F28VSS C28VSS BF26VSS AH26VSS AF26VSS AB26VSS AA26VSS C26VSS B26VSS BH25VSS BD25VSS BB25VSS AV25VSS AR25VSS AJ25VSS AC25VSS Y25VSS N25VSS L25VSS J25VSS G25VSS E25VSS BF24
VSSBF37VSSBB37VSSAW37VSSAT37VSSAN37VSSAJ37VSSH37VSSC37VSSBG36
VSSAU36
VSS AT24
VSS AH24
VSS AB24
VSS L24
VSSAY46
VSS G24
VSS E24
VSS AG23
VSS B23
VSS AY24
VSS AJ24
VSS AF24
VSS R24
VSS K24VSS J24
VSS F24
VSS BH23
VSS Y23VSSAK15
VSS AD12
VSS AJ6
VSS
9 OF 10U35I
CANTIGA-GM-GP-U-NF71.CNTIG.00U
VSS
9 OF 10U35I
CANTIGA-GM-GP-U-NF71.CNTIG.00U
-
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
M_B_RAS#
M_B_A4
M_B_A9
M_B_A14
M_B_A10
M_B_A7
M_B_A1
M_B_A8
M_B_A5
M_B_A2
M_B_A11
M_B_A6
M_B_A3
M_B_A12
M_B_A9
M_B_A0
M_B_A4
M_B_A13
M_B_A15M_B_DM0M_B_DM1
M_B_DM7M_B_DM6M_B_DM5M_B_DM4M_B_DM3M_B_DM2
M_B_DQ0
M_B_DQ8
M_B_DQ3
M_B_DQ10
M_B_DQ1
M_B_DQ9
M_B_DQ4
M_B_DQ6
M_B_DQ2
M_B_DQ11
M_B_DQ5
M_B_DQ19
M_B_DQ14
M_B_DQ30
M_B_DQ22
M_B_DQ16
M_B_DQ28
M_B_DQ18
M_B_DQ27
M_B_DQ15
M_B_DQ23
M_B_DQ17
M_B_DQ31
M_B_DQ13
M_B_DQ21
M_B_DQ12
M_B_DQ20
M_B_DQ35
M_B_DQ24
M_B_DQ46
M_B_DQ38
M_B_DQ32
M_B_DQ44
M_B_DQ34
M_B_DQ43
M_B_DQ26
M_B_DQ39
M_B_DQ33
M_B_DQ47
M_B_DQ25
M_B_DQ37
M_B_DQ29
M_B_DQ36
M_B_DQ53
M_B_DQ45
M_B_DQ52M_B_DQ51
M_B_DQ40
M_B_DQ62
M_B_DQ54
M_B_DQ48
M_B_DQ60
M_B_DQ50
M_B_DQ59
M_B_DQ42
M_B_DQ55
M_B_DQ49
M_B_DQ63
M_B_DQ41
M_B_DQ57
M_B_DQ61
M_B_DQ56
M_B_DQ58
M_B_DQ7
M_B_WE#
DDRB_SA0
M_B_A0
M_B_DQS1M_B_DQS0
M_B_DQS7
M_B_DQS5M_B_DQS4
M_B_DQS2
M_B_DQS6
M_B_DQS3
M_B_DQS#4
M_B_DQS#2
M_B_DQS#7
M_B_DQS#3
M_B_DQS#6
M_B_DQS#0
M_B_DQS#5
M_B_DQS#1
M_ODT3
M_B_A8
M_B_A11M_B_A14
M_B_A3
M_B_BS#1
M_CKE2
M_B_A5
M_CS2#
M_B_A10
M_B_A13
M_B_A7
M_B_A1
M_CS3#
M_B_BS#2
M_B_A6
M_ODT2
M_B_CAS#M_B_BS#0
M_B_A2
M_B_A12M_CKE3
DDR_VREF_S3_1
1D8V_S3
3D3V_S0
1D8V_S3
DDR_VREF_S3
DDR_VREF_S3
M_B_A[14..0]8
M_B_DM[7..0] 8
M_ODT27M_ODT37
M_B_DQ[63..0]8
SMBD_ICH 3,13,20SMBC_ICH 3,13,20
M_CLK_DDR3 7
M_CLK_DDR2 7
M_CLK_DDR#3 7
M_CLK_DDR#2 7
M_B_RAS# 8M_B_WE# 8M_B_CAS# 8
M_CS2# 7M_CS3# 7
M_CKE2 7M_CKE3 7
M_B_DQS[7..0]8
M_B_DQS#[7..0]8
M_B_BS#28
M_B_BS#08M_B_BS#18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBDDR2 Socket 0 (DM1)
12 43Friday, June 20, 2008
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBDDR2 Socket 0 (DM1)
12 43Friday, June 20, 2008
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.
Cathedral Peak II SBDDR2 Socket 0 (DM1)
12 43Friday, June 20, 2008
REV
ERSE
TYP
EHigh 9.2mm
Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
PARALLEL TERMINATION
Place these Caps near DM1
Put decap near power(0.9V)and pull-up resistor
2nd: 62.10017.B51
12345
678
RN27
SRN56J-5-GP
RN27
SRN56J-5-GP
12345
678
RN31
SRN56J-5-GP
RN31
SRN56J-5-GP
12345
678
RN25
SRN56J-5-GP
RN25
SRN56J-5-GP
12
C452SC
D1U
16V2ZY
-2GP
C452SC
D1U
16V2ZY
-2GP