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IKI20210Pengantar Organisasi Komputer

Kuliah No. 23: Aritmatika

18 Desember 2002

Bobby Nazief (nazief@cs.ui.ac.id)Johny Moningka (moningka@cs.ui.ac.id)

bahan kuliah: http://www.cs.ui.ac.id/~iki20210/

Sumber:1. Hamacher. Computer Organization, ed-4.2. Materi kuliah CS61C/2000 & CS152/1997, UCB.

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Number Representation

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Decimal vs. Hexadecimal vs.Binary

Unsigned Numbers

Dec Hex Binary

00 0 000001 1 000102 2 001003 3 001104 4 010005 5 010106 6 011007 7 011108 8 100009 9 100110 A 101011 B 101112 C 110013 D 110114 E 111015 F 1111

° Decimal:great for humans, especially when doing arithmetic

° Hex:if human looking at long strings of binary numbers, its much easier to convert to hex and look 4 bits/symbol

• Terrible for arithmetic; just say no

° Binary:what computers use; you learn how computers do +,-,*,/

• To a computer, numbers always binary

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How to Represent Negative Numbers?

° So far, unsigned numbers

° Obvious solution: define leftmost bit to be sign! • 0 => +, 1 => -

• Rest of bits can be numerical value of number

° Representation called sign and magnitude

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Shortcomings of sign and magnitude?

° Arithmetic circuit more complicated• Special steps depending whether signs are the same or not

° Also, Two zeros• 0x00000000 = +0ten

• 0x80000000 = -0ten

• What would it mean for programming?

° Sign and magnitude abandoned

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Another try: complement the bits

° Example: 710 = 001112 -710 = 110002

° Called one’s Complement

° Note: postive numbers have leading 0s, negative numbers have leadings 1s.

00000 00001 01111...

111111111010000 ...

° What is -00000 ?

° How many positive numbers in N bits?

° How many negative ones?

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Shortcomings of ones complement?

° Arithmetic not too hard

° Still two zeros• 0x00000000 = +0ten

• 0xFFFFFFFF = -0ten

• What would it mean for programming?

° One’s complement eventually abandoned because another solution was better

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Search for Negative Number Representation

° Obvious solution didn’t work, find another

° What is result for unsigned numbers if tried to subtract large number from a small one?• Would try to borrow from string of leading 0s,

so result would have a string of leading 1s

• With no obvious better alternative, pick representation that made the hardware simple: leading 0s positive, leading 1s negative

• 000000...xxx is >=0, 111111...xxx is < 0

° This representation called two’s complement

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Two’s Complement Number line

° 2 N-1 non-negatives

° 2 N-1 negatives

° one zero

° how many positives?

° comparison?

° overflow?

00000 0000100010

11111

11110

10000 0111110001

0 12

-1-2

-15-16 15

.

.

.

.

.

.

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Two’s Complement Numbers

0000 ... 0000 0000 0000 0000two =

0ten0000 ... 0000 0000 0000 0001two =

1ten0000 ... 0000 0000 0000 0010two =

2ten. . .0111 ... 1111 1111 1111 1101two =

2,147,483,645ten0111 ... 1111 1111 1111 1110two =

2,147,483,646ten0111 ... 1111 1111 1111 1111two =

2,147,483,647ten1000 ... 0000 0000 0000 0000two =

–2,147,483,648ten1000 ... 0000 0000 0000 0001two =

–2,147,483,647ten1000 ... 0000 0000 0000 0010two =

–2,147,483,646ten. . . 1111 ... 1111 1111 1111 1101two =

–3ten1111 ... 1111 1111 1111 1110two =

–2ten1111 ... 1111 1111 1111 1111two =

–1ten

° One zero, 1st bit => >=0 or <0, called sign bit • but one negative with no positive –2,147,483,648ten

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Two’s Complement Formula

° Can represent positive and negative numbers in terms of the bit value times a power of 2:

• d31 x -231 + d30 x 230 + ... + d2 x 22 + d1 x 21 + d0 x 20

° Example1111 1111 1111 1111 1111 1111 1111 1100two

= 1x-231 +1x230 +1x229+... +1x22+0x21+0x20

= -231 + 230 + 229 + ... + 22 + 0 + 0

= -2,147,483,648ten + 2,147,483,644ten

= -4ten

° Note: need to specify width: we use 32 bits

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Two’s complement shortcut: Negation

° Invert every 0 to 1 and every 1 to 0, then add 1 to the result

• Sum of number and its one’s complement must be 111...111two

• 111...111two= -1ten

• Let x’ mean the inverted representation of x

• Then x + x’ = -1 x + x’ + 1 = 0 x’ + 1 = -x

° Example: -4 to +4 to -4x : 1111 1111 1111 1111 1111 1111 1111 1100two

x’: 0000 0000 0000 0000 0000 0000 0000 0011two

+1: 0000 0000 0000 0000 0000 0000 0000 0100two

()’: 1111 1111 1111 1111 1111 1111 1111 1011two

+1: 1111 1111 1111 1111 1111 1111 1111 1100two

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Two’s comp. shortcut: Sign extension

° Convert 2’s complement number using n bits to more than n bits

° Simply replicate the most significant bit (sign bit) of smaller to fill new bits

•2’s comp. positive number has infinite 0s

•2’s comp. negative number has infinite 1s

•Bit representation hides leading bits; sign extension restores some of them

•16-bit -4ten to 32-bit:

1111 1111 1111 1100two

1111 1111 1111 1111 1111 1111 1111 1100two

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Addition of Positive Numbers

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One-Bit Full Adder (1/3)

° Example Binary Addition:

Carries

° Thus for any bit of addition:• The inputs are ai, bi, CarryIni

• The outputs are Sumi, CarryOuti

° Note: CarryIni+1 = CarryOuti

a: 0 0 1 1

b: 0 1 0 1

Sum: 1 0 0 0

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One-Bit Full Adder (2/3)

DefinitionA B CarryIn CarryOut Sum0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1

Sum = ABCin + ABCin + ABCin + ABCin

CarryOut = AB + ACin + BCin

¯ ¯ ¯ ¯ ¯ ¯

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One-Bit Full Adder (3/3)

° To create one-bit full adder:• implement gates for Sum

• implement gates for CarryOut

• connect all inputs with same name

SumA

B

CarryIn

CarryOut

+

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Ripple-Carry Adders: adding n-bits numbers

° Critical Path of n-bit Rippled-carry adder is n*CP• CP = 2 gate-delays (Cout = AB + ACin + BCin)

A0

B0

1-bitFA

Sum0

CarryIn0

CarryOut0

A1

B1

1-bitFA

Sum1

CarryIn1

CarryOut1

A2

B2

1-bitFA

Sum2

CarryIn2

CarryOut2

A3

B3

1-bitFA

Sum3

CarryIn3

CarryOut3

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Overflow

° Binary bit patterns above are simply representatives of numbers

° Numbers really have an infinite number of digits• with almost all being zero except for a few of the rightmost digits

• Just don’t normally show leading zeros

° If result of add (or -,*/) cannot be represented by these rightmost HW bits, overflow is said to have occurred• When CarryOut is generated from MSB

00000 00001 00010 1111111110

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Fast Adders

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Carry Look Ahead: reducing Carry Propagation delay

A

B

SGP

A

B

SGP

A

B

SGP

C1 = G0 + C0 P0 = A0B0 + C0(A0+B0)

C2 = G1 + G0 P1 + C0 P0 P1

C3 = G2 + G1 P2 + G0 P1 P2 + C0 P0 P1 P2

G = G3 + P3·G2 + P3·P2·G1 + P3·P2·P1·G0

C4 = . . .

P = P3·P2·P1·P0

A B C-out0 0 0 “kill”0 1 C-in “propagate”1 0 C-in “propagate”1 1 1 “generate”

A0

B0

S0GP

P = A + BG = A B

Cin

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Carry Look Ahead: Delays

° Expression for any carry:• Ci+1 = Gi + PiGi-1 + … + PiPi-1 … P0C0

° All carries can be obtained in 3 gate-delays:• 1 needed to developed all Pi and Gi

• 2 needed in the AND-OR circuit

° All sums can be obtained in 6 gate-delays:• 3 needed to obtain carries

• 1 needed to invert carry

• 2 needed in the AND-OR circuit of Sum’s circuit

° Independent of the number of bits (n)

° 4-bit Adder:• CLA: 6 gate-delays

• RC: (3*2 + 3) gate-delays

° 16-bit Adder:• CLA: 6 gate-delays

• RC: (15*2 + 3) gate-delays

Sum = ABCin + ABCin + ABCin + ABCin ¯ ¯ ¯ ¯ ¯ ¯

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Cascaded CLA: overcoming Fan-in constraint

CLA

4-bitAdder

4-bitAdder

4-bitAdder

C1 = G0 + C0 P0

C2 = G1 + G0 P1 + C0 P0 P1

C3 = G2 + G1 P2 + G0 P1 P2 + C0 P0 P1 P2

GP

G0P0

C4 = . . .

C0

Delay = 3 + 2 + 3 = 8

DelayRC = 15*2 + 3 = 33

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Signed Addition & Subtraction

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Addition & Subtraction Operations

° Addition:• Just add the two numbers

• Ignore the Carry-out from MSB

• Result will be correct, provided there’s no overflow

0 1 0 1 (+5)+0 0 1 0 (+2) 0 1 1 1 (+7)

0 1 0 1 (+5)+1 0 1 0 (-6) 1 1 1 1 (-1)

1 0 1 1 (-5)+1 1 1 0 (-2)11 0 0 1 (-7)

0 1 1 1 (+7)+1 1 0 1 (-3)10 1 0 0 (+4)

0 0 1 0 (+2) 0 0 1 00 1 0 0 (+4) +1 1 0 0 (-4)

1 1 1 0 (-2)

1 1 1 0 (-2) 1 1 1 01 0 1 1 (-5) +0 1 0 1 (+5)

10 0 1 1 (+3)

° Subtraction:• Form 2’s complement of the

subtrahend

• Add the two numbers as in Addition

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Overflow

° Examples: 7 + 3 = 10 but ...

° - 4 5 = - 9 but ...

2’s ComplementBinaryDecimal

0 0000

1 0001

2 0010

3 0011

0000

1111

1110

1101

Decimal

0

-1

-2

-3

4 0100

5 0101

6 0110

7 0111

1100

1011

1010

1001

-4

-5

-6

-7

1000-8

0 1 1 1

0 0 1 1+

1 0 1 0

1

1 1 0 0

1 0 1 1+

0 1 1 1

110

7

3

1

– 6

– 4

– 5

7

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Overflow Detection

° Overflow: the result is too large (or too small) to represent properly

• Example: - 8 < = 4-bit binary number <= 7

° When adding operands with different signs, overflow cannot occur!

° Overflow occurs when adding:• 2 positive numbers and the sum is negative

• 2 negative numbers and the sum is positive

° On your own: Prove you can detect overflow by:• Carry into MSB ° Carry out of MSB

0 1 1 1

0 0 1 1+

1 0 1 0

1

1 1 0 0

1 0 1 1+

0 1 1 1

110

7

3

1

– 6

–4

– 5

7

0

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Overflow Detection Logic

° Carry into MSB ° Carry out of MSB• For a N-bit Adder: Overflow = CarryIn[N - 1] XOR CarryOut[N - 1]

A0

B0

1-bitFA

Result0

CarryIn0

CarryOut0

A1

B1

1-bitFA

Result1

CarryIn1

CarryOut1

A2

B2

1-bitFA

Result2

CarryIn2

A3

B3

1-bitFA

Result3

CarryIn3

CarryOut3

Overflow

X Y X XOR Y

0 0 0

0 1 1

1 0 1

1 1 0