# 1 iki10230 pengantar organisasi komputer kuliah no. 05.b: arithmetic operations sumber: 1. paul...

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Pengantar Organisasi KomputerSumber:

2. Hamacher. Computer Organization, ed-5

3. Materi kuliah CS61C/2000 & CS152/1997, UCB

4. Intel Architecture Software Developer’s Manual

17 Maret 2004

encoded as signed or unsigned binary integers

Operations include

The are also BCD (binary coded decimal) arithmetic instructions

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ADD DEST,SRC ; DEST [DEST] + [SRC]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

ADC DEST,SRC ; DEST [DEST] + [SRC] + [CF]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

SUB DEST,SRC ; DEST [DEST] - [SRC]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

SBB DEST,SRC ; DEST [DEST] - [SRC] – [CF]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

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ACC [ACC] + IMM

REG/MEM [REG/MEM] + IMM

ADD r/m16,imm8 Add sign-extended imm8 to r/m16

ADD r/m32,imm8 Add sign-extended imm8 to r/m32

REG/MEM [REG/MEM] + [REG]

REG [REG] + [REG/MEM]

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The MUL instruction multiplies two unsigned integer operands.

SRC ACC DEST

r/m8 AL AX

r/m16 AX DX:AX

r/m32 EAX EDX:EAX

CF & OF flags are set to 0 if the upper half of the result is 0; otherwise, they are set to 1

IMUL

The IMUL instruction multiplies two signed integer operands.

CF & OF flags are set when:

significant bits are carried into the upper half of the result

the result must be truncated to fit in the destination operand size

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CONTOH:

2-OPERAND

IMUL r16,imm8 REG ← [REG] * sign-extended IMM

IMUL r16,imm16 REG ← r/m16 * IMM

IMUL r32,r/m32 REG ← [REG] * [REG/MEM]

IMUL r32,imm8 REG ← [REG] * sign-extended IMM

IMUL r32,imm32 REG ← [REG/MEM] * IMM

3-OPERAND

IMUL r16,r/m16,imm16 REG ← [REG/MEM] * IMM

IMUL r32,r/m32,imm8 REG ← [REG/MEM] * sign-ext. IMM

IMUL r32,r/m32,imm32 REG ← [REG/MEM] * IMM

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divides one unsigned integer operand (ACC) by another (SRC)

SRC ACC QUOTIENT REMAINDER

r/m8 AX AL AH

r/m16 DX:AX AX DX

r/m32 EDX:EAX EAX EDX

remainder is always less than the divisor in magnitude

overflow is indicated with the #DE (divide error) exception rather than with the OF flag

IDIV SRC ; QUO. & REM. [ACC] / [SRC]

divides one signed integer operand (ACC) by another (SRC)

non-integral results are truncated (chopped) towards 0

sign of the remainder is always the same as the sign of the dividend

absolute value of the remainder is always less than the absolute value of the divisor

overflow is indicated with the #DE (divide error) exception rather than with the OF (overflow) flag

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Signed Divide

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Operand is assumed to be unsigned integer.

CF flag is not affected. OF, SF, ZF, AF, and PF flags are set according to the result.

INC/DEC r/m8 Increment r/m byte by 1

INC BYTE [DATA]

INC WORD [DATA]

INC DWORD [DATA]

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CMP DEST,SRC ; [DEST] – [SRC], update FLAGS

The source operands are not modified, nor is the result saved.

The CF, OF, SF, ZF, AF, and PF flags are set according to the result (in the same manner as the SUB instruction)

NEG DEST ; DEST 0 – [DEST]

Assume a signed integer operand

CF flag set to 0 if the source operand is 0; otherwise it is set to 1

OF, SF, ZF, AF, and PF flags are set according to the result

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[REG/MEM] - IMM

CMP r/m32,imm32 Compare imm32 with r/m32

CMP r/m16,imm8 Compare imm8 with r/m16

CMP r/m32,imm8 Compare imm8 with r/m32

[REG/MEM] – [REG]

[REG] – [REG/MEM]

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CONTOH:

Binary-coded decimal integers (BCD integers) are unsigned 4-bit integers with valid values ranging from 0 to 9.

BCD integers can be unpacked (one BCD digit per byte) or packed (two BCD digits per byte).

The value of an unpacked BCD integer is the binary value of the low halfbyte (bits 0 through 3).

The high half-byte (bits 4 through 7) can be any value during addition and subtraction, but must be zero during multiplication and division.

Packed BCD integers allow two BCD digits to be contained in one byte.

Here, the digit in the high half-byte is more significant than the digit in the low half-byte.

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Decimal arithmetic can be performed by combining the binary arithmetic instructions ADD, SUB, MUL, and DIV with the decimal arithmetic instructions.

The decimal arithmetic instructions are provided to carry out the following operations:

To adjust the results of a previous binary arithmetic operation to produce a valid BCD result.

To adjust the operands of a subsequent binary arithmetic operation so that the operation will produce a valid BCD result.

Decimal arithmetic instructions operate only on both packed and unpacked BCD values.

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Packed-BCD Instructions

The DAA (decimal adjust after addition) and DAS (decimal adjust after subtraction) instructions adjust the results of operations performed on packed BCD integers.

Adding two packed BCD values requires two instructions:

an ADD instruction: adds (binary addition) the two values and stores the result in the AL register

followed by a DAA instruction: adjusts the value in the AL register to obtain a valid, 2-digit, packed BCD value and sets the CF flag if a decimal carry occurred as the result of the addition.

Subtracting one packed BCD value from another requires:

a SUB instruction: subtracts (binary subtraction) one BCD value from another and stores the result in the AL register

followed by a DAS instruction: adjusts the value in the AL register to obtain a valid, 2-digit, packed BCD value and sets the CF flag if a decimal borrow occurred as the result of the subtraction.

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AAA (ASCII adjust after addition)

converts the binary value in the AL register into a decimal value and stores the result in the AL register in unpacked BCD format

if a decimal carry occurred as a result of the addition, the CF flag is set and the contents of the AH register are incremented by 1

AAS (ASCII adjust after subtraction)

similar with AAA

AAM (ASCII adjust after multiplication)

converts the binary value in the AL register into a decimal value and stores the least significant digit of the result in the AL register and the most significant digit, if there is one, in the AH register

AAD (ASCII adjust before division)

converts the BCD value in registers AH (most significant digit) and AL (least significant digit) into a binary value and stores the result in register AL

when the value in AL is divided by an unpacked BCD value, the quotient and remainder will be automatically encoded in unpacked BCD format

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square_msg db "Square of input is ", 0

cube_msg db "Cube of input is ", 0

cube25_msg db "Cube of input times 25 is ", 0

quot_msg db "Quotient of cube/100 is ", 0

rem_msg db "Remainder of cube/100 is ", 0

neg_msg db "The negation of the remainder is ", 0

segment .bss

mov ebx, eax ; save answer in ebx

mov eax, square_msg

mov eax, cube_msg

mov eax, cube25_msg

mov ecx, 100 ; can't divide by immediate value

idiv ecx ; edx:eax / ecx

mov eax, quot_msg

mov eax, neg_msg

leave

ret

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2. Hamacher. Computer Organization, ed-5

3. Materi kuliah CS61C/2000 & CS152/1997, UCB

4. Intel Architecture Software Developer’s Manual

17 Maret 2004

encoded as signed or unsigned binary integers

Operations include

The are also BCD (binary coded decimal) arithmetic instructions

IKI20210

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ADD DEST,SRC ; DEST [DEST] + [SRC]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

ADC DEST,SRC ; DEST [DEST] + [SRC] + [CF]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

SUB DEST,SRC ; DEST [DEST] - [SRC]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

SBB DEST,SRC ; DEST [DEST] - [SRC] – [CF]

OF, SF, ZF, AF, CF, and PF flags are set according to the result

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ACC [ACC] + IMM

REG/MEM [REG/MEM] + IMM

ADD r/m16,imm8 Add sign-extended imm8 to r/m16

ADD r/m32,imm8 Add sign-extended imm8 to r/m32

REG/MEM [REG/MEM] + [REG]

REG [REG] + [REG/MEM]

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The MUL instruction multiplies two unsigned integer operands.

SRC ACC DEST

r/m8 AL AX

r/m16 AX DX:AX

r/m32 EAX EDX:EAX

CF & OF flags are set to 0 if the upper half of the result is 0; otherwise, they are set to 1

IMUL

The IMUL instruction multiplies two signed integer operands.

CF & OF flags are set when:

significant bits are carried into the upper half of the result

the result must be truncated to fit in the destination operand size

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CONTOH:

2-OPERAND

IMUL r16,imm8 REG ← [REG] * sign-extended IMM

IMUL r16,imm16 REG ← r/m16 * IMM

IMUL r32,r/m32 REG ← [REG] * [REG/MEM]

IMUL r32,imm8 REG ← [REG] * sign-extended IMM

IMUL r32,imm32 REG ← [REG/MEM] * IMM

3-OPERAND

IMUL r16,r/m16,imm16 REG ← [REG/MEM] * IMM

IMUL r32,r/m32,imm8 REG ← [REG/MEM] * sign-ext. IMM

IMUL r32,r/m32,imm32 REG ← [REG/MEM] * IMM

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divides one unsigned integer operand (ACC) by another (SRC)

SRC ACC QUOTIENT REMAINDER

r/m8 AX AL AH

r/m16 DX:AX AX DX

r/m32 EDX:EAX EAX EDX

remainder is always less than the divisor in magnitude

overflow is indicated with the #DE (divide error) exception rather than with the OF flag

IDIV SRC ; QUO. & REM. [ACC] / [SRC]

divides one signed integer operand (ACC) by another (SRC)

non-integral results are truncated (chopped) towards 0

sign of the remainder is always the same as the sign of the dividend

absolute value of the remainder is always less than the absolute value of the divisor

overflow is indicated with the #DE (divide error) exception rather than with the OF (overflow) flag

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Signed Divide

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Operand is assumed to be unsigned integer.

CF flag is not affected. OF, SF, ZF, AF, and PF flags are set according to the result.

INC/DEC r/m8 Increment r/m byte by 1

INC BYTE [DATA]

INC WORD [DATA]

INC DWORD [DATA]

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CMP DEST,SRC ; [DEST] – [SRC], update FLAGS

The source operands are not modified, nor is the result saved.

The CF, OF, SF, ZF, AF, and PF flags are set according to the result (in the same manner as the SUB instruction)

NEG DEST ; DEST 0 – [DEST]

Assume a signed integer operand

CF flag set to 0 if the source operand is 0; otherwise it is set to 1

OF, SF, ZF, AF, and PF flags are set according to the result

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[REG/MEM] - IMM

CMP r/m32,imm32 Compare imm32 with r/m32

CMP r/m16,imm8 Compare imm8 with r/m16

CMP r/m32,imm8 Compare imm8 with r/m32

[REG/MEM] – [REG]

[REG] – [REG/MEM]

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CONTOH:

Binary-coded decimal integers (BCD integers) are unsigned 4-bit integers with valid values ranging from 0 to 9.

BCD integers can be unpacked (one BCD digit per byte) or packed (two BCD digits per byte).

The value of an unpacked BCD integer is the binary value of the low halfbyte (bits 0 through 3).

The high half-byte (bits 4 through 7) can be any value during addition and subtraction, but must be zero during multiplication and division.

Packed BCD integers allow two BCD digits to be contained in one byte.

Here, the digit in the high half-byte is more significant than the digit in the low half-byte.

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Decimal arithmetic can be performed by combining the binary arithmetic instructions ADD, SUB, MUL, and DIV with the decimal arithmetic instructions.

The decimal arithmetic instructions are provided to carry out the following operations:

To adjust the results of a previous binary arithmetic operation to produce a valid BCD result.

To adjust the operands of a subsequent binary arithmetic operation so that the operation will produce a valid BCD result.

Decimal arithmetic instructions operate only on both packed and unpacked BCD values.

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Packed-BCD Instructions

The DAA (decimal adjust after addition) and DAS (decimal adjust after subtraction) instructions adjust the results of operations performed on packed BCD integers.

Adding two packed BCD values requires two instructions:

an ADD instruction: adds (binary addition) the two values and stores the result in the AL register

followed by a DAA instruction: adjusts the value in the AL register to obtain a valid, 2-digit, packed BCD value and sets the CF flag if a decimal carry occurred as the result of the addition.

Subtracting one packed BCD value from another requires:

a SUB instruction: subtracts (binary subtraction) one BCD value from another and stores the result in the AL register

followed by a DAS instruction: adjusts the value in the AL register to obtain a valid, 2-digit, packed BCD value and sets the CF flag if a decimal borrow occurred as the result of the subtraction.

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AAA (ASCII adjust after addition)

converts the binary value in the AL register into a decimal value and stores the result in the AL register in unpacked BCD format

if a decimal carry occurred as a result of the addition, the CF flag is set and the contents of the AH register are incremented by 1

AAS (ASCII adjust after subtraction)

similar with AAA

AAM (ASCII adjust after multiplication)

converts the binary value in the AL register into a decimal value and stores the least significant digit of the result in the AL register and the most significant digit, if there is one, in the AH register

AAD (ASCII adjust before division)

converts the BCD value in registers AH (most significant digit) and AL (least significant digit) into a binary value and stores the result in register AL

when the value in AL is divided by an unpacked BCD value, the quotient and remainder will be automatically encoded in unpacked BCD format

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square_msg db "Square of input is ", 0

cube_msg db "Cube of input is ", 0

cube25_msg db "Cube of input times 25 is ", 0

quot_msg db "Quotient of cube/100 is ", 0

rem_msg db "Remainder of cube/100 is ", 0

neg_msg db "The negation of the remainder is ", 0

segment .bss

mov ebx, eax ; save answer in ebx

mov eax, square_msg

mov eax, cube_msg

mov eax, cube25_msg

mov ecx, 100 ; can't divide by immediate value

idiv ecx ; edx:eax / ecx

mov eax, quot_msg

mov eax, neg_msg

leave

ret

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