1 iki10230 pengantar organisasi komputer kuliah no. 04: assembly language sumber: 1. paul carter, pc...

1 IKI10230 Pengantar Organisasi Komputer Kuliah no. 04: Assembly Language Sumber: 1. Paul Carter, PC Assembly Language 2. Hamacher. Computer Organization, ed-5 3. Materi kuliah CS61C/2000 & CS152/1997, UCB 4. Intel Architecture Software Developers Manual 3 Maret 2004 L. Yohanes Stefanus ([email protected]) Bobby Nazief ([email protected]) bahan kuliah: http://www.cs.ui.ac.id/kuliah/POK/ Slide 2 2 Revisi Jadwal Kuliah TGLNOTOPIKPCHm 11-Feb1Pendahuluan, Organisasi Komputer1 18-Feb2Stored Program Computers2.1, 2.2, 2.3, 2.4 25-Feb3 Tools, Sistem Bilangan, Operasi +, - 1.16.1 03-Mar4 Assembly Language 1.3 10-Mar4,5 Assembly Language, Data Transfer Operations 17-Mar6,7 Arithmetic & Logical Operations 2.1,3.1, 3.2 24-Mar8,9,10 Control Structures, Array/String & FP Operations 2.2,5,6 31-Mar11,12 The CALL and RET Instructions, Multi-module 4.3, 4.4,4.6 07-Apr13 Interfacing Assembly with HLL, Review 4.7 14-AprUTS 21-Apr14 Compile-Assembly-Link-Load 1.4 28-Apr15,16 Micro Architecture & Control Unit 7.1-7.5 05-Mei17,18 Memori, Virtual Memory 5.1, 5.4, 5.5, 5.7 12-Mei19,20 I/O: Polling & Interrupt, Exceptions 4.1, 4.2 19-Mei21 Operasi Aritmatika: Mul & Div 6.3,6.6,6.7 26-Mei Review Slide 3 3 REVIEW Slide 4 4 Review: Pengelompokkan Bit Bit String: INTEL 4 bitnibble 8 bitbyte 16 bitword 32 bitdouble-word 64 bitquad-word Alamat lokasi memori umumnya dinyatakan dengan bilangan heksa desimal contoh: -lokasi memori 90 pada memori dengan ruang memori sebesar 64K (65536 = 2 16 ) dinyatakan dengan alamat: 0x005A -jika ruang memori sebesar 2 32 (4G) 0x0000005A Slide 5 5 Review: Penyimpanan data multi-byte (Little Endian) int j = 987700; 987700 = 0x000F1234 = 0000 0000 0000 1111 0001 0010 0011 0100 00000000 00000001 00000002 00000003 00000004 00000005 00000006 00000007 FFFFFFFF 0101 1010 Alamat (32 bit) 0000 0011 0100 0001 0010 0000 1111 0000 int i = 90; 90 = 0x5A = 0000 0000 0000 0000 0000 0000 0101 1010 i j Slide 6 6 Review: Twos Complement Numbers 0000... 0000 0000 0000 0000 two = 0 ten 0000... 0000 0000 0000 0001 two = 1 ten 0000... 0000 0000 0000 0010 two = 2 ten... 0111... 1111 1111 1111 1101 two = 2,147,483,645 ten 0111... 1111 1111 1111 1110 two = 2,147,483,646 ten 0111... 1111 1111 1111 1111 two = 2,147,483,647 ten 1000... 0000 0000 0000 0000 two = 2,147,483,648 ten 1000... 0000 0000 0000 0001 two = 2,147,483,647 ten 1000... 0000 0000 0000 0010 two = 2,147,483,646 ten... 1111... 1111 1111 1111 1101 two =3 ten 1111... 1111 1111 1111 1110 two =2 ten 1111... 1111 1111 1111 1111 two =1 ten One zero, 1st bit is called sign bit but one negative with no positive 2,147,483,648 ten Slide 7 7 Review: Sign extension Convert 2s complement number using n bits to more than n bits Simply replicate the most significant bit (sign bit) of smaller to fill new bits 2s comp. positive number has infinite 0s 2s comp. negative number has infinite 1s Bit representation hides leading bits; sign extension restores some of them 16-bit -4 ten to 32-bit: 1111 1111 1111 1100 two 1111 1111 1111 1111 1111 1111 1111 1100 two Slide 8 8 ARSITEKTUR INTEL X86: DARI PANDANGAN PEMROGRAM Slide 9 9 Register: most frequently accessed operand Processor Computer Control Datapath Registers MemoryDevices Input OutputLoad Store Registers are in the datapath of the processor; if operands are in memory, we must transfer them to the processor to operate on them, And then transfer back to memory when done Slide 10 10 Sumber Daya Komputasi: Register & Memori (64G) Slide 11 11 Sumber Daya Komputasi: Set Instruksi Data Transfersmemory-to-memory move register-to-register move memory-to-register move Arithmetic & Logicinteger (binary + decimal) or FP Add, Subtract, Multiply, Divide not, and, or, set, clear shift left/right, rotate left/right Program Sequencing & Control unconditional, conditional Branch call, return trap, return Synchronizationtest & set (atomic r-m-w) Stringsearch, translate Graphics (MMX)parallel subword ops (4 16bit add) Input/Output Transfersregister-to-i/o device move Slide 12 12 ORGANISASI MEMORI Slide 13 13 Flat Memory Model With the flat memory model, memory appears to a program as a single, continuous address space, called a linear address space. The linear address space is byte addressable, with addresses running contiguously from 0 to 2 36 - 1. An address for any byte in the linear address space is called a linear address. Slide 14 14 Segmented Memory Model With the segmented memory model, memory appears to a program as a group of independent address spaces called segments. When using this model, code, data, and stacks are typically contained in separate segments. To address a byte in a segment, a program must issue a logical address, which consists of a segment selector and an offset. The segment selector identifies the segment to be accessed and the offset identifies a byte in the address space of the segment. The programs running on an IA processor can address up to 16,383 segments of different sizes and types, and each segment can be as large as 2 36 bytes. Slide 15 15 Real-Address Mode Memory Model The real-address mode model uses the memory model for the Intel 8086 processor, the first IA processor (for backward compatibility). The real-address mode uses a specific implementation of segmented memory in which the linear address space for the program and the operating system/executive consists of an array of segments of up to 64 Kbytes in size each. The maximum size of the linear address space in real-address mode is 2 20 bytes. Slide 16 16 REGISTERS Slide 17 17 x86 Registers Program Counter (PC) Slide 18 18 General Purpose Registers GP Registers have additional, specific functions: EAXAccumulator for operands and results data. EBX Pointer to data in the DS segment. ECXCounter for string and loop operations. EDXI/O pointer. ESIPointer to data in the segment pointed to by the DS register; source pointer for string operations. EDIPointer to data (or destination) in the segment pointed to by the ES register; destination pointer for string operations. ESPStack pointer (in the SS segment). EBPPointer to data on the stack (in the SS segment). Slide 19 19 Status Register: EFLAGS Slide 20 20 Status Flags SF (bit 7) Sign flag Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) ZF (bit 6) Zero flag Set if the result is zero; cleared otherwise. CF (bit 0) Carry flag Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. OF (bit 11) Overflow flag Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. PF (bit 2) Parity flag Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. AF (bit 4) Adjust flag Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. Used in BCD arithmetic. Slide 21 21 System Flags IF (bit 9) Interrupt enable flag Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IOPL (bits 12, 13) I/O privilege level field Indicates the I/O privilege level of the currently running program or task. The current privilege level (CPL) of the currently running program or task must be less than or equal to the I/O privilege level to access the I/O address space. This field can only be modified by the POPF and IRET instructions when operating at a CPL of 0. NT (bit 14) Nested task flag Controls the chaining of interrupted and called tasks. Set when the current task is linked to the previously executed task; cleared when the current task is not linked to another task. VM (bit 17) Virtual-8086 mode flag Set to enable virtual-8086 mode; clear to return to protected mode. Slide 22 22 Segment Registers Used to hold 16-bit segment selectors CScode segment -where the instructions being executed are stored. DSdata segment ES,FS,GSextra (data) segment with possible configuration: -one for the data structures of the current module, -another for the data exported from a higher-level module, -a third for a dynamically created data structure, -a fourth for data shared with another program. SSstack segment Slide 23 23 Use of Segment Registers in Flat Memory Model The segment registers are loaded with segment selectors that point to overlapping segments, each of which begins at address 0 of the linear address space. Typically, two overlapping segments are defined: one for code (pointed to by CS) and another for data and stacks. Slide 24 24 Use of Segment Registers in Segmented Memory Model Each segment register is ordinarily loaded with a different segment selector so that each segment register points to a different segment (up to 6 segments) within the linear address space. Slide 25 25 Data Storage Slide 26 26 Storage of Fundamental Data Type Slide 27 27 Storage of Numeric Data Type Slide 28 28 PROCESSOR OPERATION MODE Slide 29 29 3 Modes of Operation Protected mode the native state of the processor all instructions and architectural features are available, providing the highest performance and capability recommended mode for all new applications and operating systems the processor can use any of the memory models ability to directly execute real-address mode 8086 software in a protected, multitasking environment: virtual-8086 mode Real-address mode provides the programming environment of the Intel 8086 processor with a few extensions the processor is placed in real-address mode following power-up or a reset only supports the real-address mode memory model System management mode provides an operating system with a transparent mechanism for implementing platform-specific functions such as power management and system security the processor enters SMM when the external SMM interrupt pin (SMI#) is activated or an SMI is received from the advanced programmable interrupt controller (APIC) in SMM, the processor switches to a separate address space while saving the entire context of the currently running program or task Slide 30 30 Protected Mode a (segment) selector value is an index into a descriptor table. the segments are not at fixed positions in physical memory. In fact, they do not have to be in memory at all! Protected mode uses a technique called virtual memory. The basic idea of a virtual memory system is to only keep the data and code in memory that programs are currently using. 16-bit: offsets are still 16-bit quantities. As a consequence of this, segment sizes are still limited to at most 64K. 32-bit: offsets are expanded to be 32-bits. This allows an oset to range up to 4 billion. Thus, segments can have sizes up to 4 gigabytes. segments can be divided into smaller 4K-sized units called pages. In Windows 3.x: standard mode referred to 286 16-bit protected mode enhanced mode referred to 32-bit mode. Windows 9X, Windows NT/2000/XP, OS/2 and Linux all run in paged 32-bit protected mode. Slide 31 31 Real Mode In real mode, memory is limited to only 1M (2 20 ) bytes. Valid address range from 0x00000 to 0xFFFFF. 20-bit address is constructed using 2 16-bit values: The first 16-bit value is called the selector, stored in segment register. The second 16-bit value is called the offset. The physical address referenced by a 32-bit selector:offset pair is computed by the formula: 16*selector + offset -multiplying by 16 in hex is easy, just add a 0 to the right of the number -for example, the physical addresses referenced by 047C:0048 is given by: 047C0 + 0048 = 04808 Slide 32 32 Contoh program dalam real-mode hello_m.asm: 1.segment.text 2...start: 3. movax,DATA 4. movds,ax 5.movdx,hello 6.movah,9 7.int0x21 8..... 9. segment DATA 10. hello:db'hello, world', 13, 10, '$ debug hello_m.exe: AX=0B3D BX=FFFF CX=FE5A DX=0000 SP=010A BP=0000 SI=0000 DI=0000 DS=0B3C ES=0B2B SS=0B3D CS=0B3B IP=000D NV UP EI PL NZ NA PO NC 0B3B:000D BA0B00 MOV DX,000B -d ds:b 0B3C:0000 68 65 6C 6C 6F hello 0B3C:0010 2C 20 77 6F 72 6C 64 0D-0A 24 00 00 00 00 00 00, world..$...... Slide 33 33 Intel x86 Assembly Program Slide 34 34 NASM Assembly-Program Format [label:]instruction operands; comment label: optional represents the address of memory location storing the instruction to be used as reference for: 1.data access 2.jump-address instruction: data transfer arithmetic & logic program sequencing & control i/o... operands: register memory immediate implied comment no comment Slide 35 35 LABEL Slide 36 36 Review: The Program is... lokasiinstruksi 00000846Add8,4,6; 8 [4] + [6] ; [8] = 61 + 17 = 78 00021686Sub6,8,6; 6 [8] [6] ; [6] = 78 17 = 61 can be represented by labels Slide 37 37 Label Label: Valid characters in labels are: -letters, numbers, _, $, #, @, ~,., and ? The only characters which may be used as the first character of an identifier are: -letters,. (period), _, ? -A label beginning with a single period is treated as a local label, which means that it is associated with the previous non-local label. So, for example: label1 ; some code.loop ; some more code jne.loop ret label2 ; some code.loop ; some more code jne.loop ret Slide 38 38 Contoh: label dalam tugas0a.asm* 1.segment.data 2.data1db 11h 3.data2dw 2222h 4.data3dd 33333333h 5.datatmp times 9 db 0ffh 6.segment.bss 7.stacksresd 1 8.segment.text 9. global _asm_main 10._asm_main: 11. mov eax,10; decimal number, value = 10 12. mov edx,eax; register-to-register transfer 13. mov esi,data1; esi points to data1 18. mov al,[esi]; indirect memory access, load 1 byte 19.mov bx,[esi]; indirect memory access, load 1 word 20. mov ecx,[esi]; indirect memory access, load 1 double-word 21.mov edi,[data3]; direct memory operand Slide 39 39 INSTRUCTIONS Slide 40 40 Review: Bahasa Mesin Bahasa Rakitan 0846:Add(8),(4),(6) Bahasa Mesin kumpulan bit yang merepresentasikan Operasi & Operand Bahasa Rakitan representasi dari Bahasa Mesin dalam bahasa (kumpulan huruf & angka) yang lebih mudah dimengerti oleh manusia mnemonic 8 [4] + [6] Bahasa Mesin Bahasa Rakitan Register Transfer Notation Slide 41 41 Register Transfer Notation Notasi yang menggambarkan proses pertukaran data yang terjadi pada eksekusi instruksi: arah: dari sumber ke tujuan operasi: +, -, Sumber/Tujuan Data: Register Memori I/O Device Nilai/content dari sumber data dinyatakan dengan [sumber-data] Contoh: Pertukaran data: Move R1,LOC R1 [LOC]; isi lokasi memori Loc di- ; copy-kan ke register R1 Operasi: Add R3,R1,R2 R3 [R1] + [R2]; isi register R1 dijumlahkan ; dengan isi register R2, ; hasilnya disimpan di ; register R3 Slide 42 42 Review: Jumlah Operand Kelas Set Instruksi 3-address instruction AddC,A,B ; C A] + [B] OperationDestination,Source1,Source2 atau OperationSource1,Source2,Destination 2-address instruction AddA,B ; A A] + [B] OperationDestination,Source 1-address instruction LoadB; acc B AddA ; acc acc] + [A] 0-address instruction PushB; tos B PushA; tos A; [next] = B Add ; tos tos] + [next] Format Instruksi Intel x86 Slide 43 43 Instruction Format Ukuran instruksi [n] bervariasi: 1 n 16 byte 0, 1, 2, 3, 4 1, 2 0,1 0,1 0, 1, 2, 3, 4 0, 1, 2, 3, 4 Prefix: (Lock, Repeat), Overrides: Segment, Operand Size, Address Size ModR/M: Addressing Mode SIB: Scale, Index, Base Displacement: Displacements Value Immediate: Immediates Value Konvensi:OPcode dst,src; dst [dst] OP [src] Contoh: MOV EAX,EBX; register MOV EAX,[DATA]; displacement MOV EAX,0x10; immediate REP MOV EDX,EAX; prefix: REP MOV EAX,[EBP+4*ESI+Offset]; base+index*scale+displacement... PrefixDisplacementImmediate SIB Opcode Mod R/M Slide 44 44 OPERANDS Slide 45 45 Register refers to the data (content) of a register mov eax,ebx 89 d8 Immediate refers to a fixed value that is hard-coded into the instruction itself mov eax,0x10 b8 10 00 00 00 Memory refers to the data (content) of a memory location mov eax,[data]; eax [data] (direct memory access) a1 d0 92 00 00; data is located at 0x000092d0 mov eax,[ebx]; eax [[ebx]] (indirect memory access) 8b 03; data location = [ebx] Operand Addressing 100 EBX EAX 100 EAX 0xb8 0x00000010 Slide 46 46 (Direct) Memory Operand DATADD0x0000FFFF... MOVEAX,[DATA] ; EAX [DATA] MOVEAX,[0x000090D0]; EAX [0x000090D0] DATA = 0x000092D0 MOV EAX,[DATA] 0x0000FFFF EAX 0x0000FFFF Slide 47 47 (Indirect) Memory Operand DATADD0x0000FFFF... MOVEBX,DATA; EBX DATA=0x000092D0 MOV EAX,[EBX]; EAX [[EBX]] 0x00009200 0x000092D0 0x0000FFFF MOV EAX,[EBX] EBX EAX 0x0000FFFF 0x000092D0 MOV EBX,DATA Slide 48 48 Register Operands Source and destination operands can be any of: 32-bit GP registers: EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP 16-bit GP registers: AX, BX, CX, DX, SI, DI, SP, BP 8-bit GP registers: AH, BH, CH, DH, AL, BL, CL, DL segment registers: CS, DS, SS, ES, FS, GS EFLAGS register system registers: GDTR (global descriptor table), IDTR (interrupt descriptor table register) Some instructions (DIV & MUL) use quadword operands contained in a pair of 32-bit registers. EDX:EAX EDX: high-order dword, EAX: low-order dword Contoh: mul ebx; edx:eax [eax] * [ebx] Slide 49 49 Contoh: register-operand dalam tugas0a.asm* 1.segment.data 2.data1db 11h 3.data2dw 2222h 4.data3dd 33333333h 5.datatmp times 9 db 0ffh 6.segment.bss 7.stacksresd 1 8.segment.text 9. global _asm_main 10._asm_main: 11. mov eax,10; decimal number, value = 10 12. mov edx,eax; register-to-register transfer 13. mov esi,data1; esi points to data1 18. mov al,[esi]; indirect memory access, load 1 byte 19.mov bx,[esi]; indirect memory access, load 1 word 20. mov ecx,[esi]; indirect memory access, load 1 double-word 21.mov edi,[data3]; direct memory operand Slide 50 50 Immediate Operands The maximum value allowed for an immediate operand varies among instructions, but can never be greater than the maximum value of an unsigned doubleword integer (2 32 ). Numeric mov eax,100 ; decimal add eax,0a2h ; hex and eax,0xa2 ; hex again imul eax,ebx,242q ; octal push 01010011b; binary Character mov eax,'abcd' All arithmetic instructions (except DIV & IDIV instructions) allow the source operand to be an immediate value. abcd Slide 51 51 Contoh: immediate-operand dalam tugas0a.asm* 1.segment.data 2.data1db 11h 3.data2dw 2222h 4.data3dd 33333333h 5.datatmp times 9 db 0ffh 6.segment.bss 7.stacksresd 1 8.segment.text 9. global _asm_main 10._asm_main: 11. mov eax,10; decimal number, value = 10 12. mov edx,eax; register-to-register transfer 13. mov esi,data1; esi points to data1 18. mov al,[esi]; indirect memory access, load 1 byte 19.mov bx,[esi]; indirect memory access, load 1 word 20. mov ecx,[esi]; indirect memory access, load 1 double-word 21.mov edi,[data3]; direct memory operand Slide 52 52 Memory Operands (1/2) The Effective Address of memory operands are computed by means of a segment selector and an offset. The segment selector can be specified either implicitly or explicitly: the most common method of specifying a segment selector is to load it in a segment register and then allow the processor to select the register implicitly, depending on the type of operation being performed. Default Segment Selection Rules: CS: instruction fetches JMP _MAIN SS: stack pushes & pops; references using ESP & EBP PUSH EAX DS: data references, except when relative to stack MOV EAX,[DATA] ES: destination of string operations Slide 53 53 Memory Operands (2/2) Offset calculation: [Base] + [Index]*Scale factor + Displacement Displacement:An 8-, 16-, or 32-bit value. Base:the value in a general-purpose register. Index:the value in a general-purpose register. Scale factor:a value of 2, 4, or 8 that is multiplied by the index value. 8 4 Slide 54 54 Contoh: memory-operand dalam tugas0a.asm* 1.segment.data 2.data1db 11h 3.data2dw 2222h 4.data3dd 33333333h 5.datatmp times 9 db 0ffh 6.segment.bss 7.stacksresd 1 8.segment.text 9. global _asm_main 10._asm_main: 11. mov eax,10; decimal number, value = 10 12. mov edx,eax; register-to-register transfer 13. mov esi,data1; esi points to data1 18. mov al,[esi]; indirect memory access, load 1 byte 19.mov bx,[esi]; indirect memory access, load 1 word 20. mov ecx,[esi]; indirect memory access, load 1 double-word 21.mov edi,[data3]; direct memory operand Slide 55 55 Contoh: memory-operand [base+index*scale+disp] struct Point { int x; int y; } p[ ] = { {0,0}, {1,1} }; for (i=0; i: Bit Shift Operators > g"> 68 Operators |: Bitwise OR Operator bitwise OR ^: Bitwise XOR Operator bitwise XOR &: Bitwise AND Operator bitwise AND >: Bit Shift Operators > gives a bit-shift to the right in NASM, such a shift is always unsigned + and -: Addition and Subtraction Operators do perfectly ordinary addition and subtraction *, /, //, % and %: Multiplication and Division * is the multiplication operator / is unsigned division and // is signed division % and % provide unsigned and signed modulo operators Unary Operators: +, -, ~ and SEG - negates its operand + does nothing (it's provided for symmetry with -) ~ computes the one's complement of its operand SEG provides the segment address of its operand Slide 69 69 Contoh: expressions dalam tugas0a.asm* 1.segment.data 2.data1db (1