tlcs-870/c series assembler programmer's...

TOSHIBA

TLCS-870/C Series Assembler Programmer's Guide

4th Edition

Toshiba Corporation Semiconductor Company

PA1E-03

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Preface

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prefaceE-02

Preface

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Preface

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Preface

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Contents

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Contents

Part 1 Getting Started---------------------------------------------------------------------1

Chapter 1 Application Software Development---------------3 1.1 Development of Microcomputer Application Systems---------- 3 1.2 Features of Assembly Language ----------------------------------- 4 1.3 Development Tool and Assemble Flow -------------------------- 6

Chapter 2 Overview of Usage -----------------------------------8 2.1 Setting Environment ------------------------------------------------ 8 2.2 Options---------------------------------------------------------------- 8 2.3 How to make HEX file --------------------------------------------- 9

2.3.1 Assemble of Sample Program ---------------------------11 2.3.2 Linking Sample Program---------------------------------12 2.3.3 Making HEX file ------------------------------------------13

Part 2 Advanced Programming Technique----------------------------------------- 15

Chapter 1 Notes on the Specification ------------------------- 17 1.1 Notes on the TLCS-870/C,C1 Specification---------------------17

1.1.1 Memory Space---------------------------------------------17 1.1.2 Notes on Program Status Words (PSW) ---------------18 1.1.3 Notes on Machine Instructions --------------------------18 1.1.4 Notes on I/O -----------------------------------------------19

1.2 Unique Feature of ASM870C-------------------------------------20 1.2.1 Default attribute -------------------------------------------20 1.2.2 J Instructions-----------------------------------------------20 1.2.3 CALL Instruction -----------------------------------------23 1.2.4 PUSH/POP Instruction -----------------------------------23

1.3 Notes on Programing-----------------------------------------------24 1.3.1 Setting SP(Stack pointer) --------------------------------25 1.3.2 RAM Clear-------------------------------------------------26 1.3.3 Definitions of I/O -----------------------------------------26 1.3.4 Description of interrupt vector table--------------------27

1.4 Notes on Linking ---------------------------------------------------27 1.5 Necessary Requirement when using Debugger-----------------29

Chapter 2 Programming Technique ------------------------- 30 2.1 Object Code Reduction --------------------------------------------30

2.1.1 Designing Data area --------------------------------------30 2.1.2 Link command file ----------------------------------------30

Contents

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2.1.3 Using CALLV--------------------------------------------- 30 2.2 Tips of Efficient Programming------------------------------------ 31

2.2.1 Dividing Program----------------------------------------- 31 2.2.2 Use of Symbol -------------------------------------------- 31 2.2.3 Use of Relocatable object-------------------------------- 32 2.2.4 Use of Other Tools --------------------------------------- 33

2.3 Practical using of Linker ------------------------------------------ 34 2.3.1 Complicate memory allocation -------------------------- 34 2.3.2 How to solve link error ----------------------------------- 35

Appendix ----------------------------------------------------------------------------------- 37

Appendix A History ---------------------------------------------- 39

Part 1 Getting Started

Chapter 1 Application Software Development

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1.1 Development of Microcomputer Application Systems

The development of software for control systems play an important role in the development of systems using microcomputers. Supporting such software development are the language processors such as compilers and assemblers, and debuggers. Figure 1.1 shows the tools used and the development stages.

System design

C Compiler/Assembler

Editor/Case tool

Source level debugger Realtime emulator

Linker

Simulator

Realtime OS Hardware design Software design

Circuit design

Link

Software debugging

Hardware debugging

Hardware manufact ure Assemble/Compile

System debugging

Coding

Figure 1.1 Microcomputer Application System Development Process

As shown in the figure, each part of the process requires a development support tool. This tool is responsible for the software creation part of the development process. That is, it assembles the program code to create object programs in a format for debugging or for writing to ROMs. If the program code contains errors or the objects cannot be allocated correctly into memory, the Assembler/Linker outputs the appropriate error messages to a listing file or to the console. The developer must repeat the coding, assembling, linking process until no assembling, linking errors occur.


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1.2 Features of Assembly Language

Programming Language In program development, a programming language must be used to write the source programs. Programming languages can broadly be classified into high-level languages, intermediate-level language, and basic-level language, as follows:

High-level languages: C, Fortran, Pascal Basic-level language: Assembly language

We support the high-level C language, and the basic-level assembly language for TLCS-870/C,C1.

Features of High-Level Languages The high-level languages allow programs to be written using words that are familiar in our daily lives, and are indispensable for writing large programs. Advantages of High-level languages are as follows.

Easy portability to other MCUs Structured programming for ease of reading/writing Reduced number of source steps for shorter development times High Re-usability Easy maintenance void function_1 () /* addition from 1 to 100 */ { int value1,count1; for (value1=0,count1=1; count1<=100; count1++) { value1+=count1; } }


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Features of Basic-level Languages In the basic-level languages, programming is much closer to the hardware level and therefore ideal for programs requiring faster execution speed for built-in control or those requiring more efficient use of memory.

Good object efficiency Fast object execution

work_data section data small value1 dsw 1 count1 dsw 1 addition section code ; addition from 1 to 100 start: ld wa,0 ld bc,1 loop: add wa,bc inc bc cmp bc,100 j le,loop ld (count1),bc ld (value1),wa end


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1.3 Development Tool and Assemble Flow

The TLCS-870/C,C1 Assembler includes the following development tools.

Driver (cc870c) Macro Preprocessor (tumpp) Assembler (asm870c) Linker (tulink) Librarian (tulib) Object Converter (tuconv)

These tools operate according to the flow of Figure 1.2. For the details of each tool, see "TLCS-870 Family Language Tools Operation Guide."


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Execution controlled by driver Program flow

Source Program Containing macro language

Macro Preprocessor TUMPP

Macro listingAssembler Source program

Assembler listing

Relocatable object

LibrarianTULIB

Library

Absolute objectLink map

(.abs)(.map)

(.lib)

(.lst)(.rel)

(.asm)(.med)

(.mac)

S Format object

(.sXX)

iHEX object

(.hXX)

AssemblerASM870C

Driver CC870C

Linker TULINK

Object ConverterTUCONV

Figure 1.2 Development Tool Flow


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Chapter 2 Overview of Usage

2.1 Setting Environment

Environment Variables [Important] It is necessary to set the following environment variables.

Table 2.1 Environment Variables Environment Variables Contents THOME870C Path name in which this compiler is installed PATH Add Path name /bin in which this compiler is

installed TMP Path name of existing directory

For the details of Environment setting, see "TLCS-870 Family Language Tools Operation Guide."

2.2 Options

Options Options that is often used in this Assembler are as follows. For the details, see "TLCS-870 Family Language Tools Operation Guide."

Table 2.2 Options Options Contents -l Creates Assembler listing file (.lst) -O<level> Specifies optimization level(0-1) -g Outputs debug information. Necessary for source level

debugging. -e <level> Outputs Error message to <file name> -f <level> Specifies Option list file.


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2.3 How to make HEX file

This chapter explains the procedure to make HEX file from the Assembler source files as described the examples of sample programs without using IDE. Generally application program to control the microcomputer is written into ROM by HEX file. Note that the sample programs are provided to explain the assemble procedure and have no special function in terms of a program. We therefore do not guarantee that they will run.

Sample program No.1 sam_code.asm

$include"sample.h" ; Include header file addition section code medium ; Start of program ; addition from 1 to 100 start: ld wa,ZERO ld bc,STEP loop: add wa,bc inc bc cmp bc,100 j le,loop ld (count1),bc ld (value1),wa end ; End of program

Sample program No.2 sam_data.asm

public value1,count1 ; Public symbol define work_data section data medium ; Start of data area value1 dsw 1 ; Data "value1" define count1 dsw 1 end

Header file sample.h

extern medium value1,count1 ; External symbol define ZERO equ 0 ; Symbol "ZERO" define STEP equ 1

Link command file lnc64.lcf

memory { SFR1 : org=0x0000 , len=0x0040 data.s : org=0x0040 , len=0x00c0 data.m : org=0x0040 , len=0x0300 SFR3 : org=0x0e40 , len=0x00c0 SFR2 : org=0x0f00 , len=0x0100 code.m : org=0xc000 , len=0x3fa0 CALLV_VECT : org=0xffa0 , len=0x0020 INT_VECT : org=0xffc8 , len=0x0038


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}

Execute Command Inputting the following commands make HEX file according to the sample program. In this case, HEX file is outputted by the file name of “samp.h16”.

asm870c -l -g sam_code.asm asm870c -l -g sam_data.asm tulink -la -ga -o samp.abs sam_code.rel sam_data.rel lnc63.lcf tuconv samp.abs


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2.3.1 Assemble of Sample Program

To make HEX file from Sample program, assemble two source programs first.

Execution of Assembler Assemble of “sam_code.asm” (Command 1)

asm870c -l -g sam_code.asm

Assemble of “sam_data.asm” (Command 2)

asm870c -l -g sam_data.asm

Specify command, option and source file separating by spaces in

order. Specify one source file name. Various function can be used by specifying option switches.

Output file Executing “asm870c” command, the following file can be created.

(1)In case of Command 1 sam_code.rel: Relocatable object sam_code.lst: Assembler listing

(2)In case of Command 2

sam_data.rel: Relocatable object sam_data.lst: Assembler listing

Relocatable object (.rel) This is the object file that is not determined the address. Linking this file can be determined the address. When debugging using by the debugger, the debug information must be outputted by ‘-g’ option.

Assembler listing (.lst)

This is the information file that is outputted by specifying ‘-l’ option. The detected errors, symbol information and object code at the time of assembling are described.


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2.3.2 Linking Sample Program

Next, link the relocatable object to determine the address.

Execution of Linker tulink -la -ga -o samp.abs sam_code.rel sam_data.rel lna86.lcf

Specify command, option and file separating by spaces in order. Specify all file names and link command file (.lcf) to be linked. For

the details of the link command file, see the "TLCS-870 Family Assembler Language Reference".

Various function can be used by specifying option switches.

Output file Executing this command, the following two files are created. samp.abs : Absolute object samp.map: Link map

Absolute object (.abs)

This is the object file that the relocatable address has been determined, which is used by the debugger. By selecting of option ‘-o’, the file name is specified. The file takes the name of “samp.abs” here.

Link map (.map)

This is the output information file by selecting of option ‘-la’. The detected errors and symbol information at the time of linking are described.


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2.3.3 Making HEX file

After debugging by using the debugger, the absolute object must be converted to a format suitable for the PROM writer. The object converter converts the absolute object into Intel HEX format object code.

Execution of Converter tuconv samp.abs

Specify command, option and file separating by spaces in order. When executing command without options, it converts the absolute

object into Intel HEX format. Specifying the option switch enables outputting in other formats.

Output file Executing this tuconv command creates the following files.

samp.h16: Intel HEX format object

Intel HEX format object (.h16) This is the one of the object format to be usable by EPROM writer.

For example, the output result of HEX file to be made in executing this procedure is as follows. Intel HEX format object samp.h16

:10C00000480000490100E98131E96F6400DCF7F183 :07C01000020169F100016863 :00000001FF


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Part 2 Advanced Programming Technique

Chapter 1 Notes on the Specification

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Chapter 1 Notes on the Specification This chapter explains the original specification of TLCS-870/C

Assembler. For the common specification of Toshiba Assembler, refer to the “Assembler Language Reference.”

1.1 Notes on the TLCS-870/C,C1 Specification

1.1.1 Memory Space

The memory space of the TLCS-870/C,C1 is 64K bytes in address range from 0x0 to 0xffff. For this reason, the specification is different from the common specification of Toshiba’s Assembler. Useable section type, attribute and address in section directive are as

follows:

Section type Attribute Address range

data small 0x0 - 0xff

medium 0x0 - 0xffff

romdata medium 0x0 - 0xffff

code medium 0x0 - 0xffff

Useable attribute in extern directive are medium or small. Useable pre-defined memory names in Link command file are as

follows:

Input section type Attribute pre-defined memory names

data small data.s

medium data.m

romdata medium romdata.m

code medium code.m

When selecting the fixed address allocation with the section directive and when selecting the address allocation by the link command file, the address range of over 0x10000 cannot be selected.


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1.1.2 Notes on Program Status Words (PSW)

PSW The PSW consists of six flags, JF, ZF, CF, HF, SF and VF. And the PSW is assigned to address 0x3f in the SFR. Following “PSW Access Instructions” are used for accessing to PSW.

LD PSW, 0x0 ; write 0x00 to PSW PUSH PSW ; save PSW value to stack POP PSW ; restore PSW value from stack

1.1.3 Notes on Machine Instructions

LD SP, SP + d In machine instruction of TLCS-870/C,C1, d ( 8 bit displacement ) is taken sign extend, and taken the value between -128 to 127. However please note that the following two instructions cannot be taken sign extend.

LD SP, SP + d ; d is between 0 to 255 LD SP, SP - d ; d is between 0 to 255


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1.1.4 Notes on I/O

Read Modify Write Don’t use any read-modify-write instruction for manipulation of write-only-registers or interrupt-latches. When set the value to such I/O, write the whole of I/O by using data transfer instruction (LD). If you need arithmetic-operation for such I/O, copy the value of I/O to temporary RAM, and use it.

Bit Set There are some I/O which has limitation of bit situation such as “SYSCR2” of TMP86CH06. The limitation is “don’t clear bit-7 to 0 when bit-5 equal 0”. When set the value to such I/O, don’t write the whole of I/O by using data transfer instruction (LD). Use bit manipulation instruction.

LD (_SYSCR2),192 ;no good

SET (_SYSCR2).7 ;OK SET (_SYSCR2).6 ;OK CLR (_SYSCR2).5 ;OK


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1.2 Unique Feature of ASM870C

1.2.1 Default attribute

When attribute is omitted in “section” directive or “extern” directive, the attribute becomes the ”medium” attribute.

SEC1 section code ; medium section extern pub_sym ; medium symbol

1.2.2 J Instructions

The ASM870C provides the J instruction to make the jump effectively. When describing this command, the ASM870C will select the optimum Jump instruction from JP JR JRS instructions. When using the J instruction, you do not need to consider the jump distance, therefore, there is no possibility of a failure occurring at linking stage due to an address which is outside the range.

J address ; it is expanded to one of JP JR JRS instructions.

Optimization conditions To optimize the J instruction in the ASM870C, the following

conditions must be satisfied. When optimizing is executed, it is converted to the shortest instructions of JRS,JR,JP or those combination. If optimizing is not executed, ASM870C selects the longest instruction. Condition 1 Jump destination is $+ constant (constant is not the relocatable symbol)

Condition 2 Label within the same section of the same module can be optimized.


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Optimization options In ASM870C, there are two levels of the optimization options, ‘-O0’, ‘-O1’. When omitting the optimization options, ‘-O1’ is regarded as the specified option. -O0 The jump to the label of backward/forward reference addressing

satisfied the above condition 1 and condition 2 is optimized. -O1 Everything that satisfies with condition 1 or condition 2 is optimized. When the JP or J instruction which is expanded in the JP instruction, or the J instruction exists in the destination of the JP instruction and the Assembler expands it from the J instruction to JRS T, adr , the phenomena will occur.

J 0xc100 ; Jump to 0xc100 ; However, the jump flag does not stand by this jump

; because it is expanded to JP. J mn ; address 0xc100 ; When this line is expanded to JRS T, adr, it does not ; jump because the jump flag has not standed. ; It can be jumped when expanding JR, JP. However, ; when using the symbol, not the jump to the direct ; value, this J does not expand to JRS, thus, there is no ; such problem.


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Figure 2.1 J instruction/General Jump instruction by Optimization Options

Machine Instruction after expanding j Insgruction

-O0 -O1

forward jp address or

jr address j address

backward jp address

jp address or

jr address

forward

jrs T/F,

address or

jr T/F, address j T/F, address

backward jrs F/T, $+4

jp address

jrs T/F,addressor

jr T/F, addressor

jrs F/T, $+4

jp address

forward jr cc, address

j cc, address backward

jr not cc, $+5

jp address

jr cc, address or

jr not cc, $+5

jp address

j gg jp gg

j (x) jp (x)

j (vw) jp (vw)

j (src) jp (src)

gg 16 bit register x 8 bit register vw 16 bit register src source memory

(DE), (HL), (IX), (IY), (+SP), (HL+C), (IX+d), (IY+d), (SP+d), (HL+d), (PC+A)


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1.2.3 CALL Instruction

In the ASM870C, describing the CAL instruction converts the CALL instruction automatically. However, this conversion does not especially make the code size small.

CAL address ; same to CALL address

1.2.4 PUSH/POP Instruction

The ASM870C enables to describe the PUSH/POP instruction of 8 bit register that does not exist in the machine instruction. These instructions convert to the LD instructions automatically. With this conversion, the code size does not make especially small. Note that the PUSH/POP instruction are displayed as the LD instruction in debugger.

PUSH A -> LD (SP-),A PUSH W -> LD (SP-),W PUSH C -> LD (SP-),C PUSH B -> LD (SP-),B PUSH E -> LD (SP-),E PUSH D -> LD (SP-),D PUSH L -> LD (SP-),L PUSH H -> LD (SP-),H POP A -> LD A,(+SP) POP W -> LD W,(+SP) POP C -> LD C,(+SP) POP B -> LD B,(+SP) POP E -> LD E,(+SP) POP D -> LD D,(+SP) POP L -> LD L,(+SP) POP H -> LD H,(+SP)


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1.3 Notes on Programing

Please remind the followings at designing the application program. (1) Setting SP(Stack pointer) (2) RAM Clear (3) Definitions of I/O (4) Description of interrupt vector table

<stc89_64.asm> ;*************************************************************** ;* Sample Start up Program for TLCS-870/C1 Series * ;* Revision: 1.00 * ;*-------------------------------------------------------------* ;* (C)Copyright TOSHIBA CORPORATION 2007 All rights reserved * ;*************************************************************** ;=============================================================== ; [ External symbol declaration ] ;=============================================================== extern medium __RAM_Top, __RAM_End extern medium __BaseSP extern small __TDataAddr,__TDataOrg ,__TDataSize extern medium __NDataAddr,__NDataOrg ,__NDataSize extern medium _WDCTR,_WDCDR,_IL extern medium _main ;=============================================================== ; [ Start Up Routine ] ;=============================================================== StartUp section code medium public _startup _startup: ;---[ Disable interrupt ]----------------------------------------- di ;---[ Disable Watchdog Timer(WDT) ]------------------------------- ld (_WDCTR),0x86 ld (_WDCDR),0xB1 ;---[ Setting Stack Pointer ]------------------------------------- ld SP,__BaseSP ;---[ RAM clear ]------------------------------------------------- ld IX,__RAM_Top ld IY,__RAM_End-__RAM_Top ram_clear: ld (IX),0 inc IX dec IY j F,ram_clear


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;---[ Initialize of t_data section : Using as the need arises. ]-- ld IX,__TDataOrg ld IY,__TDataAddr ld A,__TDataSize dec A j T,non_t_data move_t_data: ld C,(IX) ld (IY),C inc IX inc IY dec A j F,move_t_data non_t_data: ;---[ Initialize of n_data section : Using as the need arises. ]-- ld IX,__NDataOrg ld IY,__NDataAddr ld WA,__NDataSize dec WA j T,non_n_data move_n_data: ld C,(IX) ld (IY),C inc IX inc IY dec WA j F,move_n_data non_n_data: ;---[ Jump to main program ]-------------------------------------- ld HL,_IL ldw (HL),0x0 ei j _main end ;/*-eof-*/

1.3.1 Setting SP(Stack pointer)

The SP value should be set before the occurrence of interrupt and subroutine call. If it doesn’t be set, Micro computer will runaway. Generally, the highest RAM address should be set. The value of "__BaseSP" of this example is set up by the link command file.

;---[ Setting Stack Pointer ]------------------------------------- ld SP,__BaseSP


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1.3.2 RAM Clear

RAM area does not initialized hardware-wise. RAM area should be clear before used. This subroutine clears RAM to use the data area.

;---[ RAM clear ]------------------------------------------------- ld IX,__RAM_Top ld IY,__RAM_End-__RAM_Top ram_clear: ld (IX),0 inc IX dec IY j F,ram_clear

ROM area( t_data, n_data ) is initialized by transmitting the initial value in ROM area to RAM area. The example about initialization of n_data is shown below. __NDataOrg, __NDataAddr, __NDataSize express the address of a transmitting agency, and the address of a transmission place, and the transmission size, and they are set up by the link command file.

;---[ Initialize of n_data section : Using as the need arises. ]-- ld IX,__NDataOrg ld IY,__NDataAddr ld WA,__NDataSize dec WA j T,non_n_data move_n_data: ld C,(IX) ld (IY),C inc IX inc IY dec WA j F,move_n_data non_n_data:

1.3.3 Definitions of I/O

The TLCS-870/C,C1 Series uses the memory mapped I/O system, and all peripheral control and data transfers are performed through the special function register(SFR). For example, they are watch dog timer, system clock, I/O port, etc. Needed kind and preset value of a register change with applications to create. Please refer to the "data sheet" of each microcomputer for the details of SFR.


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1.3.4 Description of interrupt vector table

Describe the interrupt/reset vector table. Define the vector table as absolute const section. These vector store a reset start address and interrupt service routine entry address. When writing vectors for un-used interrupts, create a dummy function ( only return ) and write that function name. This sample, the head address of an interrupt vector table "INT_VECTOR" is set up by link command file.

/*============================================ [ Define interrupt table ] This part must be rewrite. ============================================*/ #pragma section const INT_VECTOR void * const IntTbl[] = { Int_dummy, /* 0xffc8 : INTTXD2 */ Int_dummy, /* 0xffca : INTRXD2 */ Int_dummy, /* 0xffcc : INTTC03 */ Int_dummy, /* 0xffce : INTTC02 */ Int_dummy, /* 0xffd0 : INTTXD1 */ Int_dummy, /* 0xffd2 : INTRXD1/INTSIO1 */ Int_dummy, /* 0xffd4 : INTTCA1 */ Int_dummy, /* 0xffd6 : INT4 */ Int_dummy, /* 0xffd8 : INT3 */ Int_dummy, /* 0xffda : INT2 */ Int_dummy, /* 0xffdc : INT1 */ Int_dummy, /* 0xffde : INT0 */ Int_dummy, /* 0xffe0 : INTSBI0/INTSIO0 */ Int_dummy, /* 0xffe2 : INTTCA0 */ Int_dummy, /* 0xffe4 : INTTC01 */ Int_dummy, /* 0xffe6 : INTTC00 */ Int_dummy, /* 0xffe8 : INTRTC */ Int_dummy, /* 0xffea : INTADC */ Int_dummy, /* 0xffec : INTVLTD */ Int_dummy, /* 0xffee : INT5 */ Int_dummy, /* 0xfff0 : INTTXD0 */ Int_dummy, /* 0xfff2 : INTRXD0/INTSIO0 */ Int_dummy, /* 0xfff4 : INTTBT */ Int_dummy, /* 0xfff6 : INTWUC */ Int_n_dummy, /* 0xfff8 : INTWDT */ (void *)0xffff, /* 0xfffa : */ Int_n_dummy, /* 0xfffc : INTSWI/INTUNDEF */ startup /* 0xfffe : RESET */ }; #pragma section const

1.4 Notes on Linking

The Linker runs according to the command in the Link Command file. Please use it after modifying , according as the target MCU memory map. Specify the start address of each area to “org=”, and the size of each area to “len=”.


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<lnc89_64.lcf> /*************************************************************** ;* Sample Link Command File for TLCS-870/C1 Series * ;* Revision: 1.00 * ;*-------------------------------------------------------------* ;* (C)Copyright TOSHIBA CORPORATION 2007 All rights reserved * ;**************************************************************/ memory { SFR1 : org=0x0000 , len=0x0040 data.s : org=0x0040 , len=0x00c0 data.m : org=0x0040 , len=0x0300 SFR3 : org=0x0e40 , len=0x00c0 SFR2 : org=0x0f00 , len=0x0100 code.m : org=0xc000 , len=0x3fa0 CALLV_VECT : org=0xffa0 , len=0x0020 INT_VECT : org=0xffc8 , len=0x0038 } sections { tiny_area org=0x0040 : {*(t_area)} tiny_data org=0xc000 addr=org(tiny_area)+sizeof(tiny_area) : {*(t_data)} near_area org=addr(tiny_data)+sizeof(tiny_data) : {*(n_area)} near_data org=org(tiny_data)+sizeof(tiny_data) addr=org(near_area)+sizeof(near_area) : {*(n_data)} callv_table org=0xffa0 : {*(v_const)} int_table org=0xffc8 : {*(INT_VECTOR)} } __RAM_Top = 0x40; __RAM_End = 0x33f; __BaseSP = 0x33f; __TDataAddr = addr(tiny_data); __TDataOrg = org(tiny_data); __TDataSize = sizeof(tiny_data); __NDataAddr = addr(near_data); __NDataOrg = org(near_data); __NDataSize = sizeof(near_data); /*-eof-*/

To check up if the memory of program and the actual microcomputer’s memory is matched, the link command should be described correctly first.


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1.5 Necessary Requirement when using Debugger

(1) Setting Watch dog timer Do not to use the watch dog timer when using the debugger.

(2) Additional to debugger option If you use source level debugger, add the option -g at starting up ASM870C, and add the option -ga at starting up TULINK. Specify only -g when executing whole debugging including the link in CC870C.


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Chapter 2 Programming Technique

2.1 Object Code Reduction

The reduction of object can be done by designing the data allocation well. The following techniques are examples.

2.1.1 Designing Data area

Place the data which is frequently accessed with direct addressing mode to the data space in small area. To access to small area directly, the machine instructions which the code size is small can be used.

LD (x), n ;direct access to small area(3bytes) LD (vw), n ;normal access(5bytes)

2.1.2 Link command file

At the MEMORY definition in the link command file, define data.s to be on top of data.m. If there is any space in data.s area, place data.m immediately after data.s.

memory { SFR1 : org=0x0000 , len=0x0040 data.s : org=0x0040 , len=0x00c0 data.m : org=0x0040 , len=0x0300 SFR3 : org=0x0e40 , len=0x00c0 SFR2 : org=0x0f00 , len=0x0100 code.m : org=0xc000 , len=0x3fa0 CALLV_VECT : org=0xffa0 , len=0x0020 INT_VECT : org=0xffc8 , len=0x0038 }

2.1.3 Using CALLV

The CALLV instruction increases memory efficiency when utilized for frequently used subroutine calls(called from 3 or more locations).

CALLV n ;vector call(1bytes) CALL mn ;normal call(3bytes)


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2.2 Tips of Efficient Programming

2.2.1 Dividing Program

Division of Modules The advantage of dividing module is to reduce the assemble time. When modifying a module, the only module is reassembled and the rest of the module that is not to be modified can be used the object that has already created. Tips when dividing module are as follows.

To divide files according to functions. To define the data in the module if the data uses only in the module. To gather Numerical definition which shares with plural modules

(EQU command) and external reference (EXTERN) into one header file and include them in each module.

Don’t write program (code) into include file. Write into the other assembler source file and link it.

2.2.2 Use of Symbol

If describing the direct value and address directly in programming, the program may be trouble to maintain. You can create the program easy to maintain using symbols. The following types of symbols can be recommended.

Type of Symbols Label Specify at the line of the machine instruction, and actually indicates the address. Used in Jump instructions, etc.

Valuables name Defines with data definition pseudo instruction, and actually indicates the address. Used at accessing data.

EQU symbol Symbols that defined with EQU instruction. Used to obviate the need to specify a value.


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Referencing Symbols from other Modules When a symbol is defined and only referenced within one module, assembling can be performed successfully. However, a source program consists of multiple modules, mutual referencing of symbols across module boundaries will occur. Because the modules are assembled individually, “External Definition” and “External Reference” are required for exchanging information between those modules.

Public Declaration(External Definition) of Symbols Public declaration enables symbols defined in one module to be referenced from another module. The symbols declared are called as external definition symbols. The “public” pseudo instruction is used to declare external definition symbols.

public Symbol Name

External Reference The referencing of variables defined in another module is known as external

reference, and the variables themselves are known as external variables. The value l of an external symbol is not determined when the module is assembled, but rather when the section is linked by the Linker. The “extern” pseudo instruction is used to declare a symbol as an external symbol.

extern [size] Symbol Name

2.2.3 Use of Relocatable object

Considering system design changes and improvements using microcomputer, we do not recommend specifying fixed address sections. Because the section pseudo instruction must be rewritten when the allocation of sections is changed. Usually, interrupt vector table, I/O, call vector table and program startup address are set to fixed address section.


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2.2.4 Use of Other Tools

The TLCS-870/C,C1 Assembler contains various utility tools. Using these tools makes the programming efficiently to improve.

CC870C CC870C(Driver) enables to startup each tools and execute processing from macro preprocess to link.

TUMPP TUMPP(Macro Preprocessor) enables fetching simple words line, and macro preprocessing such as complicated macro expansion.

TULIB TULIB(librarian) enables to gather completed relocatable object files in one library file and manage them overall. Specifying librarian when linking, TULINK picks up necessary modules automatically and links.

TUCONV TUCONV(object converter) is a utility for converting the absolute object file output by the linker into an object format usable by an EPROM writer.


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2.3 Practical using of Linker

2.3.1 Complicate memory allocation

Not only the MEMORY definition part but also the SECTION definition part is necessary for describing when you want following memory allocation.

to direct the relocation order of section to allocate the part of program in specified address

Allocation order of Section Basically TULINK enables to relocate the section by the specified input file in order.

sections{ XX: { afile.rel(AA) bfile.rel(BB) cfile.rel(CC)} }

Link the section AA in afile.rel file and the section BB in bfile.rel and the section CC in cfile.rel in order, and gather in output section XX.

Specifying allocation address The sections pseudo instruction enables to specify the allocation address of output section. The example is as follows.

sections{ XX org=0x0040 : { afile.rel(AA)} /* Specifying Allocation address */ }

Section AA in afile.rel file is allocated in address 0x0040.


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2.3.2 How to solve link error

The solution of link error is sometimes difficult, because the line number is not indicated in link error. The clue for solution is as follows:

When the section name is indicated in error message, see the “Link Map” block in Link map list file. And check the address of the section.

When the symbol name is indicated in error message, see the “Symbol table” block in Link map list file.

Error-231:Section “xxx” at “0xyyyy” load value overflow. Truncated. (1) Search the address 0xyyyy in the “Link Map” block in Link map

list file, and check “In-sec” and “In-file”. (2) Calculate the offset address from the start of section to 0xyyyy. (3) Search the “In-sec” section in assembler list file of “In-file”, and

check the cause of error from offset address.


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Appendix

Appendix A History

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Appendix A History The history of this manual is the following.

Issue Date Update 1st Oct 1, 1998 1'st Edition 2nd Dec 3, 2001 'Appendix C Usable Software List' is corrected. 3rd Nov 3, 2003 The name of manuals is corrected. 4th Jun 5,2007 Deleted about TUMPL, TUAPP, and TUFAL

Deleted about ‘-O2’ optimization Added about TUMPP

Appendix

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TLCS-870/C Series Assembler Programmer's Guide [4th Edition]

The Date of Issue: 5 Jun, 2007

TDE15-04

tlcs-870/c series assembler programmer's...

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