TDA7266

7+7W DUAL BRIDGE AMPLIFIER

WIDE SUPPLY VOLTAGE RANGE (3-18V)MINIMUM EXTERNAL COMPONENTS NO SWR CAPACITOR NO BOOTSTRAP NO BOUCHEROT CELLS INTERNALLY FIXED GAINSTAND-BY & MUTE FUNCTIONSSHORT CIRCUIT PROTECTIONTHERMAL OVERLOAD PROTECTION

DESCRIPTIONThe TDA7266 is a dual bridge amplifier speciallydesigned for TV and Portable Radio applications.

March 2002

1

2

4

Vref

ST-BY 7

IN10.22 m F

VCC

133

D94AU175B

+

-

-

+

OUT1+

OUT1-

15

14

12

MUTE 6

IN20.22 m F

+

-

-

+

OUT2+

OUT2-8

9S-GND

PW-GND

470m F 100nF

BLOCK AND APPLICATION DIAGRAM

Multiwatt 15

ORDERING NUMBER: TDA7266

TECHNOLOGY BI20II

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ELECTRICAL CHARACTERISTICS (VCC = 11V, RL = 8, f = 1kHz, Tamb = 25C unless otherwise

specified.)Symbol Parameter Test Condition Min. Typ. Max. Unit

VCC Supply Range 3 11 18 VIq Total Quiescent Current 50 65 mA

VOS Output Offset Voltage 120 mVPO Output Power THD = 10% 6.3 7 W

THD Total Harmonic Distortion PO = 1W 0.05 0.2 %PO = 0.1W to 2Wf = 100Hz to 15kHz

1 %

SVR Supply Voltage Rejection f = 100Hz VR = 0.5V 40 56 dBCT Crosstalk 46 60 dB

AMUTE Mute Attenuation 60 80 dBTW Thermal Threshold 150 CGV Closed Loop Voltage Gain 25 26 27 dB

Gv Voltage Gain Matching 0.5 dBRi Input Resistance 25 30 K

VTMUTE Mute Threshold for VCC > 6.4V; VO = -30dBfor VCC < 6.4V; VO = -30dB

2.3VCC/2

-1

2.9VCC/2 -0.75

4.1VCC/2 -0.5

VV

1

2

34

5

67

91011

8

N.C.N.C.S-GNDPW-GNDST-BYMUTEN.C.IN1VCCOUT1-OUT1+

1314

15

12

OUT2+OUT2-VCCIN2

D95AU261

PIN CONNECTION (Top view)

ABSOLUTE MAXIMUM RATINGSSymbol Parameter Value Unit

VS Supply Voltage 20 VIO Output Peak Current (internally limited) 2 A

Ptot Total Power Dissipation (Tcase = 70C) 33 WTop Operating Temperature 0 to 70 C

Tstg, Tj Storage and Junction Temperature -40 to +150 C

THERMAL DATA

Symbol Description Value UnitRth j-case Thermal Resistance Junction to case Typ. 1.4 Max. 2 C/W

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12

4

Vref

ST-BY7

IN1C1 0.22F

VCC

133

D95AU258A

+

-

-

+

OUT1+

OUT1-

15

14

12

MUTE6

IN2C3 0.22F

+

-

-

+

OUT2+

OUT2-8

9S-GND

PW-GND

C5470F

C6100nF

R1 10K

C210F

P

R2 10K

C41F

Figure 1: Microprocessor Application

ELECTRICAL CHARACTERISTICS (Continued)

Symbol Parameter Test Condition Min. Typ. Max. UnitVTST-BY St-by Threshold 0.8 1.3 1.8 VIST-BY ST-BY current V6 = GND 100 A

eN Total Output Noise Voltage A curvef = 20Hz to 20kHz

150 V

APPLICATION SUGGESTIONSTAND-BY AND MUTE FUNCTIONS(A) Microprocessor ApplicationIn order to avoid annoying "Pop-Noise" duringTurn-On/Off transients, it is necessary to guaran-tee the right St-by and mute signals sequence.It is quite simple to obtain this function using a mi-croprocessor (Fig. 1 and 2).At first St-by signal (from mP) goes high and thevoltage across the St-by terminal (Pin 7) starts toincrease exponentially. The external RC networkis intended to turn-on slowly the biasing circuits of

the amplifier, this to avoid "POP" and "CLICK" onthe outputs.When this voltage reaches the St-by thresholdlevel, the amplifier is switched-on and the externalcapacitors in series to the input terminals (C3,C5) start to charge.Its necessary to mantain the mute signal low untilthe capacitors are fully charged, this to avoid thatthe device goes in play mode causing a loud "PopNoise" on the speakers.A delay of 100-200ms between St-by and mutesignals is suitable for a proper operation.

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+VS(V)

VIN(mV)

VST-BYpin 7

Iq(mA)

ST-BYMUTE

PLAY MUTE ST-BY

+18

1.8

0.8

VMUTEpin 6

4.1

2.3

OFFOFF

D96AU259

VOUT(V)

2.9

1.3

Figure 2: Microprocessor Driving Signals.

(B) Low Cost ApplicationIn low cost applications where the mP is not pre-sent, the suggested circuit is shown in fig.3.The St-by and mute terminals are tied togetherand they are connected to the supply line via an

external voltage divider.The device is switched-on/off from the supply lineand the external capacitor C4 is intended to delaythe St-by and mute threshold exceeding, avoiding"Popping" problems.

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12

4

Vref

ST-BY7

IN1

C3 0.22m F

VCC

133

D95AU260A

+

-

-

+

OUT1+

OUT1-

15

14

12

MUTE6

IN2

C5 0.22m F+

-

-

+

OUT2+

OUT2-8

9S-GND

PW-GND

C1470m F

C2100nF

R147K

C410m F

R247K

VCC

Figure 3a: Stand-alone Low-cost Application.

Figure 3b: PCB and Component Layout of the Application Circuit (Fig. 1).

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0.010

0.1

1

10

0.1 1 10

Vcc = 11 VRl = 8 ohm

f = 15 KHz

f = 5 KH z

f = 1 KHz

Pout (W )

THD (%)

Figure 4: Distortion vs Output Power

0.010

0.1

1

10

0.1 1 10

THD (% )

Vcc = 9VRl= 8 ohm

f = 15K H z

f = 5 K Hz

f = 1KH z

Pout (W )

Figure 5: Distortion vs Output Power

0.010

0.1

1

10

100 1k 10k 20k

THD(%)

Vcc = 11 VRl = 8 ohm

Pout = 100mW

Pout = 2W

frequency (Hz)

Figure 6: Distortion vs Frequency

-5.000

-4.000

-3.000

-2.000

-1.000

0.0

1.0000

2.0000

3.0000

4.0000

5.0000

10 100 1k 10k 100k

Level(dBr)

Vcc = 11VRl = 8 ohmPout = 1W

frequency (Hz)

Figure 7: Gain vs Frequency

U0.0

2 .0000

4 .0000

6 .0000

8 .0000

10.000

12.000

14.000

16.000

18.000

20.000

2 .000 4 .000 6 .000 8 .000 10.00 12.00 14.00 16.00 18.00

Po(W)

Vs(V)

d = 10%

d = 1%

R l = 8 ohmf = 1KH z

Figure 8: Output Power vs. Supply Voltage

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 80

1

2

3

4

5

6

7

8

0

10

20

30

40

50

60

70

80Ptot(W) (%)

2 X Pout(W)

Vcc = 11VRl = 8ohm (both channels)f = 1KHz

Ptot

Figure 9: Total Power Dissipation & Efficiencyvs. Output Power

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1 1.5 2 2.5 3 3.5 4 4.5 5

010

-10-20-30-40-50-60-70-80-90

-100

Attenuation (dB)

Vpin.6(V)

Figure 10: Mute Attenuation vs. V pin.6

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4

010

-10-20-30-40-50-60-70-80-90

-100-110-120

Attenuation (dB)

Vpin.7 (V)

Figure 11: Stand-By Attenuation vs Vpin.7

3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1830

35

40

45

50

55

60

65

70Iq (mA)

Vsupply(V)

Figure 12: Quiescent Current vs. Supply Voltage

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Multiwatt15 V

DIM. mm inchMIN. TYP. MAX. MIN. TYP. MAX.

A 5 0.197B 2.65 0.104C 1.6 0.063D 1 0.039E 0.49 0.55 0.019 0.022F 0.66 0.75 0.026 0.030G 1.02 1.27 1.52 0.040 0.050 0.060G1 17.53 17.78 18.03 0.690 0.700 0.710H1 19.6 0.772H2 20.2 0.795L 21.9 22.2 22.5 0.862 0.874 0.886L1 21.7 22.1 22.5 0.854 0.870 0.886L2 17.65 18.1 0.695 0.713L3 17.25 17.5 17.75 0.679 0.689 0.699L4 10.3 10.7 10.9 0.406 0.421 0.429L7 2.65 2.9 0.104 0.114M 4.25 4.55 4.85 0.167 0.179 0.191M1 4.63 5.08 5.53 0.182 0.200 0.218S 1.9 2.6 0.075 0.102S1 1.9 2.6 0.075 0.102

Dia1 3.65 3.85 0.144 0.152

OUTLINE ANDMECHANICAL DATA

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license isgranted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication aresubject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics productsare not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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