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  • PSP+: A Simple Method to Extend PSP Model for SOI MOSFETs

    Application

    (Mail: [email protected])2015.06.27

    Jun Liu, Kai LuCompact Device Modeling Group

    Key Laboratory for RF Circuits and Systems of Ministry of Education, Hangzhou Dianzi University

  • Model Introduction PSP+ Modeling MethodModel TopologyModel Extraction & Simulation

    Model Verification DC Modeling Results RF Small Signal Fitting Results RF Power Switch Simulation

    Substrate Network Extraction Method Four-port S-parameter based extraction method Testkey and results

    Summary

    OutlineF

  • Model Introduction PSP and PSP + PSP+ is directly extended on PSP103.2, VA version PSP model core is perfectly inherited to PSP+, the math structure of the model is as the same as that used in PSP 103.2

    Modeling Method Five electrical in/out nodes, with a novel dVbi model for Irb modeling SOI mode selector, 1 = PD&FD, 0 = PD, 2 = Bulk Parasitic BJT model is simplified from MEXTRAM 504 Surface potential based back gate (BOX) charge calculation Complete substrate network and scaling rules

    Advantages Standard PSP model core + Customized characterizing given PSP+ more possibilities, including a quickly model Extraction based on PSP

  • Model Topology

    Qfed: BG (BOX) fringe capacitance from E to D

    PSP+ = PSP Core + BG MOS CAP + BSIM SOI dVbi + BJT

    Qfes: BG (BOX) fringe capacitance from E to S Qbg: BG MOS structure caused charege

    BJT ModelMEXTRAM 504 can also use BSIM SOI BJT model

    Floating Body effect Vsb = Vsb - dVbi dVbi is borrowed from BSIM SOI

    FD Device No dVBI and BJT needed

    PD Device FB and BJT model needed

    Fig. Model topology

  • Source Code & Model Simulation Verilog-A version is now ready for circuit application Simulator: Cadence Spectre, Agilent ADS, HSPICE..

    Model Parameter Extraction Follow PSP extraction follow (MBP/Proplus/IC-CAP + Defined sub-model extraction follow (IC-CAP)

  • Model Introduction PSP+ Modeling MethodModel TopologyModel Extraction & Simulation

    Model Verification DC Modeling Results RF Small Signal Fitting Results RF Power Switch Simulation

    Substrate Network Extraction Method Four-port S-parameter based extraction method Testkey and results

    Summary

    Outline

    F

  • Benchmark Testing (in-house manufactured) Cgc = Cgs + Cgd + CgbMOS CAP1:MOS CAP2:MOS CAP3:

    Fig.CAP1~3 measurements and model fitting results

    DC Base-band test structure Totally 25 PD devices manufactured in 0.18um SOI technology Vdd = 2.5VW = 0.5um to 10um, L = 0.2um to 10um

  • Model Base-band global fitting DC Ids vs Vgs

  • Model Base-band global fitting gm = dIds/dVgs

  • Model Base-band global fitting Ids vs Vds

    PMOSFET

    Vds=0v~-2.5v(step:-0.05v)

    Vgs=-0.5v~-2.5v(step:-0.5v)

    NMOSFET

    Vds=0v~2.5v(step:0.05v)

    Vgs=0.5v~2.5v(step:0.5v)

  • Model Base-band global fitting gds =dIds/dVds

    PMOSFET

    Vds=0v~-2.5v(step:-0.05v)

    Vgs=-0.5v~-2.5v(step:-0.5v)

    NMOSFET

    Vds=0v~2.5v(step:0.05v)

    Vgs=0.5v~2.5v(step:0.5v)

  • Model Base-band global fitting Igate

  • Model RF performance global fitting PMOSFET W=1um L=0.5um NF=16

  • Model RF performance global fitting PMOSFET W=2.5um L=0.5um NF=16

  • Model RF performance global fitting PMOSFET W=10um L=0.3um NF=32

  • Model Introduction PSP+ Modeling MethodModel TopologyModel Extraction & Simulation

    Model Verification DC Modeling Results RF Small Signal Fitting Results RF Power Switch Simulation

    Substrate Network Extraction Method Four-port S-parameter based extraction method Testkey and results

    Summary

    Outline

    F

  • 17

    Advantages of 4-portS parmeters under all modesAll parasitics including substrate parasitics could be extracted directlyBenifits in layout area consumption

    S

    G

    G

    G

    G

    S

    G-D Mode

    S

    G

    G

    G

    G

    S S

    G

    G

    G

    G

    S

    S-D Mode G-S Mode

    Why Four-port network?

    4-port Network B-S Mode

    S

    G

    G

    G

    G

    S

    B-G Mode B-D Mode

    S

    G

    G

    G

    G

    SS

    G

    G

    G

    G

    S

  • Extraction Method

    Rg

    Cgs Cgd

    Dsb Ddb

    Rs Rd

    RbCsbox Cdbox

    Rsub Csub

    G

    S D

    E

    B

    Cgb

    Parasitics for PD SOI

    Body related parasitics

    BSsb

    imag(Y )C2 frequency

    = 2

    BDdb

    imag(Y )Cfrequency

    =

    2GB

    gbimag(Y )C

    frequency= 1

    bBB

    RReal(Y )

    =

    18

    ( )2

    gggg

    imag YC

    frequency=

    Gate related parasitics

    GSgs

    Imag(Y )C =2 freq

    GDgd

    imag(Y )C =2 frequecy

    2 2

    gA - A - 4ABR =

    2AB2 2

    ggA frequency C=

    GGB = Real(Y )

    1 1( ( ) ( ) )s GS g gdR = Real - Y - R j C +

    1 1D( ( ) ( ) )d G g gsR = Real - Y - R j C

    +

    Source and drain resistance

  • 2 2

    1 2 2 2 2

    1 / / =1 1

    gd g gd ggd

    g gd g gd g

    C R C RY j C j

    R C R C R

    = ++ +

    2 2

    2 2 2 2 2b

    1 / / =1 1

    db b db bdb

    db b db b

    C R C RY j C jR C R C R

    = ++ +

    3 1 2DDY Y Y Y=

    sub3

    1R = Real( )Y

    Y1 Y2 Y3

    Rg

    Cgd Cdb

    Rb

    Cdbox

    Rsub Csub

    D

    G B Sub

    19

    Substrate Resistance YDD equivalent circuit

  • BB 1sbox sb

    1 1 1( + ) Z2 j C j Cb

    Z R

    = + +

    13 sbox

    1 1Y

    Zj C

    = +

    1 BB3 sb

    1 1Z 2 2Y b

    Z Rj C

    = 1

    1(Z )Csubimag

    =

    sbox 31

    1 1Y

    Zj C

    = sboxs

    ( )C boximag j C

    =

    Rb

    Csbox+Csb

    Cdbox+Cdb

    RsubCsub

    sb db sbox dboxC C C C

    Z1

    20

    ZBB equivalent circuit

    Box and Substrate Capcitance

  • RG

    Rsub Csbox

    CGS

    21

    Extraction ResultsNMOSFET

    Wfinger= 2m

    Lg=0.13 m

    No. of finger (NF)= 4~64

    NF NF

    NF NF

  • 22

    Simulation Results

  • PSP+ aimed at SOI modeling, including DC&RF

    PSP + is provided with advantages of PSP,BSIMSOI and

    MEXTRAM

    PSP+ provided excellent accuracy for SOI RF modeling

    Four-port network modeling could solve the problem of

    substrate related parasitics with direct extract method

    Summary

    23

    PSP+: A Simple Method to Extend PSP Model for SOI MOSFETs ApplicationOutlineModel IntroductionModel TopologySource Code & Model SimulationOutlineBenchmark Testing (in-house manufactured)Model Base-band global fittingModel Base-band global fittingModel Base-band global fittingModel Base-band global fittingModel Base-band global fittingModel RF performance global fittingModel RF performance global fittingModel RF performance global fittingOutlineWhy Four-port network? 18Substrate Resistance Box and Substrate Capcitance 21 22 23