introduction to microprocessor designed by: d k rout 1 introduction to 8085 microprocessor...

Introduction to Microprocessor DESIGNED BY: D K ROUT

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INTRODUCTION TO 8085 MICROPROCESSOR

ARCHITECTURE


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Introduction A digital computer is a multipurpose, programmable machine that reads binary

instructions from its memory, accepts binary data as input and processes data

according to those instructions, and provide output.

InputDevices

OutputDevices

Control Unit

MemoryUnit

ALU


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The CPU consists of memory (Array of registers) to store data, the ALU to perform arithmetic and logical operations and control unit (decoders, counters, encoders, and control lines)

Integrated circuit (IC) In 1959 Integrated Circuit was invented it consists of several

electronic components like transistors resistors etc grown on a single silicon chip eliminating wires from circuit. Various techniques of integration are :

Technique Used Num. of Gates Small-scale integration (SSI) Fewer than 12

Medium-scale integration (MSI) 12 to 99

Large-scale integration (LSI) 100 to 9999

Very large-scale integration (VLSI) 10,000 to 99,999

Ultra large-scale intégration (ULSI) 100,000 or more


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Microprocessor: As the technology moved from SSI to VLSI the face of the computer changed. Initially, computers were built with discrete logic gates. As more and more logic circuits were built on one chip using LSI technology it was became possible to build the whole CPU with its related timing function on a single chip. The central processing unit of a digital computer, built into a single IC is called microprocessor.

Input Output

ROM R/W M

ALURegister Array

Control Unit

System Bus

Microprocessor

Memory


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Arithmetic and Logic unit : In this area of the microprocessor the computing functions are performed on the data. The ALU performs arithmetic operations such as addition and subtraction, and logic operations such as AND, OR and EX-OR results are stored in the registers or in memory unit or send to output unit.

Register Unit : This area of the microprocessor consists of various registers. The registers are used for temporary storage of data during execution of a program. Some of the registers are accessible to the users through various instructions.

Control Unit : The control unit provides necessary timing and control signals to all the operations in the microprocessor and peripherals including memory.

Memory : it stores binary information such as instructions and data and provide that information to the microprocessor when required . To execute programs the microprocessor reads data and instructions from the memory and performs the computing operations. It consists of two sections ROM ( used to store program which do not require any alteration. R/WM is also known as user memory is used to store programs and data.

System Bus: The system bus is a communication path between the microprocessor and the peripherals it is nothing but a group of wires that carries data in the form of bits.


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Microprocessor Architecture: Microprocessor is a complex IC of sequential circuits. It is a

programmable logic device, designed with registers, flip-flops, and timing elements. It has a set of instructions designed to manipulate data and communicate with peripherals. The process of data manipulation and communication with peripherals is determined by the logic design or the MP the logic design is called architecture.

All of the operations of the microprocessor can be classified into one of three types:

- Microprocessor Initiated Operations- Internal Operations- Peripheral Initiated Operations


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Microprocessor Initiated Operations

These are operations that the microprocessor starts itself. These are usually one of the following operations:

1. Memory Read : Reads data from memory

2. Memory Write : Writes data into the memory.

3. Accepts data from I/P devices (I/O read)

4. Sends data to O/P devices.(I/O write)


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All the above operations are part of the communication process between MP and peripheral devices or memory . For communication MP performs following steps:

– Identify the address of memory location or the peripheral device.– Transfer the data– Provide timing or synchronization signals.

The MP performs the above three functions through the communication lines called system bus. ( bunch of wires)

there are three types of busses :

1. Address Bus It carries the address of a memory location or I/O device that the MP wants to access. It is a Unidirectional bus generally denoted by A0, A1, A2,

A3----------------------------------- A16. In MP8085 it is 16 bit wide.

2. Data Bus: It is used to transfer data between the processor and memory and I/O devices. It is bidirectional in nature. A MP is defined by data bus e.g. MP 8085 is an 8 bit Processor i.e. its data bus is of 8bits. Denoted by AD0, AD1, AD2-----------------------------------

A8

3. Control Bus It is used to carry control signals between CPU and various devices connected to it. It also carries Synchronization and timing signals. The bus is somewhat confusing term for it , in fact these are individual lines that provide a pulses


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Internal Data Operations

The internal architecture of MP determines how and what operations can be performed with the data . These operations are :

1. Store 8 bit data.2. Perform Arithmetic and Logic operations.3. Test for the conditions .4. Sequence the execution of instructions5. Store data temporarily during the execution

in the defined R/W memory locations called the stack.


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Internal Data Operations

To perform these operations we require registers , ALU and control logic and path for communication bus. MP 8085 has following units for the above said purposes.

Registers MP8085 has six general purpose registers to 8bit data during program execution. These registers are identified as B, C, D, E, H and L. They can be combined as register pairs--BC, DE, HL to perform 16 bit operations. These registers are programmable means that user can use them to load copy and move data from the registers by using instructions e.g. MOV B,C. These registers can be considered as memory location as they are in the microprocessor, expect they are named by alphabet for the user convention. Some MP do not have these registers so they use memory locations for this purpose. .

Accumulator The accumulator is an 8 bit register that is the part of ALU. This register is used to store 8-bit data to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. Accumulator is identified as register A.

Flags The ALU includes five flip flops or status flags , that are set or reset according to the result of operation. The MP uses them to perform the testing for data conditions. These flags are:


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1. Carry flag: If after an arithmetic operation the result in the accumulator is greater than 8 bits then carry flag is set i.e. CY = 1, otherwise it is ‘0’ .

2. Zero flag: If after an arithmetic operation the result in the accumulator is zero then zero flag is set i.e. Z = 1, otherwise ‘0’.

3. Sign Flag: If after an arithmetic operation the MSB of the result in the accumulator is ‘1’ then Sign flag is set i.e. S = 1, otherwise ‘0’.

4. Parity Flag: If after an arithmetic operation the result contains even number of 1s then Parity flag is is set i.e. P = 1, otherwise ‘0’.

5. Auxiliary Flag: This status flag is set if there is a carry when there is a carry from bit 3 to 4.

7 6 5 4 3 2 1 0

S Z X AC X P X CS


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Internal Data Operations (Cont….)

Program Counter: This is a 16 bit register that deals with the forth operation of the list i.e. sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16 bit address. The function of the program counter is to point the memory address from which the next byte is to be fetched. When one byte is being fetched the contents of the program counter is increased by 1. to point the next memory location.

Stack Pointer: The stack pointer is also a 16 bit register used as memory pointer. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading a 16 bit address in the stack pointer.


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Peripheral or Externally Initiated Operations

External devices can initiate following operations, for which individual pins on the microprocessor chip is assigned, these operations are:

1. Reset When reset pin is activated all internal l operations are stopped and the program

counter is reset to 0000. Program execution again begins from zero memory address.2. Interrupt

The microprocessor’s operations are interrupted and the microprocessor executes what is called a “service routine”.

This routine “handles” the interrupt, (perform the necessary operations). Then the microprocessor returns to its previous operations and continues

3. Ready The 8085 has a pin called RDY. This pin is used by external devices to stop the 8085

until they catch up. As long as the RDY pin is low, the 8085 will be in a wait state. This signal is used primarily to synchronize slower peripherals with the

microprocessor.4. Hold

The 8085 has a pin called HOLD. This pin is used by external devices to gain control of the busses.

When the HOLD signal is activated by an external device, the 8085 stops executing instructions and stops using the busses.

This would allow external devices to control the information on the busses. Example DMA.


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Microprocessor 8085 pin Configuration


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Intel 8085 is an 8 bit, NMOS MP. It is a 40 pin IC package fabricated on a single LSI. The Intel chip uses a single +5V dc supply for its operation. Its clock speed is about 3 MHz with a clock cycle of 320ns. The time of a clock cycle is about 200ns.

Description of various pins:

1. A8-A15 (Output): These are address bus and are used for the MSB of the memory address. or I/O address.

2. ADo-AD7 (Input / Output): These are time multiplexed address / data bus i.e. they serve dual purpose. They are used for the LSB of the memory address. or I/O address during the first clock cycle of the machine cycle. They are used as data during the second and third clock cycle of the machine cycle.

3. ALE (Output): It is an address latch enable signal. It goes high during the first clock cycle of the machine cycle and enables the lower 8 bits of the address to be latched either into the memory or external latch.

__4. IO/M (Output): It is a status signal which distinguishes whether the address is for

memory or external latch. When it goes low the address in the address bus is for the memory.


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4. So,S1 (Output): These are status signals sent by the microprocessor to distinguish the various types of operation given .

1. 0,0 - Halt2. 0,1 - write3. 1,0 - Read4. 1,1 - Fetch

___6. RD(Output): It is a signal to control READ operation. When it is low the selected memory or I/O

device is read. ___7. WR (Output): It is a signal to control WRITE operation. When it is low the data on the data bus

is written into the selected memory or I/O device.

8. READY (Input) It is used by the microprocessor to check whether the peripherals is ready to transfer data or not. If READY is high . If it is low MP waits for the signal to go high..

9. HOLD (Input): It indicates that another device is requesting the use of the address and data bus. Having received a HOLD request the MP requlinshes the use of the buses as soon as current machine is completed.

10. HLDA (output): It is a signal for HOLD acknowledgement. It indicates that the HOLD request have been received.



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Microprocessor 8085 pin Configuration Cont….)

11. INTR (input): It is an interrupt request signal. Among interrupts it has lowest priority. When it goes high the program counter does not increment its contents. The microprocessor suspends its normal sequence of operations. After completing the instruction at hand it goes to the call instruction. The INTR line is sampled in the last state of the last machine cycle of the instruction. The microprocessor acknowledges the interrupt signal and issues INTA signal. The interrupt is enabled or disabled by software. An interrupt is used by I/O devices to transfer data to the MP without wasting its time.

12. RST5.5.6.5.7.5 and trap (inputs): These are interrupts. When an interrupt is recognized the next instruction is executed from a fixed location in the memory as given below:

1. TRAP 00242. RST5.5 002C3. RST6.5 00344. RST7.5 003C

RST 7.5,6.5.5.5 are the restart interrupts. They cause an internal restart to be automatically inserted. Each of them has a programmable mask. The TRAP has the highest priority among interrupts. It is a nonmaskable interrupts. It is unaffected by any mask or interrupt. The priority of the interrupts is in the order of TRAP(Highest) , RST7.5. RST6.5, RST5.5, INTR.________


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(Microprocessor 8085 pin Configuration Cont….)

13.RESET IN (Input): It resets the program counter to zero. It also resets the interrupt enable and HLDA flip-flops. It does not effect any other flag or register except the instruction register, The CPU is held in reset condition as long as RESET is applied.

14.RESET OUT (Output): It indicates that the CPU is being reset.15.X1, X2: (Input): These are terminals to be connected to an external crystal

oscillator which drives an internal circuitry of the microprocessor to produce a suitable clock for the operation of microprocessor.

16.CLK : It is a clock output for user, which can be used for other digital IC’c Its frequency is same at which processor operates.

17.SID (Input) It is data line for serial input. The data on this line is loaded into the 7th bit of the accumulator when RIM instruction is executed.

18.SOD (Output): it is a data line for serial output. The 7th bit of the accumulator is outputed on SOD line when SIM instruction is executed.

19.VCC: +5 Volts Supply20.VSS: Ground Reference


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Basic Working of a Microprocessor

• Instructions are stored sequentially in memory

• Microprocessor – Fetches instruction from

memory– Decodes instruction– Executes instruction


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Addressing Modes of MP 8085

Each instruction performs an operation on the specified data called operand. An operand must be specified for an instruction to be executed. The operand may be in the general purpose register, accumulator or in a memory location. The way in which the operand is specified for an instruction is called addressing mode. Various addressing modes used in MP 8085 are:

1. Direct Addressing2. Register Addressing3. Register Indirect Addressing4. Immediate Addressing. 5. Implicit Addressing


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DIRECT ADDRESSING Direct addressing: In this mode of addressing the address of the operand

(data) is given in the instruction itself. For example:1. STA 2400H: Store the content of the accumulator to memory

location 2400H.2. IN 02: Read data from port C , 02 is the address of the port C of an

I/O port from where data is to be read.


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REGISTER ADDRESSING Register Addressing: In register addressing mode the

operands are in the general purpose registers. For example:1.MOV A,B: This instruction moves the contents of

register B to register A or Accumulator.2.ADD B: Add the contents of register B to

accumulator.


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Register indirect addressing

Register indirect addressing: In this mode of addressing the address of the operand (data) is specified by a register pair. For example:1. LXI H, 2500H: Load HL pair with 2500H.

MOV A,M : Move the contents of memory location whose address is given in HL pair to the accumulator. HLT: Stop the program. In this program MOV A,M is the example of Register Indirect addressing.

2. LXI H, 2500H: Load HL pair with 2500H. ADD M :

Add the contents of memory location whose address is given in HL pair to the accumulator. HLT: Stop the program. In this program ADD ,M is the example of Register Indirect addressing.


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Immediate Addressing

Immediate Addressing: In immediate addressing mode the operands are specified within the instruction itself. For example:1. MVI A,05 : Move 05 in the Accumulator.2. ADI 06 : Add 06 to the contents of the accumulator.


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Implicit Addressing

Implicit Addressing: There are certain instructions which operate on the content or the Accumulator directly, these instructions do not require the address of the operands. For example1. CMA : Compliment the contents of the Accumulator.2. RAR : Rotate the contents of the accumulator right by one bit.3. RAL : Rotate the contents of the accumulator left by one bit.


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Memory Unit in MP 8085

Memory stores the binary instructions for the microprocessor. Memory can be classified as primary and secondary memory. Primary can be divided as R/W memory and ROM . Secondary memories are magnetic tapes and disks.

The R/W memory is made of registers and each register has a group of flip flops, these flip flops are called memory cells. The number of bits stored in the registry is called memory word. The user can use the memory to hold programs and store data..

ROM stores the information permanently in the form of diodes; the group of diodes can be referred as register.

In a memory chip all the registers are arranged in a sequence and identified as by numbers called memory addresses. To communicate with memory the MP follows the following.1. Select the chip 2. Identify the register and3. Read from or write into the register

The MP uses address bus to send the address of a memory register and uses the data bus to read from or write into that register. The number of address lines required is determined by the number of registers in a chip (2n=Number of registers where n is address lines). The MP8085 has 16 address lines and 8 bit data lines.


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Memory Map and Addresses The 16 bit address line can address 216 = 65,536 = 64 KB. The entire memory

address ranges from 0000 to FFFF Hexadecimal. A memory map is pictorial representation in which the memory devices are located in the entire range of address. Memory addresses provide the locations of various memory devices in the system.

Examples of memory mapping.Suppose we have memory chip with 256 registers, so we need 8 address lines out of 16 address lines. We can use remaining 8 lines for chip select.In a computer system we define 1024 as 1K therefore a 1KB memory chip has 1024 registers with 8 bits each. A group of 256 registers is defines as one page and each register is viewed as a line to write. Thus 1KB of memory chip has 4 pages with 256 registers each. Thus each register can have address from 00H to FFH. The other two bits can be used to represent page number and the other 8 bits for chip select. The concept of 256B for a page is only for 8 bits MP, the concept of page changes with the bits of MP.


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The 8085 Machine Cycle and Bus Timings

• An instruction is a command given to a computer to perform a specified operation. On the given data. To perform a particular task a programmer writes a sequence of instructions, called a program. Program and data are stored in the memory. The processor fetches one instruction from the memory at a time and execute it. It executes all the instructions of the program one by one and produce the final result.

• Instruction Cycle The necessary steps which a processor carries out to fetch an instruction and data from the memory and to execute that instruction constitute and instruction cycle.

• An instruction cycle consist of two steps Fetch cycle and Execute cycle. In the fetch cycle the processor fetches the instruction from the memory. The necessary steps which are carried out to get data and perform the specific operation given in the instruction constitute a execute cycle.

IC = FC + ECOp-code & Operand Each instruction contains two parts Operation Code (Opcode)

and Operand. The first part of the instruction which specifies a task to be performed by the processor is called Opcode. The second part of the instruction is the data to be operated upon is called Operand.


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The 8085 Machine Cycle and Bus Timings (cont…..)

• The steps which MP8085 takes to fetches machine codes from the memory can be understood with the help of the command MOV C,A (4F) stored at memory location 2005H :

1. The program places the 16 bit address on the address bus. At time T1 the high order address 20H is placed on the address line A15-A8, the low order memory address 05H is placed on the data bus AD7-AD0 and the address latch signal goes high. Similarly the status signal IO/M goes low, indicating that this is memory related operation.

2. The control unit sends the control signal RD to enable the memory chip. This signal is sent out during the clock period T2, thus enabling the memory chip. The RD signal is active during two clock periods.

3. The byte from the memory location is placed on the data bus. When the memory is enabled the instruction byte (4F) is placed on the bus AD7-AD0 and transferred to the microprocessor. The RD signal goes high, the bus go into high impedance.

4. The byte is placed in the instruction decoder of the microprocessor, and the task is carried out. The machine code 4F is decoded by the instruction decoder and the contents of the accumulator are copied into the register C. This task is performed during the period T4


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The 8085 Machine Cycle and Bus Timings (cont…..)• Example :- In MP8085 we have two machine codes 3EH ( MVI A, data) and 32H are stored at

memory location 2000H and 2001H respectively. Illustrate the bus timing . Calculate the required to execute the Opcode Fetch and Memory Read cycles and the entire instruction cycle if the clock frequency is 1.2 MHzs.

• Ans :- This instruction consists of two bytes; the first op-code and the second is the data byte. The MP reads these bytes from the memory and thus requires at least two machine cycles. The first machine cycle is the Opcode fetch and the second machine cycle is the memory read .

1. First machine cycle M1:- 1. At T1 microprocessor places the memory address 2000H from the PC on the address bus. 20H on the A15-A8,

and 00H on the bus AD7-AD0. The ALE signal goes high during T1. which is used to latch the low order address 00H to AD7-AD0. The status signals are S1 = 1, S0=1

2. At T2 the MP asserts the RD control signal, which enables the memory, and memory places the byte 3EH from location 2000H on the data bus.

3. During T3 the MP places the opcode in the instruction register and disables the RD signal . The fetch cycle is completed in state T3

4. During T4 the instruction is decoded2. Second machine cycle M2:-

1. At T1 microprocessor places the memory address 2001H from the PC on the address bus. 20H on the A15-A8, and 01H on the bus AD7-AD0. The ALE signal goes high during T1. which is used to latch the low order address 00H to AD7-AD0. The status signals are S1 = 1, S0=0

2. At T2 the MP activates the data bus as the input bus, memory places the data byte 32H on the data bus.3. During T3 the MP reads and store the byte in accumulator.

• The execution time– Clock frequency f = 2 Mz– T- state = Clock Period = 1/f = 0.5 µs– Execution time for fetch cycle = 4 X .5 = 2 µs– Execution time for Memory Read = 3 X .5 = 1.5 µs– Execution time for the instruction = 3.5 µs


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The 8085 Machine Cycle and Bus Timings (cont…..)

• Example :- In MP8085 explain the machine cycle for the instruction STA 2065 (32H,65,20). The machine codes are stored at the memory locations 2010H, 2011H, 2012H.

• Ans :- This instruction consists of three bytes; the first op-code and the second and the third are the address of the memory location. This instruction stores the contents of the accumulator in the memory location 2065H. It consists of 4 machine cycles.

1. First machine cycle M1:- In the first machine cycle the MP places the address 2010 on the address bus and

fetches the opcode 32h. It requires 4T states.2. Second machine cycle M2:-

In the second machine cycle the memory is read. The processor places the address 2011 and gets the low order byte 65H. It requires 3T states.

3. Third machine cycle M3:-The third machine cycle is also the Memory Read cycle. The processor gets the high

order byte 20H from the memory location 2012. It requires 3 T states4. Forth machine cycle M4 :-

The last machine cycle is the memory write . The MP places the address of 2065H on the address bus, identifies the operation as Memory Write ( S1=0, S0=0 ). It places the contents of the accumulator on the data bus AD7-AD0 and asserts the WR signal. During the last T state the contents of the data bus are placed in memory location 2065H. It requires 3T states.


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RISC & CISC

• Computer uses microprocessors as their CPU, which takes data and converts it into required and meaningful output. Microprocessors have ALU, memory unit and control unit. Microprocessor processes the data as per user’s instructions. It picks each instruction and decodes and execute to operation to be performed by instructions. The control unit circuitry can be designed using two approaches:

1. Hardwired approach

2. Micro programmed or S/W approach

1. RISC (Reduced Instructions Set computer )RISC is based on Hardwired approach i.e. it uses hardware circuitry to execute or generate control signals. Various integrated circuit-having number of registers; gates are designed to process the instruction. RISC computers are application specific and main motto behind using RISC is to process the data at fast rate especially for Real Time applications

Examples: SUN, SPARC, DEC81064 etc


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RISC & CISC (Cont…..)

• Characteristics of RISC1. Limited instruction set.

2. Limited addressing mode.

3. Single instruction cycle.

4. Limited operations.

5. Huge collection of registers.

6. Intensive pipeline is used for specific type of applications

7. Used for specific type of machine.

8. Memory access limited to load and store information.

9. All operations done within the registers of the CPU

10. Hardwired rather than micro programmed control.

• Advantages of RISC1. Speed of hardwired approach is faster than that of S/W approach.

2. It is best suited for real time applications.

3. Instruction format is very simple


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• Disadvantages of RISC1. A huge number of registers are required.

2. It uses single instruction cycle.

3. In case any error occurs it is difficult to locate and correct that error.

4. Each machine is for specific operation; other machine cannot use same codes for the execution.

5. Not flexible limited addressing modes.

• CISC (Complex Instructions Set computer)

These computers have sophisticated and numerous instructions and each instruction is executed by check micro op-code in circuitry. After searching the micro op-code necessary micro operations are performed by the CISC Machine. CISC are based on S/W approach. Today most of the machines having microprocessor 386,486,and Pentium uses this approach. They have a huge instruction set and format for processing of the data fed to it.


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• Characteristics of CISC1. These machines used variable instruction format.

2. A large variety of addressing mode typically from 5 to 20 different modes.

3. Microprogrammed approach is used.

4. Flexibility to use same code for different compatible machines.

5. Multiple instruction cycle.

6. A large number of instructions typically 100 to 250 instructions.

• Advantages of CISC 1. More than one instruction can be executed in one machine cycle using

Super Scale technology.

2. Different machine programs can be executed on CISC machine.

3. It uses software approach so easy to modify.

4. Debugging of errors is easier in CISC machines.

5. CISC provides number of instructions and addressing modes, which make it flexible to use machine for variety of programs.


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• Disadvantages of CISC1. Speed is slow as compared to RISC machine.

2. Executing an instruction requires various steps and complex procedures, control memory is needed to store various micro opcode for micro operation

3. Can not be used for real time applications.


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Interrupts in Microprocessor 8085

The primary function of the MP are:– To accept the data from input devices such as keyboard and A/D converters.– Read instructions from memory.– Process data according to the instructions.– Send results to the output devices such as LED’s printers and monitors. These I/O devices are called either peripherals or I/Os. Designing logic circuits (hardware)

and writing instructions (software) to enable MP to communicate with these peripherals is called interfacing and the logic circuits are called I/O ports or interfacing devices.

– The microprocessor communicates with the peripherals in either or two formats.• Asynchronous means at irregular intervals. It has a low speed data transmission• Synchronous means at the same time the transmitter and receiver are synchronized with the

same clock. It used for high speed data transmission– The microprocessor uses two Modes of data transfer:

• Parallel data transfer in this mode the entire word is transferred at one time eg in 8085 the entire word of 8 bits is transferred simultaneously over the data bus. The devices that are used for the parallel data transfer are keyboards, seven segment LED’s data converters and memory.

• In the serial mode, data are transferred one bit at a time over a single line between the MP and a peripheral , a word is converted into a stream of 8 bits. This mode is used with peripherals such as CRT terminals , printers cassette tapes, and modems for telephone lines.

– Microprocessors have various types of I/O• Peripheral I/O • Memory Mapped


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Interrupts in Microprocessor 8085 (cont…)The process of data transfer between the MP and the peripherals is controlled either the MP or by the

Peripherals• MP controlled data transfer: Most of the peripherals respond slowly in comparison with the speed of

the MP. Therefore it is necessary to set up conditions for data transfer so that data will not be lost during the transfer. MP controlled data transfer takes place under five different conditions.

– Unconditional data transfer: In this form of data transfer the MP assumes that a peripheral is always available e.g. to display data on LED.

– Data transfer with polling (status check): In this form of data transfer the MP is kept in loop to check whether data is available or not e.g. to read data from a keyboard in single board MP can keep polling the port until a key is pressed.

– Data transfer with interrupts: In this condition when a peripheral is ready to transfer the data it sends an interrupt signal to the MP. The MP stops the execution of the program, accepts the data from the peripheral and then returns to the program. In the interrupt technique the processor is free to perform other tasks rather being held in a polling loop.

– Data transfer with a READY signal: When peripheral response time is slower that the execution time of the MP, the READY signal can be used to add T state, thus extending the execution time. This process provides sufficient time for the peripheral to complete the data transfer. This tech is used with the system with slow memory chips.

– Data Transfer with Hand Shake Signals.: In this data transfer, signals are exchanged between the MP and peripheral prior to actual data transfer, these signals are called handshake signals. The function of the hand shake signals is to ensure the readiness of the peripheral and to synchronize the timing of the data transfer. Hand shake signals are of two types

• Status Check• Interrupt

• Device controlled: This type of data transfer is used when the peripherals are much faster than the microprocessor e.g. DMA the DMA controller sends the hold signals, the MP releases its data bus and the address bus to the DMA controller and data are transferred at high speed without the intervention of the MP.


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Interrupts in Microprocessor 8085 (cont…)

The interrupt is a process of data transfer whereby an external device or a peripheral can inform the processor that it is ready for communication and it requests attention. The process is initiated by an external device and is asynchronous i.e. can be initiated at any time without reference to the system clock. The response to the interrupt is controlled by the microprocessor.

The interrupt request can be classified into two categories maskable and non maskable . They can also be classified as vectored and non vectored.

Intel 8085 has five interrupts in the priority order :1. TRAP2. RST 7.53. RST 6.54. RST 5.55. INTR


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In MP 8085 the interrupt process is controlled by the Interrupt Enable flip-flop, which is internal to the processor and can be set or reset using software instructions. The working of these interrupts can be described as

1. The interrupt process is enabled by writing an instruction EI in the main program. The instruction EI sets the Interrupt Enable flip flop. The instruction DI resets the flip flop and disables the interrupt process except non maskable interrupt TRAP .

2. When the MP is executing a program, it checks the INTR line during the execution of each instruction.

3. If the INTR is high and the interrupt is enabled, the MP completes the current instruction, disables the interrupt Enables flip flop and sends a signal called INTA interrupt acknowledge. The processor cannot accept any interrupt requests until the interrupt flip flop is enabled again.

4. The signal INTA is used to insert a restart (RST) instruction (or a call instruction) through external hardware. The RST instruction is a 1 byte instruction that transfers the program control to a particular location and restarts the execution at the memory location after executing step 5.

5. When the MP receives an RST instruction (or CALL instruction)


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Interrupts in Microprocessor 8085 (cont…)Hardware and Software interrupts:

Interrupts caused by I/O devices are called hardware interrupts e.g. TRAP, INTR

The normal operation of the MP can also be stopped by special instruction, such instructions are called software interrupts e.g. RST n when RST n instruction is inserted in a program , the program is executed up to that point where RST n has been inserted.

Interrupt call locations:When an interrupt occurs the program is transferred to a specific memory location. Then

the monitor transfers the program from the specific memory location to a memory location in the memory in RAM , from where the user can write the program for interrupt sub routine ISS . For TRAP , RST 7.5, 6.5,and 5.5 the program is automatically transferred to specific memory locations without any external hardware. The necessary hardware is already provided within 8085. An interrupt for which hardware automatically transfers the program to a specific memory location is known as vectored interrupts. The specific memory location for these interrupts are as follows.

Interrupt Call LocationTRAP 0024H

RST 7.5 003CH

RST 6.5 0034H

RST 5.5 002C


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INTR Call location:There are 8 number of call locations for INTR interrupt as shown in the table below:

For INTR external hardware is used to transfer program to specific CALL location. The hardware circuit generates RST codes for the purpose. The INTR line is sampled by the MP in the last state of the last machine cycle of each instruction. When INTR is high the MP saves the contents of the program counter on the stack and then sends an interrupt acknowledge signal INTA to the external hardware. In response to INTA the external hardware generates a RST n code. When MP receives this code, it transfers program to the corresponding CALL-location. Up to 8 number of I/O devices can be connected to INTR through an external hardware. Priority can be assigned to I/O devices connected to INTR through external hardware or interrupt controller. The external hardware recognizes which I/O device has interrupted and it generates proper RST code that causes microprocessor to take up ISS for that particular I/O device. An external hardware can be built employing priority encoder and a tri state buffer. Alternatively Priority Interrupt Controller (PIC) 8214 can be used 8259 is more versatile .

RST n Call Location RST n Call LocationRST 0 0000 RST 4 0020

RST 1 0008 RST 5 0028

RST 2 0010 RST 6 0030

RST 3 0018 RST 7 0038


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Interfacing Devices and I/O Devices:To communicate with the outside world microprocessor use peripherals (I/O devices). Commonly used peripherals are : A/D converter, CRT, printers, hard disks, floppy disk, magnetic tapes etc. peripherals are connected to the microprocessor through electronic circuits known as interfacing circuits. The interfacing circuits converts the data available from an input device into computer format for the computer. The interface associated with the output device converts the output of the MP into the desired peripheral format. Some of the general purpose devices are:

I/O Port, Programmable Peripheral Interface (PPI), DMA Controller, Interrupt Controller, Communication Interface, Programmable Counter.Special purpose interfacing device are:

CRT Controller, Floppy Disk controller, Keyboard and Display Interface.1. I/O Ports An input device is connected to the MP through an input port.

Microprocessor

I/O PORTMicroprocessor

In put

Device

Out put

Device

Address Bus

Control

Bus

Data Bus


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2. Programmable Peripheral Interface:A PPI is a multi port device. The ports may be programmed in a variety of ways as

required as required by the programmer. The device is very useful for interfacing peripheral devices.

Intel 8255

Intel 8255 is a PPI with three 8 bit port namely PORT A, PORT B, PORT C.

Intel

8255

D0-D7

CS

RESET

A0

A1

RD

WR

PA0-PA7

PC4-PC7

PC0-PC3

PB0-PB7

VCC

GND


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3. DMAThe bulk data transfer from fast I/O devices to the memory or from memory to I/O devices

through the accumulator is a time consuming process. For such a situation the direct memory access technique is used. In DMA data transfer data is directly transferred from I/O devices to RAM or from RAM to I/O device. For DMA data transfer the data transfer the data and address buses come under the control of the peripheral device which wants DMA data transfer. The MP has to relinquish the control of the address and data buses for DMA operation on the request of the I/O device. For DMA data transfer the I/O device must have its own registers to store byte count and memory address. It must also be able to generate control signals required for DMA data transfer. Generally such facilities are not available with manufacturers for the interfacing of O.O devices to the microprocessor for DMA data transfer. Such controllers provide all the facilities for DMA data transfer. Intel 8257 and 8237 are DMA controllers

Peripheral I/O device

(DISK)

DMA Controller Memory

CPU

introduction to microprocessor designed by: d k rout 1 introduction to 8085 microprocessor...

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