A New Topology For The Three-Phase to Three-Phase Cycloconverters

Ali Aghabeigi Heris, Meisam Sadeghi, member, IEEE, Ebrahim Babaei, member, IEEE, Faculty of Electrical and Computer Engineering

University of Tabriz Tabriz, Iran.

Email: Ali.Aghabeigi88@ms.tabrizu.ac.ir, Maisam_Sadeghi@ieee.org, e-babaei@tabrizu.ac.ir

Abstract— This paper proposes a new topology for three-phase to three-phase cycloconverters. In the proposed topology, in order to generate the desired output voltage, the main states of switches are decreased in comparison with conventional topologies of three-phase to three-phase cycloconverters which can improve the performance of the cycloconverter. Increasing of the maximum output/input voltage transfer ratio of converter up to 1.5 is one of the main advantages of the proposed cycloconverter. In addition, there is no restriction for generation of output frequency consequently; the proposed cycloconverter can be applied as both step-up and step down converters. The control strategy of cycloconverter is based on pulse width modulation (PWM) method. Using PWM based control strategy, the injected harmonics will be produced around the switching frequency and its multiple coefficients and the size of filters will be decreased. Also, a feedback of output voltage is used in the control strategy of the proposed converter to improve its performance. The proposed cycloconverter is simulated using PSCAD/EMTDC software and simulation results for both balanced and unbalanced load are presented to validate the effectiveness and performances of the new proposed topology.

Keyword components; Cycloconverter; Forced commutated; Matrix converter; Three-phase to Three-phase converter; Bidirectional switch;

I. INTRODUCTION For the direct converters, the cycloconverter is the most

used topology in high-power applications. This topology uses an array of power semiconductor switches to directly connect the power supply to the machine for converting a three-phase ac voltage with a fixed magnitude and frequency to a three-phase ac voltage with variable magnitude and variable frequency [1].

A cycloconverter can be constructed with a range of different configurations from the viewpoint of topology [2-6]. More complex cycloconverter designs have been proposed which use forced-commutated or load commutated techniques to provide a much wider frequency range. However, the need for a load which has the correct characteristics for the load-commutated cycloconverter and

the increased complexity and cost of forced-commutated cycloconverter (FCC) make these circuits unattractive [7].

The main problem in the conventional cycloconverters is low output/input voltage transfer ratio. Most of works on cycloconverter focused on the control strategy to overcome this problem. In [8], the first modulation strategy (in the following Alesina–Venturini (AV) method) allowing the full control of the output voltages and of the input power factor has been derived. The maximum voltage transfer ratio of the proposed algorithm is limited to 0.5 and the input power factor control requires knowledge of the output power factor. A sensible increase of the maximum voltage transfer ratio up to 1.053 is a feature of the fictitious dc link algorithm, presented in [9]. Also, if the input voltages are significantly unbalanced then these methods and structures can not produce the desired output voltage. It is important to note that the forced commutated cycloconverters (FCCs) or matrix converters are direct converters and any unbalance in input sides is immediately reflected to the output side. It is noticeable that the previous works for solving this problem cause to generate low order harmonics in the input and output quantities which can not easily be eliminated.

This paper proposes a new topology for three-phase to three-phase cycloconverters. Using the proposed topology, the preferred output voltage can be generated even with unbalanced input voltages. The proposed topology is independent of the load and it is possible to generate the voltage transfer ratio up to 1.5 without low order harmonics at input and output quantities. Also this topology can be easily developed to n-phase systems. In this paper, conventional topology is introduced for direct conversion of three-phase to three-phase and then the proposed topology and its control method is given. The simulation results will admit the accuracy of mathematical computation.

2011 2nd Power Electronics, Drive Systems and Technologies Conference

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II. CONVENTIONAL THREE-PHASE TO THREE-PHASE CYCLOCONVERTER

FCCs are known as a new generation of power electronic converters which are a kind of power supply with variable amplitude and frequency. These converters convert m numbers of input voltages to n numbers of output voltages without using storage elements. They require bidirectional switches with capability of blocking voltage and conducting current in both directions. In this paper, the common emitter arrangement of the bidirectional switches is used.

Although, a cycloconverter with n power switches can generate n2 numbers of on and off states, but in order to prevention of short-circuit among power supplies (over current constraint) and open circuit of the loads with inductive properties (over voltage constraint), the acceptable states to assure the safe operation of converter will decrease.

This paper focuses on the forced-commutated three-phase to three -phase cycloconverter. A conventional topology of this cycloconverter is shown in Fig. 1, where Av ,

Bv and Cv are the input voltages and Ai , Bi and Ci are the input currents of the converter. The three-phase load is typically resistive-inductive and its voltage and current are

1ov , 2ov , 3ov and 1oi ، 2oi and 3oi , respectively.

Fig. 1. Conventional topology of three-phase to three -phase

cycloconverter

III. PROPOSED THREE-PHASE TO THREE-PHASE CYCLOCONVERTER

A. Proposed topology The maximum voltage amplitude that the conventional

topology of three-phase to three -phase cycloconverter can

generated for a balanced load is limited to imV (amplitude of phase voltage) and this will decrease the transfer ratio of the converter. So, in this paper, a new topology as shown in Fig. 2, has been proposed which can generate the maximum

amplitude of imV3 (amplitude of line voltage) and consequently increase the transfer ratio of the proposed converter in comparison with the conventional topology.

Fig. 2. The Proposed topology of three-phase to three -

phase cycloconverter

As shown in Fig. 2, in the proposed topology the switches are divided in two Master and Slave switches. The main three-phase source feeds a virtual ac link by master switches. The load directly connected to the master switches is called Master load and the two other loads which are fed by virtual ac link using slave switches are called Slave loads.

The main function of the proposed topology is as follows; the state of master switches are changed in accordance with the desired voltage of master load during each time interval and consequently the voltage of virtual ac link will be equals to the line voltage obtained from switching of master switches. So, the voltage of ac link only depends on the master load. The generation of slave loads voltage is based on this fact that the minimum line voltage during each time is equals to the inverse of the maximum value of that voltage. To generate the voltage of slave loads during each time period, the states of slave switches will change as a way that they will be able to produce the desired voltage of slave loads. So, the state of slave switches will depend on the voltage of virtual ac link and the desired output voltage of slave loads.

The input voltages under balanced operation can be considered as below:

)1 ( )120sin()(

)120sin()(

)sin()(

+=

−=

=

tVtv

tVtv

tVtv

iimC

iimB

iimA

ω

ω

ω

Where imV and iω denote the amplitude and angular frequency of the input voltages, respectively.

The fundamental components of the desired output voltages are assumed as follows:

SwitchesMaster SwitchesSlave

Av Bv Cv

Ai Bi Ci

1,oi

3,ov

3,oi

+

−

1mS 2mS 3mS

4mS 5mS 6mS

NS1

PS1

1,ov+ −

PS1

NS1

2,oi

NS2

PS2

2,ov+ −

PS2

NS2

LoadsSlave

LoadMaster

+

−

Virtual aclink

Av

Bv

Cv

1,ov

Ai

Bi

Ci

1,oi+

−2,ov

2,oi+

−3,ov

3,oi+

−

AaS AbS AcS

BaS BbS BcS

CaS CbS CcS

490

)2 ()120sin()(

)120sin()(

)sin()(

3,

2,

1,

+=

−=

=

tVtv

tVtv

tVtv

oomo

oomo

oomo

ω

ω

ω

Where omV and oω denote the amplitude and angular frequency of the desired output voltages, respectively.

It is noticeable that any phase can be considered for the

output voltage in general. The relation between imV and omV can be expressed as converter’s voltage transfer ratio (q) as below:

)3 (im

om

VV

q =

Considering (2), the fundamental component of the output currents for inductive load (R − L) can be calculated as follows:

⎟⎟⎠

⎞⎜⎜⎝

⎛+⎟

⎠

⎞⎜⎝

⎛−+

=

⎟⎟⎠

⎞⎜⎜⎝

⎛−⎟

⎠

⎞⎜⎝

⎛−+

=

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎠

⎞⎜⎝

⎛−+

=

°−

°−

−

120tansin)(

)(

120tansin)(

)(

tansin)(

)(

122

122

122

RL

tRL

Vti

RL

tRL

Vti

RL

tRL

Vti

oo

o

omo

oo

o

omo

oo

o

omo

ωωω

ωωω

ωωω

(4)

B. Control strategy One of the common control methods which can be used

for controlling the waveform of the output voltage is PWM technique which alters the duty cycle of switches at the high switching frequency for attaining output voltage and current at the low frequency. In other words, the PWM modulation technique can control output voltage with suitable switching among the legal states in such a way that the average value of the output voltage becomes equal to desired waveform. Using this control method, the desired sinusoidal voltage is generated by sampled pieces of the input waveforms.

In order to analyze the proposed control method, the

switching frequency in each area is assumed as 1s sf T= . At the beginning of each period, the line to line voltages are sampled and the maximum and minimum voltages of that period are identified. The sampling period of each phase

independently, is divided in to two time intervals, jtmax and

jtmin , as follows:

)5 (jjj

s ttT minmax +=

The switching algorithm will be as a way that in jtmax

period, the switches which are generating the )(max tv , are

fired and in jtmin period, the switches generates the )(min tv ,

are fired. During the time intervaljtmax , the voltage of

)(max tv will be transferred to the output and during the time interval jtmin , the voltage of )(min tv will be transferred to the output and this process will be iterated for the rest of sampling periods.

The relations of the )(max tv and )(min tv can be defined as follows:

)6 ()()(

)sin(3)(

maxmin

maxmax

tvtvtVtv im

−=+= φω

where mV and maxφ denote the amplitude and phase of )(max tv , respectively.

During each sampling period, the time intervals of jtmax and jtmin should be chosen in such a manner that the fundamental component of the generated output voltage follows the waveform of the desired output voltage. Assuming high switching frequency

( os ff >> and is ff >> ) and constant average of )(max tv

and )(min tv , the output voltage can be written as below:

)7( )]()([1)( minminmaxmax tvttvt

Ttv jj

so +=

Substituting, (5) in (7), the time intervals jtmax and

jtmin can be calculated as follows:

)8 (

jks

jk

ki

kos

jk

tTt

k

ttqTt

max,min,

maxmax, 120,120,0

3,2,1,5.0

)sin(32)sin(

−=

−=

=

⎥⎥⎦

⎤

⎢⎢⎣

⎡+

++

=φφω

φω

According to (8), the jtmax and

jtmin can be calculated for each phase independently. During the j-th sampling period,

jtmax and jtmin must be adapted to (5) and the following

inequations:

,3,2,100

min

max =≤≤≤≤ j

TtTt

js

j

js

j

(9)

The accepted states of six master switches and eight slave switches are limited to 6 and 4 states, respectively. Consequently, the accepted modes of the proposed topology, considering the safe operation and control strategy of converter, will decrease to 24 states which can increase the performance of the converter. These acceptable states of master and slave switches are shown in Table I.

491

Fig. 3. The main switching modes of the proposed cycloconverter

TABLE I: Acceptable states of the proposed three-phase to three-phase

cycloconverter

ov On Switches Mode

BA vv − 51 & mm SS 1

Master

CA vv − 61 & mm SS 2

CB vv − 62 & mm SS 3

AB vv − 42 & mm SS 4

AC vv − 43 & mm SS 5

BC vv − 53 & mm SS 6

linkacv PP SS 11 & I

Slave linkacv− NN SS 11 & II

linkacv PP SS 22 & III

linkacv− NN SS 22 & IV

Fig. 3 shows the operational modes of the proposed cycloconverter when ABV generates the maximum voltage.

From the beginning of the modulation time up to jt 2max,

the output voltage of virtual dc link is equals to )(max tv and

up to jt 2min, is equals to )(min tv . Also, Considering (6), the

slave switches should be switched as a way that )(max tv

generated for interval jtmax and )(min tv generated for interval

jtmin . In Fig.3 it is assumed that jjj ttt 2max,3max,1max, << and

BAAB vvvv −==max . For part 1, the ac link voltage equals

to )(max tv , and the voltages of all loads are )(max tv . In part

2, the time interval jt 1max, has finished and consequently the

states of slave switches of first slave load are changed to

generate )(min tv for load. In part 3, the time interval jt 3max,

has finished and the states of master switches are changed; so the states of the slave switches must changed to perform the desired voltages of slave loads. In part 4, the time interval

jt 2max, ends and just the states of slave switches of load 2 are changed to generate the voltage of ac link for load.

Fig. 4. Control block diagram.

Fig. 4 shows the main control block diagram of the proposed converter. In order to improve the accuracy and performance of the converter, the output voltage of converter is sampled and its feedback has been compared with desired output voltage. Then, the produced voltage difference has been added to main reference signal and compensates it.

rterCycloconveLoadSource

VoltagePreferred

omVoω

UnitControl

DriverSwitches

FilterPassLow

+

+

−

+

omV

1

sT

3max,t2max,t

1max,t

0t sTt +0

sT

3max,t2max,t

1max,t

0t sTt +0

2

3

sT

3max,t2max,t

1max,t

0t sTt +0

4sT

3max,t2max,t

1max,t

0t sTt +0

Av Bv Cv

Ai Ci

3,ov+

−

1,ov

+ −

2,ov

+ − LoadsSlave

LoadMaster

+

−

+ − + −

+

−

+ − + −

+

−

+ − + −

Av Bv Cv

Ai Ci

3,ov

1,ov 2,ov

LoadsSlave

LoadMaster

Av Bv Cv

Ai Ci

3,ov

1,ov 2,ov

LoadsSlave

LoadMaster

Av Bv Cv

Ai Ci

3,ov

1,ov 2,ov

LoadsSlave

LoadMaster

492

C. Determination of the maximum output/input voltage transfer ratio According to mentioned algorithm, the output voltage

waveform is generated by the sampled pieces of the input voltage waveforms. In order to avoid the generation of low order harmonics, the modulation frequency must be chosen considerably greater than the input and output frequencies. Considering (8) and (9), it can be written as following:

(10) si

kos T

ttq

T ≤⎥⎥⎦

⎤

⎢⎢⎣

⎡+

++

≤ 5.0)sin(32

)sin(0

maxφωφω

The equation (10), can be simplified as follows:

)11 ( )()( max, vabsolutevabsolute ko ≤

And to validate it for all time periods, we have:

)21 ({ })(min)( max, vabsolutevabsolute ko ≤

In order to validate (11) for all time periods, the maximum amplitude of the preferred voltage should be less than the minimum f )(max tv , so it will be written as:

)31 ( 5.1

5.1≤

≤q

orVV imom

According to the mentioned equations, Fig. 5 illustrates the domain of transfer ratio.

Fig. 5. The restricted domain of the output/input voltage transfer ratio

IV. SIMULATION RESULTS The amplitude and frequency of the input voltages are

V110=imV and, Hzfi 50= , respectively. Also, the load is assumed as LR − with Ω= 60R and mHL 55= . The output frequency and switching frequency are assumed

Hzfo 60= and, kHzfs 2= , respectively. In cycloconverter the voltage transfer ratios is considered 2.1=q ( VVom 132= ), respectively. In the unbalanced operation the input voltages are considered as follows:

)120sin(80)(

)120sin(100)(

)sin(120)(

3

2

1

+=

−=

=

ttv

ttv

ttv

io

io

io

ω

ω

ω

(14)

The proposed cycloconverter is simulated using PSCAD/EMTDC software and simulation results for both balanced and unbalanced load are presented to validate the effectiveness and performance of the proposed topology. Figs. 5(a) and 8(a) show the waveforms of the output voltage and current, respectively. As shown in Fig. 5(a), the output voltage is generated from sampled pieces of the maximum values of the line voltages. So, the maximum instantaneous value of the output voltage is limited to the peak value of the line voltages and this exactly agrees with the results of Table I. Figs. 6(a) and 9(a) show the spectrums of the output voltage and current, respectively. As these figures show, the spectrums of the output voltage and current have the fundamental component ( Hzfo 60= ) and ( fkf s Δ+ ) harmonics, where k is an integer and fΔ is a function of if and of . Since the load of the converters is almost a low pass filter (R−L), then the output current contains less high order harmonics than the output voltage.

Fig. 5. Output voltage, (a) balanced operation, (b) unbalanced operation

Fig. 6. Spectrum of output voltage, (a) balanced operation, (b) unbalanced operation

FFT2

0

FFT2

0FFT

96.132

FFT2

0

][3, VVo

FFT2

0

69.1321,ov

FFT2

0

87.1312,ov

0 k2 k4k1 k3][Hzf

08.120

4.100

46.80

0 k2 k4k1 k3)(a )(b

%119=THD

%115=THD

%118=THD

%145=THD

%182=THD

%242=THD

190][V

][s

3,oV

190−

1,oV

2,oV

)(a )(b005.0 015.0 025.0 005.0 015.0 025.0

imV5.1

imV5.1−

imV3

imV3−

0

ov

493

Fig. 7. Output current, (a) balanced operation, (b) unbalanced operation

Fig. 8. Spectrum of output current, (a) balanced operation, (b) unbalanced operation

Figs. 5(b) and 8(b) show the spectrums of the output

voltage and current under unbalanced operation. As shown in Fig. (5), because of using feedback of output voltage which is used in control strategy, the proposed topology has a good accuracy on generation of desired output voltage. As Figs. (5) and (8) show, current waveforms have less THD and values of THD are reduced with increasing the output voltage amplitude.

V. CONCLUTIONS In this paper a new topology is proposed for three-phase

to three-phase cycloconverters. Using the proposed topology, the maximum voltage transfer ratio of converter has been increased up to 1.5 of input three-phase source amplitude with no restriction for generation of output frequency. Since, the switching periods of each phase are calculated

independently and the outputs are connected to each other through the virtual ac link, the outputs can operate independently and maintain their performance when unbalanced situation occurs. Furthermore, the feedback of output voltage which is used in control strategy to adjust the reference signals, improve the performance of the converter. Furthermore, using virtual ac link, the slave loads and phases can be easily increased and consequently, it will be possible to enhance and improve the converter to three-phase to n-phase cycloconverter. Also, Using PWM based control strategy the injected harmonics will produced around and more than switching frequency and the size of filters can be decreased.

REFERENCES [1] M. H. Rashid, Power Electronics Handbook, 2nd ed. New York:

Academic, 2006. [2] L. Wei and T.A. Lipo, “A novel matrix converter topology with

simple commutation,” in Proc IEEE-IAS Annual Meeting, vol. 3, 2001, pp. 1749–1754.

[3] J.W. Kolar, M. Baumann, F. Schafmeister, and H. Ertl, “Novel three-phase AC–DC–AC sparse matrix converter,” in Proc. IEEE APEC 2002 vol. 2, pp. 287–292.

[4] S. Kwak, “Design and analysis of modern three-phase AC/AC power converters for ac drives and utility interfaces,” Ph.D. dissertation, Texas, A&M University, 2005.

[5] F.Z.Peng, L.Chen, F.Zhang, “Simple Topologies of PWM AC-AC Converters,” IEEE Power Electron Letters, vol. 1, no. 1, March 2003, pp. 10-13.

[6] N.M.Khai, Y.G.Jung, and Y.C.Lim, “A single-phase Z-source cycloconverter (SPZC) based on singlephase matrix converter (SPMC) topology with safe-commutation strategy,” in proc International Symposium on Electrical & Electronics Engineering, 2007, Vietnam, pp. 205-211.

[7] S.Sunter, “A vector controlled matrix converter induction motor drive,” Ph.D. Thesis, University of Nottingham, July 1995.

[8] A. Alesina and M. Venturini, “Solid-state power conversion: A Fourier analysis approach to generalized transformer synthesis,” IEEE Trans. Circuits Syst., vol. CAS-28, pp. 319–330, Apr. 1981.

[9] P. D. Ziogas, S. I. Khan, and M. H. Rashid, “Analysis and design of forced commutated cycloconverter structures with improved transfer characteristics,” IEEE Trans. Ind. Electron., vol. 1E-33, pp. 271–280, Aug. 1986.

2

][ A

][s

3,oi

2−

1,oi

2,oi

005.0 015.0 025.0 005.0 015.0 025.0

)(a )(b

FFT5

0

[1] 0 0012464

FFT5

0

[1] 0 00157199

FFT25

0.0

FFT5

0

FFT5

0

FFT25

.0

0779.2][3, Aio

1,oi

2,oi

0 k2 k4k1 k3][Hzf

859.1

571.1

246.1

0 k2 k4k1 k3

)(a )(b

%7.11=THD

%4.11=THD

%5.11=THD

%5.13=THD

%9.16=THD

%5.22=THD

0716.2

0737.2

494