fyse420 digital electronics lecture 3 - jyväskylän...
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FYSE420 DIGITAL ELECTRONICS
Lecture 3Lecture 3
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DIGITAL LOGICCIRCUIT ANALYSIS& DESIGNNelson, Nagle, Irvin, CarrolISBN 0-13-463894-8
DIGITAL DESIGNMorris Mano
[1]
[2]Morris ManoFourth editionISBN 0-13-198924-3
Digital DesignPrinciples and PracticesFourth editionWakerly John F.ISBN 0-13-186389-4
[3]
2
Definition :
Määritelmä :
Kaksi tilataulukkoa ovat identtiset, jos edellisen taulukonjokaista tilaa vastaa jokin jälkimmäisen taulukon tila siten,että kun lähdetään liikkeelle vastintiloja osoittavilta riveiltä,niin jokainen äärellinen sisäänmenosekvenssi aiheuttaa sa-mat ulostulosekvenssit kummassakin tapauksessa.
Reduction of Flow Tables
mat ulostulosekvenssit kummassakin tapauksessa.
3©Loberg
2,0 -,- 3,- 2,0
3,0 5,1 2,0 -,-
3,0 4,1 -,- 5,03
2
1
00 01 11 10s
Vaatimukset rivien yhdistämiselle
Ulostulot määrätylle syöttökombinaatiolle eivät saaolla ristiriidassa keskenään.
Syötöt eivät saa johtaa tilojen osalta uusiin rivienyhdistämisvaatimuksiin siten, että jälleen synnyt-
Reduction of Flow Tables
-,- 1,1 2,- -,-
-,- -,- 1,1 -,-5
4
Syötöllä 11 on ristiriita riveillä 2 (Z=0) ja 5 (Z=1).
S,Z
Ulostuloissa ei ristiriitaa millään syötöillä riveillä 1 ja 3, mutta syötöllä 10 saadaanyhdistämisvaatimus riveille 2 ja 5, joka todettiin edellä ristiriitaan johtavaksi.
yhdistämisvaatimuksiin siten, että jälleen synnyt-täisivät ristiriitaa edellisen kohdan mukaisesti.
4©Loberg
Tilataulukosta tulee etsiä systemaattisesti kaikki yhdistyvät riviparit.
Tämän jälkeen voidaan etsiä laajempia yhdistämismahdollisuuksia : 3 riviä, 4 riviä, …
Note !
Yhdistyvyys ei ole transitiivinen ominaisuus.
Reduction of Flow Tables
(a,b) ja (b,c) ovat yhdistyviä pareja, mutta siitä EI SEURAA, että a ja c olisivatmyös yhdistyviä.
Esimerkiksi edellissä taulukossa (1,2) ja (2,3) ovat yhdistyviä, mutta (1,3) EI OLE.
Jos c on yhdistyvä yhdistyvän parin (a,b) kummankin alkion kanssa erikseen( (a,c) ja (a,c) ovat yhdistyviä), on myös ((a,b),c) yhdistyvä joukko (a,b,c).
Yhdistyvä joukko on maksimaalinen ellei se ole minkään yhdistyvän joukon alijoukko
5©Loberg
Example 6
d,0 b,0
e,0 a,0
g,0 f,1c
b
a
0 1x
state s
b
c
d
States are equivalent √
States are not equivalent X
√
X
Completely specified sequential circuit.
Reduction of Flow TablesSystematic Reduction
a,1 d,0
a,1 d,0e
d
c,0 b,0f
a,1 e,0g
S,output
Flow table
d
e
f
g
a b c d e f
Empty Implication table
6©Loberg
b d,e States are equivalent √
States are not equivalent X
First StepPlace a cross in any square corresponding to pair of states whose outputs are not equalfor every inputs
Second Step
Starting from the top square in the left
column and going down and then pro-
ceeding with next column.
Reduction of Flow Tables
Example 6
Systematic Reduction Completely specified sequential circuit.
c
d
e
f
g
a b c d e f
X
X
X
X
d,c
X
X
X
X
X
X
X
X
e,ca,b
d,e d,e
√
X X
X
Implication table
States are not equivalent XFrom the flow table we see that (a,b)
implies (d,e), so write (d,e) in the empty
square defined by column a and row b.
States (d,e) are equivalent because of
same next state and they have same
output.
7©Loberg
b
c
d
e
d,e
X
X
X
X X
√ States are equivalent √
States are not equivalent XSquares filled by implaied pair must be
checked.
It must be crossed out if it contains at
least one implaied pair that is not equivalent.
Reduction of Flow Tables
Example 6
Third Step
Systematic Reduction Completely specified sequential circuit.
e
f
g
a b c d e f
X
X
d,c
X
X
X
X
X
e,ca,b
d,e d,e√ √
√
XXX X
X
Implication table
This procedure is repeated until no
additional squares can be crossed out.
The squares without cross definepairs of equivalent states.
(a,b) (d,e) (d,g) (e,g)
Try combine pairs of states into larger groups of equivalent states.
8©Loberg
b
c
d
e
d,e
X
X
X
X
X
X
X
X
√
√
States are equivalent √
States are not equivalent X
Start from the right colum and findfirst square without cross.
(e,g)
Find next column without cross
Reduction of Flow Tables
Example 6
Systematic Reduction Completely specified sequential circuit.
f
g
a b c d e f
X
d,c
X
X
X
e,ca,b
d,e d,e√ √
XXX X
X
Implication table
Column d
If (d,e) and (d,g) are equivalent pairs then we cancombine three pairs into a set of three equivalent states (d,e,g)
(a,b) (c) (d,e,g) (f)Try next column
9©Loberg
(a,b) (c) (d,e,g) (f)
d,0 b,0
b
a
0 1x
state s
d,0 b,0a,b
0 1x
A C D F
0 1x
Reduction of Flow Tables
Example 7
Systematic Reduction Completely specified sequential circuit.
e,0 a,0
g,0 f,1
a,1 d,0
a,1 d,0e
d
c
b
c,0 b,0f
a,1 e,0g
S,output
Flow table
e,0 a,0a,b
g,0 f,1c
d,e,g
a,1
a,1
a,1
d,0
d,0
e,0
f c,0 b,0
A
C
D
0 1
F
D,0 A,0
D,0 F,1
A,1 D,0
C,0 A,0
Reduced flow table
S,output
s
10©Loberg
Incompletely specified sequential circuit.
In asynchronous sequential circuits, the primitive flow table is alwaysincompletely specified.
In synchronous sequential circuit is incompletely specified if certaincombinations of inputs or input sequences never occur because ofinternal or external constrains.
Incompletely specified states can be combined to
Reduction of Flow TablesSystematic Reduction
Incompletely specified states can be combined toreduce the number of states in the flow table.
a,1
b,-Compatible states
c,-
-,-or
Incompletely specified states that can be combined are said to be compatible.
11©Loberg
Determine all compatible pairs by using the implication table.
Find maximal compatibles with the use of a merger diagram.
Find a minimal collection of compatibles that covers all the states and is closed.
Reduction of Flow TablesSystematic Reduction Incompletely specified sequential circuit.
Merging rows
The set of chosen compatibles must cover all the states.
The set must be closed.
The closure conditon is satisfied if :
There are no implied states
The implied states are included within the set
12©Loberg
Example 8
x1x2
a
00 01 11 10
b
c,- a,0 b,-
-,-
-,-
a,- e,-b,1b √
Reduction of Flow TablesSystematic Reduction Incompletely specified sequential circuit.
(a,b) (a,c) (a,d) (b,e) (b,f) (c,d) (e,f)
Compatible pairs
c
d
e
f
b,-
b,-
-,-
-,-
a,- -,-
-,-
a,-
c,-
c,0
d,0
e,1
f,1
f,-
d,-
e,-
Primitive flow table
c
d
e
f
a b c d e
√
√
√
√
√
√
X
X
c,f
c,f
d,e
d,e
d,ec,f
d,ec,f
X
X
X
X
X
XX
X
Implication table
13©Loberg
b √
Compatible pairs
(a,b) (a,c) (a,d) (b,e) (b,f) (c,d) (e,f)
a
bf
(a,b) (a,c,d) (b,e,f)
Maximal compatible
Reduction of Flow Tables
Example 8
Systematic Reduction Incompletely specified sequential circuit.
b
c
d
e
f
a b c d e
√
√
√
√
√
√
√
X
X
c,f
c,f
d,e
d,e
d,ec,f
d,ec,f
X
X
X
X
X
XX
X
Implication table
c
d
e
Merger diagram
There are noimplied states.
(a,c,d) (b,e,f)
All six states from theflow table are included
Both conditions are satisfied
14©Loberg
Example of merger diagram
a
bh
A rectangle with its two diagonals
The four-state compatible ( a,b,e,f )
A triangle
The three-state compatible ( b,c,h )
Reduction of Flow TablesSystematic Reduction Incompletely specified sequential circuit.
Merger diagram
c
d
e
f
g
The three-state compatible ( b,c,h )
A line
The two-state compatible ( c,d )
A dot
A single state ( g ) which is not com-patible with any other state.
15©Loberg
b
c
d
√
√
√X d,e
a,d
b,c
√b,c X
a
be
Six compatible pairs (a,b) (a,d) (b,c) (c,d) (c,e) (d,e)
(a,b) (a,d) (b,c) (c,d,e)
Maximal compatibles
Reduction of Flow Tables
Example 9
Systematic Reduction Incompletely specified sequential circuit.
d
e
a b c d
√
√ √
a,d
b,cX
Implication table
√b,c X
X
Merger diagram
cd
There are several implaid pair of states
16©Loberg
b √b,c
Because of implied states we have to construct the closure table.
(a,b) (a,d) (b,c) (c,d,e)
(b,c) (b,c) (d,e) (a,d)
Compatibles
Implied states
Reduction of Flow Tables
Example 9
Systematic Reduction Incompletely specified sequential circuit.
c
d
e
a b c d
√
√
√ √
X d,e
a,d
b,cX
Implication table
√b,c X
X
(b,c)
Closure table
17©Loberg
(a,b) (a,d) (b,c) (c,d,e)
(b,c) (b,c) (d,e) (a,d)
(b,c)
Compatibles
Implied states
We choose the two compatibles (a,b) (c,d,e)
This set of compatibles will cover all fivestates.
but
Reduction of Flow Tables
Example 9
Systematic Reduction Incompletely specified sequential circuit.
Closure table The set is not closed
The implaid pair of states for (a,b) is (b,c) but (b,c)is not included in the chosen set of (a,b) (c,d,e).
If we choose compatibles (a,d) (b,c) (c,d,e) the set of compatibles will satisfy theclosed-covering condition.
18©Loberg
Originalflow table
a
b
c
d
e
Reducedflow table
Reduction of Flow Tables
(a,d) (b,c) (c,d,e)
Systematic Reduction Incompletely specified sequential circuit.
flow table flow table
Alternative set of compatibles
(a,b) (b,c) (d,e)
There may be more than one possible way of merging rows when reducing a primitiveflow table.
19©Loberg
Race-free state assignment
Critical races can be avoided by making a binary state assignment in such a way thatonly one variable changes at any given time when a state transition occurs in the flowtable.
x1x2
s
a
00 01 11 10
a b c a
a = 00 b = 01
Reduction of Flow Tables
Three-Row Flow-table example
a
b
c
b
a
a
a
b
b
c
ccc
c a
Flow table
c = 11
Transition diagram
20©Loberg
Critical race during transition from a to c ( a = 00 -> c = 11) (b=01)
ac
0011
b01
Non critical race during transition from c to a
Reduction of Flow TablesRace-free state assignment
x1x2
s
a
00 01 11 10
b
c
b
a
a
a
b
b
c
ccc
c a
Flow table
21©Loberg
A race-free assignment can be obtained if we add an extra row to the flow table.
x1x2
s
a
00 01 11 10
a b d a
a=00 b=01
Reduction of Flow TablesRace-free state assignment
x1x2
s 00 01 11 10
Modified Flow table
b
c
b
d
a b c
ccc
d a -c-
Transition diagram
c=11d=10
s
a
00 01 11 10
b
c
b
a
a
a
b
b
c
ccc
c a
Flow table
22©Loberg
A proper operation of sequential circuits
Fundamental mode
One input changing at any time
No critical race
Circuit is on stable state during transition of input variable.
Hazard free logic
Asynchronous Sequential Logic
Hazard free logic
Hazards are unwanted switching transients that may appearat the output of a circuit because different paths exhibit differentpropagation delays.
Hazards may result in a transition to a wrong stable state.
23©Loberg
Types of hazards
Static 1-hazard Static 0-hazard Dynamic hazard
1 1 1
Asynchronous Sequential Logic
0 0 0
24©Loberg
Hazard and its removal
BA
DC00
00 01 11 10
01 1
Asynchronous Sequential Logic
11
10
1 1 1
Minterms DCBA = 1101 and 1111 are covered by product term DCA
25©Loberg
The EndThe End
26©Loberg