ecen 248 lab 7 report

8/10/2019 ECEN 248 Lab 7 Report

1/7

Lab 7: Introduction to Behavioral

Verilog and Logic Synthesis

Rebecca SontheimerECEN 248-511

TA: Mehnaz Rahman

October 29, 2014


2/7

ObjectivesThe purpose of this lab is to introduce behavior modeling in Verilog. This is a

higher-level abstraction that is typically used to improve simplicity and efficiency of

a digital circuit. Behavior modeling describes the behavior of a circuit rather than

describing the specific gates being used. In this lab, we used this new abstraction

using logic synthesis; we then used the written code to create a circuit that could beimplemented. This was also the first time using the Xilinx board, which allowed us

to load our code onto the board and actually see how our program translates to the

hardware.

DesignAttached are the six different source codes that were used during the lab

with comments notating what is occurring in each part of the code. Each source code

is written using behavior Verilog and is run using a given test bench code that is

used to check that the behavior of the circuit is correct and to create a diagram that

displays the waveforms of the described circuit.

ResultsThe waveforms that resulted from each source code are shown below. These

waveforms are created by running the given test bench code with the source code in

order to generate a visual representation of the timing within a certain circuit.

Experiment 1

two_one_behavioral


3/7

four_bit_mux_behavioral

mux_4bit_4to1


4/7

Experiment 2

two_four_decoder

four_two_encoder


5/7

priority_encoder

ConclusionIn conclusion, this lab was very informative on how to program using

behavioral Verilog and also how to physically run the code on the circuit board. I

became acquainted with the programs associated with the Xilinx board and learned

a lot about how to take a desired behavior and translate it to an actual circuit. I alsolearned about the benefits of using behavioral programming and how it differs from

dataflow or structural. It allowed me to give a set of inputs and outputs and let the

program create the proper circuit.

Post-Lab Deliverables1. All code is listed in the design section of this lab.2. Screenshots are provided in the results section of this lab.3. 2:1 Mux Structural

`timescale 1 ns/ 1 psmodule two_one_mux(Y, A, B, S);

output wire Y; //declaring variables to be usedinput wire A, B, S;

wire notS; //declaring wireswire andA;wire andB;

not not0(notS, S); //declaring logic gates and what variables are used within themand and0(andA, notS,A);and and1(andB, S, B);


6/7

or or0(Y, andA, andB);

endmodule //end of module

2:1 Mux Behavioral

`timescale 1 ns / 1 ps`default_nettype none

module two_one_mux(Y, A, B, S);

output reg Y; //output

input wire A, B, S; //inputs including select bit//behavioral begin-end blockalways@(A or B or S)

beginif(S==1'b0) //one bit binary value of zero

Y=A; //if S=0 then Y=Aelse //any other value

Y=B; //if S=1 then Y=B

end

endmodule

Above are shown the two different ways that I have programmed a 2:1Multiplexer using Verilog. The first way is my source code from Lab 6 using

structural programming for the mux and it programs each specific logic gate with

specific inputs and outputs based on the layout of the circuit. The second way issource code from earlier in this lab using behavioral programming to create the

same circuit, but the behavioral programming just dictates what the inputs could

be and what the output is in each case without explaining the inner workings of

the multiplexer. Advantages of the first one would include easy programming if a

schematic has already been given because then it is just coding the specific gates.Advantages of the second one is exactly the opposite of why the first would be

used; we dont care about the inner workings, we just care about the output of thecircuit being correct so we let the program decide what functions it wants to use

and just dictate what it has as an output. This behavioral method makes it easier to

program more intricate circuits because it isnt as important to have every gate

specifically coded, which wastes time and space.4. Bread-boarding and using an FPGA both have their own purposes and their own

merits. I prefer the bread-board because like knowing exactly whats going on,

but it isnt always the best choice. Bread-boarding is great for seeing physically

what is happening within the circuit. I can look at a bread-board and see all of the

different inputs and outputs and know exactly what is going where and it makes iteasier to spot bugs. Having a physical representation of the circuit can be very

informative of what is happening. However, a program can be much easier to useand download onto a FPGA board and it obtains the same result, but sometimes at

the cost of not actually understanding the inner workings of the circuit itself.

Feedback


7/7

1. I liked this lab because it was very informative and useful. I liked that the labmanual was like a tutorial with step-by-step instructions. There was nothing

that I disliked.

2. All parts were very clear and informative.3. No need to improve this lab.

ecen 248 lab 7 report

Documents