forecasting of advanced electronic packaging technologies using bibliometric analysis and fisher-pry...

Forecasting of Advanced Electronic Packaging Technologies Using

Bibliometric Analysis and Fisher-Pry Diffusion Model

Nasir Sheikh* Fredy A Gomez* Yonghee Cho* Jayanth Siddappa**

* PhD Students. Engineering and Technology Management Department. PSU. USA** Master Student. Engineering and Technology Management Department. PSU. USA

AbstractForecasting advanced or emerging technologies by determining their technology diffusion rates is a science and an art because of lack of experiential data. One method to assist in forecasting is data mining and analysis of bibliometric data from a variety of sources such as patents, journal citations, and science awards. This information can then be used in well-known technology diffusion models such as Fisher-Pry where emerging technologies substitute older ones. This paper uses global bibliometric analysis to forecast the growth of advanced or next-generation electronic packaging technologies relying on analogous technology growths.

978-1-890843-23-6/11/$26.00 ©2011 IEEE

Agenda

1. Problem Statement

2. Forecasting Methodology

3. Results Growth Curves

4. Results: Compilation of Growth Curves

5. Lessons Learned

6. Conclusion and Recommendations


Importance

Effects Chip Reliability, Costs, Density, and Integration

1. Problem Statement:Electronic Packaging Evolution

DownstreamUpstream

Chip Production Chip AssemblyReferences: [1], [8], [9], [10], [11]

Source: [9]


Forecast advanced electronic packaging technologies (EP) using bibliometrics such as patents, journal papers, and science research awards.

Use Fisher-Pry Forecasting Method (S-Curves) for diffusion of emerging technologies [2].

Observe relationship between the different types of bibliometrics – lagging and leading S-Curves.

2. Forecasting Methodology

AssumptionAdvanced/Emerging EP Technologies follow Fisher-Pry

Diffusion Model

MethodologyUse of established databases (data sources) and keywords

for bibliometric information – e.g. patents /year from 1990 to 2009 (later information may be incomplete)

Determine % cumulative penetration for each EP technology and for each type of bibliometrics

Fit Fisher-Pry curves to existing data and extend to 2020 to forecast penetration rates

Fisher-Pry Diffusion Model: Represents substitution technologies (when substitution is driven by superior technology and new product presents some technological advantage over the old one)

2. Forecasting MethodologyData Sources

Application Data Sources

Research AwardNational Science Foundation NSF funding data

Journal Papers Science Citation Index SCI

Patents

United States (USPTO)International (PCT)Europe (EPO)Japan (JPO)Korea (KIPO)INPADOC (INPADOC)

2. Forecasting MethodologyKeywords Search

SiP – “System-in-package”

BGA – “Ball Grid Array Packaging”

MEMS – “MEMS Packaging” and “Microelectromechanical

Systems Packaging”

3DIC – “3-D Integrated Circuit Packaging”

WLP – “Wafer Level Packaging”

2. Forecasting MethodologyWorking ExampleMEMS Cumulutive Max 37,667L 100100% Penetration 38,000Assumption: L=100% is represented by 38,000 patents (MEMS Analogy)

Year MEMS - Patents Predicted % Pen.

Pat/Yr % Pen. Fisher-Pry Curve (FP)

t Y {L*10^(A-Bt)}/{1+10^(A-Bt)} log(Y/L-Y) FP-Error Intercept=A

1990 80 0.21 0.22434 -2.67578 -0.01381 -346.7588

1991 77 0.41 0.33369 -2.38209 0.07947

1992 102 0.68 0.49608 -2.16351 0.18550 Slope=-B

1993 119 0.99 0.73692 -1.99795 0.25781 0.1729

1994 126 1.33 1.09340 -1.87155 0.23292

1995 153 1.73 1.61951 -1.75464 0.10944 Error Stats

1996 248 2.38 2.39263 -1.61267 -0.01106 SUMSQ

1997 289 3.14 3.52163 -1.48891 -0.37952 182.53

1998 451 4.33 5.15522 -1.34440 -0.82627

1999 528 5.72 7.48777 -1.21715 -1.76935 Mean Sq Err

2000 728 7.63 10.75604 -1.08275 -3.12183 9.61

2001 1157 10.68 15.21620 -0.92243 -4.53726

2002 2402 17.00 21.08881 -0.68863 -4.08881

2003 3048 25.02 28.46691 -0.47663 -3.44586

2004 3345 33.82 37.20914 -0.29148 -3.38546

2005 3955 44.23 46.87677 -0.10066 -2.64519

2006 4503 56.08 56.78466 0.10617 -0.70308

2007 4526 67.99 66.17793 0.32720 1.81417

2008 4110 78.81 74.44821 0.57040 4.35968

2009 4296 90.11 81.26861 0.95973 8.84454

2010 86.59625

2011 90.58415

2012 93.47497

2013 95.52213

2014 96.94799

2015 97.92966

2016 98.60014

2017 99.05558

2018 99.36380

2019 99.57186

2020 99.71208

Cumulative 34,243

y = 0.1729x ‐ 346.76R² = 0.9862

‐3.00000

‐2.50000

‐2.00000

‐1.50000

‐1.00000

‐0.50000

0.00000

0.50000

1.00000

1.50000

1985 1990 1995 2000 2005 2010

log(Y/L‐Y)

log(Y/L‐Y)

Linear (log(Y/L‐Y))

y = 0.1729x ‐ 346.76R² = 0.9862

‐3.00000

‐2.50000

‐2.00000

‐1.50000

‐1.00000

‐0.50000

0.00000

0.50000

1.00000

1.50000

1985 1990 1995 2000 2005 2010

log(Y/L‐Y)

log(Y/L‐Y)

Linear (log(Y/L‐Y))

0.00

20.00

40.00

60.00

80.00

100.00

120.00

1990

1992

1994

1996

1998

2000

2002

2004

2006

2008

2010

2012

2014

2016

2018

2020

% MEM

S Patent Penetration

Year

% MEMS Patent Forecast

% MEMS Patent Penetration

MEMS Fisher‐Pry Curve

0.00

20.00

40.00

60.00

80.00

100.00

120.00

1990

1992

1994

1996

1998

2000

2002

2004

2006

2008

2010

2012

2014

2016

2018

2020

% MEM

S Patent Penetration

Year

% MEMS Patent Forecast

% MEMS Patent Penetration

MEMS Fisher‐Pry Curve


1. Awards

2. Journal

3. Patents

Methodology employed:

5 Keywords : 3D Integrated Circuit, Wafer Level Packaging, Ball Grid Array, System in Package, MEMS

Search approach: Keywords in all the document

Database : NSF funding data

Date : Feb 10, 2011

Assumption : Maximum value of research awards is represented by 1500 cumulative Analogy

3. Results Growth CurvesResearch Awards

3. Results Growth Curves Cumulative Graph

0

5

10

15

20

25

30

% P

enet

rati

on

Year

BGA Awards Forecast


0.00

20.00

40.00

60.00

80.00

100.00

120.00

% P

enet

rati

on

MEMS Awards Forecast

05

1015202530354045

% P

enet

rati

on

Year

WLP Awards Forecast

0

5

10

15

20

25

30

35

40

% P

enet

rati

on

Year

3DIC Awards Forecast


02468

1012141618

% P

enet

rati

on

Year

SiP Awards Forecast


1. Awards

2. Journal

3. Patents

3. Results Growth CurvesScience Citation Index


Keywords : “3D Integrated Circuit Package”, Wafer Level Packaging, Ball Grid Array, “System in Package”, MEMs

Search : Topic=(Keyword) Timespan=All Years

Databases : SCI-EXPANDED, SSCI, A&HCI

Date : Feb 3 2011

3. Results Growth Curves Cumulative Graph


1. Awards

2. Journal

3. Patents

3. Results Growth Curves Patent Boliven


Keywords : “3D Integrated Circuit Package”, Wafer Level Packaging, Ball Grid Array, “System in Package”, MEMs

Search : General=(Keyword)

Databases : United States (USPTO)International (PCT)Europe (EPO)Japan (JPO)Korea (KIPO)INPADOC (INPADOC)

3. Results Growth Curves Cumulative and Non-cumulative graphs



Compilation of Growth Curves

4. Results:

Max 5 Year Lag

• Research Awards Lead• Journal Citations and Patents Close

4. Results:MEMS Packaging

Max 1 Year Lag

• Patents Lead• Journal Citations Close• Research Awards Lag Significantly

4. Results:BGA Packaging

7+ Year Lag

• Patents Lead• Journal and Research Awards Lag Significantly

4. Results:3DIC Packaging

High Variation

• Journal Citations Lead Initially• Patents Lead After 50% Growth• Research Awards Lag Significantly

4. Results:WLP Packaging

Max 5 Year Lag

• Journal Citations Lead Initially• Patents Lead After 10% Growth• Research Awards Lag Significantly

4. Results:SiP Packaging

5. Conclusions

• BGA and MEMS are very close to the maturity level for commercial application. There is a drastic reduction of patents related with these two technologies.

• SiP, 3DIC and WLP are in earlier stages of their growth curves. High levels of maturity are expected by 2020.

• For advanced EP technologies, research awards are not reliable leading indicators.

• Fisher-Pry growth curves for research awards, journal papers, and patents did not follow completely the expected sequence.

• Journal papers and patents growth curves are close for mature technologies like MEMS and BGA implying strong industry adoption.

6. Recommendations• Strong industry adoption of WLP and SiP. Hence government research awards are nominal.

• For advanced technologies that are closely tied to industrial applications such as electronic/ semiconductor chip manufacturing it may be better to use more industry oriented data mining such as patents, trade shows, number of companies or startups, etc.

• Another step for forecasting could include using industry experts and a Delphi model for forecasting (and further validation).

• More specific keywords are needed in order to come up with more applicable results.

Thanks!

Q&A

BGAThe BGA is descended from the pin grid array (PGA), but in this

case, the pins are replaced by balls of solder stuck to the bottom of the package.

The device is placed on a Printed Circuit Board PCB that carries copper pads in a pattern that matches the solder balls.

The assembly is then heated, causing the solder balls to melt. Surface tension causes the molten solder to hold the package in alignment with the circuit board, at the correct separation distance, while the solder cools and solidifies.

SiPAlso known as a Chip Stack MCM, is a number of integrated

circuits enclosed in a single package or module.

SiP dies are stacked vertically. SiP connects the dies with standard off-chip wire bonds or solder bumps, unlike slightly denser three-dimensional integrated circuits which connect stacked silicon dies with conductors running through the die

3D Integrated CircuitIt is a chip in which two or more layers of active electronic

components are integrated both vertically and horizontally into a single circuit.

WLPWafer-Level Packaging (WLP) refers to the technology of

packaging an integrated circuit at wafer level.

WLP is essentially a true chip-scale packaging (CSP) technology, since the resulting package is practically of the same size as the die

MEMs (MicroElectroMechanical Systems)

Miniature mechanical devices built onto semiconductor chips and have dimensions in the micrometer range.

Usespressure, temperature, chemical and vibration sensorslight reflectors and switchesaccelerometers for airbagsvehicle controlPacemakersGamesinkjet print headsmicroactuators for read/write heads

References

[1] Bolanos, Mario A, Texas Instrument, “Electronics Market and Packaging Technology Trends: Applied Research Opportunities”, 2007.

[2] T.U. Daim, G. Rueda, H. Martin, and P. Gerdsri, “Forecasting emerging technologies : Use of bibliometrics and patent analysis,” Technological Forecasting and Social ChangeSocial Change, vol. 73, 2006, pp. 981 - 1012.

[3] G. Deptuch, J. Hoff, F. Khalid, M. Trimpl, A. Shenai, and T. Zimmerman, “3D-IC technology for future detectors,” 2009, pp. 1-32. http://www-ppd.fnal.gov/EEDOffice-W/ASIC_Development/Assets/Presentations/3D_fnal_gd.pdf

[4] X. Gagnard and T. Mourier, “Microelectronic Engineering Through silicon via: From the CMOS imager sensor wafer level package to the 3D integration,” Microelectronic Engineering, vol. 87, 2010, pp. 470-476.

[5] P. Leduc, “What is 3D IC integration and what metrology is needed ? Outline Challenges of advanced interconnects 3D integration for Integrated Circuits (3D ICs) Applications for 3D ICs 3D IC technologies: Integration approaches and main players Metrology needs,” conference on Frontiers of Characterization and Metrology for Nanoelectronics, 2007, pp. 1-28.

[6] L. Porter, A.T. Roper, T.W. Mason, F.A. Rossini and J. Banks, “Forecasting and Management of Technology”, Wiley, New York (1991).

[7] International IOR Rectifier, “Wafer Level Package Technology”, pp. 0-4.

[8] ITRS, International Technology Roadmap for Semiconductors, “Assembly and Packaging”, 2009

[9] ITRS, Assembly and Packaging Technical Working Group. “The Next Step in Assembly and Packaging”, 2008.

[10] iNEMI, International Electronic Manufacturing Initiative, “Packaging Roadmap Overview”, 2005

[11] VTI. Technologies, “WHAT IS AHEAD IN THE PACKAGING ROADMAP OF MEMS?”, 2006, pp. 1-3.

[12] Ho-Ming Tong, “Microelectronics packaging: present and future,” Materials Chemistry and Physics, 1995.

[13] Yole-Developpemente, 3DIC & TSV Report: Cost, Technologies & Markets, 2007

forecasting of advanced electronic packaging technologies using bibliometric analysis and fisher-pry...

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