Design and Implementation of VLSI Systems(EN1600)lecture07

Sherief RedaDivision of Engineering, Brown University

Spring 2008

[sources: Weste/Addison Wesley – Rabaey Pearson - Baker Wiley]

MOS transistor theory

• Schedule for 4 lectures– Ideal (Shockley) Model– Non-ideal model– Inverter DC characteristics– SPICE

gate-oxide-body sandwich = capacitor

polysilicon gate

(a)

silicon dioxide insulator

p-type body+-

Vg < 0

(b)

+-

0 < Vg < Vt

depletion region

(c)

+-

Vg > Vt

depletion regioninversion region

Operating modes• Accumulation • Depletion• Inversion

• The charge accumulated is proportional to the excess gate-channel voltage (Vgc-Vt)

The MOS transistor has three regions of operation

• Cut off

Vgs < Vt

• Linear (resistor):

Vgs > Vt & Vds < VSAT=Vgs-Vt

Current prop to Vds

• Saturation:

Vgs > Vt and Vds ≥ VSAT=Vgs-Vt

Current is independent of Vds

NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5, VDD = 2.5V, VT = 0.4V

How to calculate the current value?

• MOS structure looks like parallel plate capacitor while operating in inversion– Gate – oxide – channel

• Qchannel = CV

• C = εoxWL/tox = CoxWL (where Cox=εox/tox)

• V = Vgc – Vt = (Vgs – Vds/2) – Vt

n+ n+

p-type body

+

Vgd

gate

+ +

source

-

Vgs

-drain

Vds

channel-

Vg

Vs Vd

Cg

Carrier velocity is a factor in determining the current

• Charge is carried by electrons• Carrier velocity v proportional to lateral E-field

between source and drain• v = μE μ called mobility

• E = Vds/L

• Time for carrier to cross channel:

t = L / v

I=Q/t

• Now we know

– How much charge Qchannel is in the channel

– How much time t each carrier takes to cross

channel

ox 2

2

ds

dsgs t ds

dsgs t ds

QI

tW VC V V VL

VV V V

In linear mode (Vgs > Vt & Vds < Vgs-Vt)

channel

ox 2

2

ds

dsgs t ds

dsgs t ds

QI

tW VC V V VL

VV V V

Can be ignored for small Vds

For a given Vgs, Ids is proportional (linear) to Vds

In saturation mode (Vgs > Vt and Vds ≥ Vgs-Vt)

channel

ox 2

2

ds

dsgs t ds

dsgs t ds

QI

tW VC V V VL

VV V V

22

2

dsatds gs t dsat

gs t

VI V V V

V V

Now drain voltage no longer increases current

pinched off

Operation modes summary

2

cutoff

linear

saturatio

0

2

2n

gs t

dsds gs t ds ds dsat

gs t ds dsat

V V

VI V V V V V

V V V V

Transistor capacitance

Gate capacitance: to body + to drain + to source Diffusion capacitance: source-body and drain-body capacitances

Gate capacitance as a function of Vgs

QuickTime™ and a decompressor

are needed to see this picture.

Source/Drain diffusion capacitance

• Csb, Cdb

• Undesirable, called parasitic capacitance

• Capacitance depends on area and perimeter– Use small diffusion nodes

– Comparable to Cg

– Varies with process

Bottom

Side wall

Side wallChannel

SourceND

Channel-stop implant NA1

SubstrateNA

W

xj

LS

Summary

• Covered ideal (long channel) operation (Shockley model) of transistor

• Next time: short-channel transistors• TA