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Design and Implementation of a DSTATCOM for Power Factor Correction ECE 4600 Group Design Project Progress Report G06 Group Members Matt Borody Bailey Lavallee Nyasha Machoko Chantel Reyes Supervisor Professor Shaahin Filizadeh, Ph. D, P. Eng. January 13, 2014

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Page 1: Design and Implementation of a DSTATCOM for …ece.eng.umanitoba.ca/undergraduate/ECE4600/ECE4600/...Design and Implementation of a DSTATCOM for Power Factor Correction ECE 4600 Group

Design and Implementation of a DSTATCOM for Power

Factor Correction

ECE 4600 Group Design Project

Progress Report

G06

Group Members

Matt Borody

Bailey Lavallee

Nyasha Machoko

Chantel Reyes

Supervisor

Professor Shaahin Filizadeh, Ph. D, P. Eng.

January 13, 2014

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Contents

Glossary ......................................................................................................................................... iii

1.0 Introduction ............................................................................................................................. 1

2.0 Progress Summary .................................................................................................................. 1

2.1 Simulation ........................................................................................................................ 1

2.2 Software ........................................................................................................................... 2

2.3 Hardware .......................................................................................................................... 3

3.0 Future Work ............................................................................................................................ 4

3.1 Software ........................................................................................................................... 4

3.2 Hardware .......................................................................................................................... 5

4.0 Task List.................................................................................................................................. 5

5.0 Gantt Chart .............................................................................................................................. 6

6.0 Budget ..................................................................................................................................... 7

7.0 Conclusion .............................................................................................................................. 7

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Glossary

ADC Analog to Digital Conversion

DSC Digital Signal Controller

DSTATCOM Distribution Static Compensator

IGBT Insulated Gate Bipolar Transistor

IPM Intelligent Power Module

MIPS Million Instructions Per Second

P/CT Potential/Current Transformer

PCB Printed Circuit Board

PLL Phase-Locked Loop

PWM Pulse-Width Modulation

THD Total Harmonic Distortion

VSC Voltage Source Converter

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1.0 Introduction

The goal of this project is to design and implement a solid-state device for power factor

correction. This will be accomplished through the use of a Distribution Static Compensator

(DSTATCOM), which includes a six-pulse Voltage Source Converter (VSC) employing

Insulated Gate Bipolar Transistors (IGBT) and controlled by a decoupled-indirect current

controller method.

2.0 Progress Summary

2.1 Simulation

We began the simulation in September and we originally used the Simulink simulation

environment. At first, Matt was assigned to build and debug the simulation file on his own, but

after a few weeks this time allocation was clearly inadequate and thus a conscious decision was

made to do it as a team. We encountered multiple issues while trying to get the system working

as will be detailed in this section.

One of the major problems encountered was with Simulink pre-made blocks. An example

of this is with the Pulse-Width Modulation (PWM) block. The switching pulse generator had

hard, preset limits which were not compatible with our inputs. It was also difficult to map the

switching pulses generated by the block to the switches in the inverter. Other blocks shared

similar problems, so we decided to create our own blocks for the PWM generation, six-pulse

inverter as well as Forward and Inverse Park Transformations. This customization allowed us to

be sure of the operation of the complex components in our system without relying on the

functionality of the pre-made blocks.

Despite these changes, the system did not function correctly and after the suggestion from

Professor Filizadeh, we decided to switch from Simulink to the PSCAD simulation environment.

After switching software, we still struggled to achieve stability and functionality in the

simulation file. One of the problems was incorrect acquisition of the current controller inputs. In

order to rectify this, we completely redesigned the current controller to allow us to monitor

system variables at both the load and the output of the DSTATCOM. Furthermore, the newly

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designed current controller allowed for complete decoupling of the active and reactive power in

the DSTATCOM.

Following the changes made to the control loops, there were still issues in achieving the

correct operation of the system. After looking further into the derivation of the equations

defining our system, we determined that there was positive feedback in the control loops, which

caused an unwanted response. We were then able to determine how to achieve the correct

feedback of the system. Throughout this stage we worked very closely with Professor Filizadeh

to achieve a working simulation file.

Upon completion of the simulation file we interrogated the system in order to determine

whether it matched the specifications as originally defined, and made parameter modifications

where necessary. Using the newly modified system we were able to specify various hardware

components to match system requirements.

2.2 Software

The software development began at the end of November, and consisted of two major

sections. The first was selecting and ordering required components, followed by setup and

development of source code required for the control algorithm. We decided to develop our

system in the C language as it allowed low level access to the controller while still offering a

variety of integrated mathematical functionality. The software team consists of Matt and Chantel,

with the duties of each member split according to difficulty and estimated time required.

As stated, the first step before developing any code was to select and order the

components required for the development environment. For this, we decided to select a Digital

Signal Controller (DSC) over a microcontroller. The DSC provides a multitude of advantages

over the microcontroller for our particular application, mainly that it offers an integrated high

speed functionality for Sinusoidal PWM, multi-port simultaneous data conversion and access to

an advanced library of mathematical functions. After some research, we selected a DSC made by

Microchip Technology Inc. due to familiarity with the development environment MPLAB X, as

well as experience using Microchip products in the past. We decided upon the

dsPIC33FJ16GS402 processor which has a maximum speed of 40 MIPS as well as the required

PWM outputs and simultaneous data conversion.With neither of the team members particularly

well versed in the C language, comfort in the product was a major advantage.

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The ongoing step in the software stage is development of source code for the components

in the control loop. For this, the tasks were split evenly between Matt and Chantel. The sections

to be divided included: Analog to Digital conversion (ADC), Forward and Inverse Park

Transformations, control loop algorithm, PI controllers, Phase-Locked Loop (PLL), and PWM

outputs. The exact division of labour is outlined in the software section of Table 4.1.

Up to date, the testing setup has been wired, tested and verified on Project Board and is

fully operational. The code required for the Forward and Inverse Park Transformations has been

developed and tested with simulated data, and will be examined after completion of the ADC

module. The PI controller algorithm including anti-windup functionality has been contrived as

well. The setup for the high-speed PWM functionality is near completion and will be configured

to operate at the highest resolution possible. The output logic of the PWM module required to

properly drive the IGBT bridge has been established with the hardware team.

2.3 Hardware

The hardware section of the project began in November, and was split into three basic

sections: signal conditioning and measurement, isolation, and mounting of the VSC. For a

breakdown of task division, see Table 4.1.

The first task that needed to be completed was the signal conditioning circuit. To execute

our current controller algorithm, three sinusoidal signals and one DC signal have to be measured;

these signals are the source voltage, load current, DSTATCOM current, and capacitor voltage.

The first thing we have to do is to step down these signals to safe values which can be fed to the

DSC. The AC signals are measured by current and potential transformers which step down the

sinusoidal quantities to a range between ±5V, however, the DSC ADC requires signals which are

between 0 and 3.6V. A signal conditioning circuit is then required to shift the ±5V signal output

by the PT/CTs to a range between 0 and 3.6V.

One of our major concerns when planning hardware implementation was protection and

isolation. Proper isolation is required to keep the low and high voltage components separate for

safety considerations. The transformers being used to step down and measure AC signals also

provide isolation between the controller and high voltage/amperage signals. A precision isolation

amplifier is used to isolate the DC link voltage from the DSC. The signals from the DSC that

turn on the IGBTs cannot be directly connected to the IGBT, so we had to use digital isolators.

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Usually opto-isolators are used for this, however, we chose digital isolators because of their

speed and reliability. We are also implementing protective measures such as circuit breakers and

fuses to ensure currents above our rated 15A do not flow through the DSTATCOM.

Once we had figured out how to keep the system properly isolated, we began to look into

how we were going to mount the VSC. Originally, we wanted to use a soldering board due to its

ease of use, however, the IGBT bridge IC package is non-standard - the pins are of an irregular

size and spacing - which made a soldering board a non-option. Due to these restrictions, we

opted to design a PCB to accommodate the IGBT bridge.

In summary, to date we have selected most of the hardware components, sketched out the

PCB and begun the digital design, and begun work on the signal conditioning circuit.

3.0 Future Work 3.1 Software

Coming to the completion of this project, there are still a few software modules that will

have to be developed and tested. These include the ADC, the PI testing, PWM module and PLL.

We are aiming to complete the following modules by the beginning of February in order to

facilitate the final system integration process.

Firstly, the ADC module must be completed. For this, we must develop the source code

that will initialize the module on the controller, and come up with a timing scheme to determine

how quickly we can convert the data. The PI controller algorithm is complete and must be tested

following the completion of the ADC module. To do so, we will construct a virtual feedback

loop in the DSC source code and using this loop we can examine the response of a step input to

the PI controller.

The PWM module must be completed and tested for its functionality. Using the ADC

module to process a sinusoidal test signal, we can determine if the outputs of the device are

correct. In the final stages of testing, we will combine these outputs with the IGBT module to

attempt a reconstruction of the same test signal.

The PLL algorithm must be completed and then translated into source code. Because of

the complexity of the system, a decision must be made as to whether we will implement the PLL

on a separate DSC or within the source code of the main controller.

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As stated, we are aiming to complete all the modules individually before combining the

processes into a single control loop algorithm. We will have the complete system operational in

early February in order to combine the controller with the hardware team.

3.2 Hardware

The final stage of the project encompasses the bulk of the hardware work. Some of the

hardware components are already in progress, such as the PCB design, and signal conditioning

implementation; outstanding tasks include PCB construction, the low voltage board design and

construction, and system compilation and testing.

The low voltage board needs to be designed and implemented; this includes testing the

signal conditioning circuit, planning the location of the low voltage components, and

constructing the low voltage part of the project. The high voltage board requires the completion

of the design of the PCB, as well as the printing and construction.

Following completion of the high and low voltage boards, we will begin work on system

construction. This will involve connecting the high and low voltage boards to each other to form

the DSTATCOM, and then connecting the DSTATCOM to the source and load. We will then

proceed with testing the system to ensure it performs satisfactorily.

4.0 Task List

Table 4.1: Tasks List

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5.0 Gantt Chart

Fig

ure

5.1

: G

antt

Char

t

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6.0 Budget

7.0 Conclusion

With two months left remaining in the project, we are currently in the beginning stages of

hardware and software implementation. We are planning to spend a total of $347.88 of our $400

budget, leaving us with just over $50 in emergency funds. Although we have fallen slightly

behind on our original schedule, due to planned contingency time we are confident the project

will be finished on time and within the expected budget.