CRD4630-10

CrystalClear® AC ’97 Six Channel Low Cost PCI Audio Reference Design

Features

l Six Channel Low Cost High Performance PCI Audio Accelerator Add-in Card

lCS4630 PCI Audio Controller with CS4297A and CS4294 AC ’97 Audio Codecs

lComplete Suite of Analog I/O Connections:– Line, Mic, CD, and Aux Inputs– Front, Surround, and Center/LFE Outputs– Headphone Output

lS/PDIF (IEC-958) Digital OutputlCoaxial and Optical S/PDIF Digital InputslPC Beep InputlJoystick/MIDI InterfacelTwo-layer Low Cost Adapter BoardlExceeds the Microsoft® PC 99 Audio

Performance Specifications.lComplies with the Intel® AC ’97 Version 2.1

Specification

DescriptionThe CRD4630-10 is a low cost PCI add-in board refer-ence design that showcases Cirrus Logic’s six channelaudio capabilities. The board contains three stereo out-puts for front L/R, surround L/R, and center/lowfrequency (LFE) speakers. The card features a CS4630controller, CS4297A primary audio codec and CS4294secondary audio codec. The audio codecs include ste-reo 20-bit DACs and stereo 18-bit ADCs.

The CRD4630-10 reference design is available by or-dering the CMK4630-10 manufacturing kit. Use this kitto help you develop high quality PCI add-in cards andPC motherboard audio designs. The CMK4630-10 in-cludes a full set of schematic design files (OrCAD® 7.2format), PCB job files (PADS® ASCII), PCB artworkfiles, and bill of materials. This design is productionready and can easily be modified to meet your specificrequirements.

ORDERING INFOCMK4630-10 (Manufacturing Kit)

Preliminary Product Information This document contains information for a new product.Cirrus Logic reserves the right to modify this product without notice.

1

Copyright Cirrus Logic, Inc. 2000(All Rights Reserved)P.O. Box 17847, Austin, Texas 78760

(512) 445 7222 FAX: (512) 445 7581http://www.cirrus.com

AUX IN

PC BEEP

CD IN

CDR4630-10

MIDI /JOYSTICK

CS4630

CS4297A

CS4294

S/PDIF IN

MIC IN

FRONT OUT

SURR. OUT

CNT/LFE OUT

HP/LINE IN

S/PDIF OUT

S/PDIF IN

DEC ‘00DS445RD10A1

CRD4630-10

TABLE OF CONTENTS1. GENERAL INFORMATION ...................................................................................42. SCHEMATIC DESCRIPTIONS ..............................................................................5

2.1 Block Diagram ............................................................................................52.2 Analog In ....................................................................................................5

2.2.1 CD Input ............................................................................................52.2.2 AUX Input ..........................................................................................52.2.3 Microphone Input ..............................................................................52.2.4 PC_BEEP Input .................................................................................5

2.3 Analog Out ..................................................................................................62.4 Line In + Headphone Out ...........................................................................6

2.4.1 Line Input ..........................................................................................62.4.2 Headphone Output ............................................................................6

2.5 CS4294 .......................................................................................................62.6 CS4297A ....................................................................................................62.7 CS4630 .......................................................................................................72.8 Digital I/O ....................................................................................................7

2.8.1 Joystick/MIDI .....................................................................................72.8.2 S/PDIF ...............................................................................................7

2.9 PCI Bus ......................................................................................................82.10 Power .......................................................................................................82.11 Component Selection ...............................................................................82.12 EMI Components ......................................................................................8

3. GROUNDING AND LAYOUT ................................................................................93.1 Partitioned Voltage and Ground Planes .....................................................93.2 CS4297A/CS4294 Layout Notes ................................................................9

4. REFERENCES .....................................................................................................105. DRAWINGS .........................................................................................................106. BILL OF MATERIALS .........................................................................................29

Contacting Cirrus Logic SupportFor a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:http://www.cirrus.com/corporate/contacts/sales/cfm

Microsoft , Windows 95, Windows 98 and Windows Millennium and WHQL is registered trademark of Microsoft. CrystalClear is a registered trademark of Cirrus Logic, Inc.Intel is a registered trademark of Intel Corporation.OrCAD is a registered trademark of OrCAD, Inc.PADS is a registered trademark of, PADS Software, Inc.

Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product informationdescribes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information containedin this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (expressor implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. Thisdocument is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may becopied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the priorwritten consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronicfiles may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) with-out the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without theprior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarksor service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be foundat http://www.cirrus.com.

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LIST OF FIGURESFigure 1. AC-Link Connections ...................................................................................4Figure 2. CRD4630-10 Block Diagram ......................................................................11Figure 3. Aux, CD, and PC BEEP Inputs ..................................................................12Figure 4. Microphone Input .......................................................................................13Figure 5. Front, Surround, and Center/LFE Outputs .................................................14Figure 6. Line Input and Headphone Output .............................................................15Figure 7. Secondary Audio Codec, CS4294 .............................................................16Figure 8. Primary Audio Codec, CS4297A ................................................................17Figure 9. Audio Controller, CS4630 ..........................................................................18Figure 10. Joystick/MIDI Interface .............................................................................19Figure 11. S/PDIF Output and Inputs ........................................................................20Figure 12. PCI Bus ....................................................................................................21Figure 13. Power Supplies ........................................................................................22Figure 14. Assembly Drawing ...................................................................................23Figure 15. Top Silkscreen .........................................................................................24Figure 16. Top Layer .................................................................................................25Figure 17. Bottom Layer ............................................................................................26Figure 18. Bracket A Drawing ...................................................................................27Figure 19. Bracket B Drawing ...................................................................................28

LIST OF TABLESTable 1. JP2 and JP3 Position Definitions ...................................................................6Table 2. JP1 Position Definitions .................................................................................7Table 3. Bill of Materials.............................................................................................29

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1. GENERAL INFORMATION

The CRD4630-10 is a PCI add-in card that featuresthe CS4630 PCI audio controller coupled with theCS4297A and CS4294 AC ’97 audio codecs. TheCRD4630-10 is a low cost board with a rich featureset and industry-leading audio performance. In or-der to maintain a high level of audio quality, carefulconsideration has been given to component selec-tion and PCB layout. For detailed information onaudio quality measurements in a PC environmentrefer to Personal Computer Audio Quality Mea-surements [6].

The CS4297A and CS4294 are mixed-signal serialaudio codecs compliant with the Intel® Audio Co-dec ’97 Specification [1] (referred to as AC ’97).The CS4297A is compliant with revision 2.1 of theAC ’97 specification, while the CS4294 is AC ’97revision 2.0 compliant. These audio codecs feature20-bit stereo DACs, 18-bit stereo ADCs, and ana-log audio mixers. The CS4297A line-level analogoutputs include: Line Out, Alt Line Out, and MonoOut. The CS4297A line-level analog inputs in-clude: Line In, CD, Video, Aux, Mic1, Mic2, PCBeep, and Phone. The CS4294 line-level analogoutputs include: Line Out and Alt Line Out. TheCS4294 line-level analog inputs include: Line In,CD, Aux, and Mic1. The input signals can be rout-ed to the ADC for recording, or mixed together for

recording and direct playback. The CS4297A aCS4294 have register sets used to control varifeatures such as volume levels, mutes and sigrouting. A high level of audio quality is maintainethroughout the signal chain, exceeding the speccations presented in Chapter 17 of Microsoft’s PC99 System Design Guide [7] (referred to as PC 99).For detailed CS4297A information refer tCS4297A CrystalClear SoundFusion Audio Co-dec ’97 [4]. For detailed CS4294 information referto CS4294 SoundFusion Audio/DockingCodec ’97 [5].

The CS4630 audio controller streams digital audiodata and MIDI over the PCI bus. It also performshardware-controlled signal processing and samplerate conversion. The CS4630 features several pe-ripheral interfaces including MIDI I/O, joystickand game controller input, hardware volume con-trol, and several general purpose I/Os. For detailedCS4630 information refer to CS4630 Crystal-Clear SoundFusion PCI Audio Accelerator [3].

The CS4297A, CS4294, and CS4630 communicatethrough a 5-wire serial digital interface known asthe AC-Link, see Figure 1. The AC-Link is used totransfer digital audio between the devices. It is alsoused to send commands from the CS4630 to the au-dio codec registers. For more information on theAC-Link, see the AC ’97 specification.

CODECSYNC

BIT_CLK

SDATA_OUT

SDATA_IN

RESET#

Digital AC’97Controller

Figure 1. AC-Link Connections

4 DS445RD10A1

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2. SCHEMATIC DESCRIPTIONS

This section describes the CRD4630-10 schematicdesigns shown in figures 1 through 12. These sche-matics are also available in the CMK4630-10 man-ufacturing kit as OrCAD 7.2 files to be used ormodified for individual designs.

2.1 Block Diagram

The block diagram, shown in Figure 2, illustratesschematic section interconnection. The schematicis divided into nine blocks: Analog In, Analog Out,Line In + Headphone Out, CS4294, CS4297A,CS4630, Digital I/O, PCI Bus, and Power.

2.2 Analog In

The CRD4630-10 has three stereo (LINE IN,CD IN, and AUX IN) and two mono (MIC IN andPC SPEAKER IN) analog inputs. See section 2.4.1for LINE IN details.

The 220 pF capacitors located on the MIC input,and the ferrite beads located on the AUX, CD, andPC_BEEP inputs are provided for EMI suppres-sion. These components may be removed if EMCtesting determines they are not required.

All analog inputs except PC_BEEP are AC-cou-pled through a 2.2 µF electrolytic capacitor, mini-mizing the low frequency roll-off. PC_BEEP isAC- coupled through a 0.1 µF capacitor.

2.2.1 CD Input

The CD input, shown in Figure 3, is passed througha divider circuit that does not reduce the voltage.This allows for connection of line-level sources upto 1 Vrms. The divider circuit can be reconfiguredto allow for sources up to 2 Vrms.

The internal CD audio connection, shown inFigure 3, utilizes a pseudo-differential interfacewith CD_COM as the common return path for both

left and right channels. This arrangement reducescommon mode noise picked up along the CD signalpath.

2.2.2 AUX Input

The AUX input, shown in Figure 3, is passedthrough a divider circuit that does not reduce thevoltage. This allows for connection of line-levelsources up to 1 Vrms. The divider circuit can be re-configured to allow for sources up to 2 Vrms.

2.2.3 Microphone Input

The MIC input pre-amp circuit, shown in Figure 4,uses a Motorola MC33078D low noise dual op-amp. One op-amp provides an 18 dB gain stage forthe MIC signal. The other op-amp buffers the phan-tom power supply. Phantom power is derived fromthe +5 V analog supply and buffered by U1A toprovide a maximum of +4.2 V with no load and aminimum of +2.0 V under a 0.8 mA load, as re-quired by PC 99. Also included are 3 dB rolloffs at60 Hz and 15 kHz, as recommended by PC 99.

An alternate, low-cost MIC circuit is also offered.This circuit maintains the PC 99 requirements forboth MIC phantom power and frequency response,without providing any boost. The optional primaryaudio codec, CS4201, contains up to 30 dB of inter-nal microphone boost. If replacing the CS4297Awith a CS4201, external boost is not needed.

Both the CS4297A and CS4294 receive the MICsignal. This allows for several capture options.

2.2.4 PC_BEEP Input

The PC_BEEP input, shown in Figure 3, routes thePC’s beep tones through the CS4297A. A PC BeBypass feature is used that allows system betones to be heard during a system reset or boot-

DS445RD10A1 5

CRD4630-10

2.3 Analog Out

The CRD4630-10 has three stereo output signalsproviding six channels of audio output(FRONT OUT, SURROUND OUT, andCENTER/LFE OUT).

The FRONT, SURROUND, and CENTER/LFEoutputs, shown in Figure 5, provide 1 Vrms line-level outputs. The 220 pF capacitors provided arefor EMI suppression and may be removed if EMCtesting determines they are not required. Each out-put is AC-coupled through a 10 µF electrolytic ca-pacitor, minimizing the low frequency roll-off.Also provided are 220 kΩ bleed-off resistors,maintaining the audio jacks at 0 V DC.

2.4 Line In + Headphone Out

Audio jack J20, shown in Figure 6, receives eitherthe LINE input or the HEADPHONE output. Setjumpers JP2 and JP3 according to the positions list-ed in Table 1 to determine the functionality of J20.

The 220 pF capacitors provided are for EMI sup-pression. These components may be removed ifEMC testing determines they are not required.

2.4.1 Line Input

The LINE input, shown in Figure 6, is passedthrough a divider circuit reducing the voltage by6 dB allowing connection of line-level sources upto 2 Vrms. This input is AC-coupled through2.2 µF electrolytic capacitors to minimize the lowfrequency roll-off.

2.4.2 Headphone Output

The HEADPHONE output circuit, shown inFigure 6, consists of a Philips TDA1308 low noiseheadphone amplifier connected to theALT_LINE_OUT signal of the CS4297A. The cir-

cuit has a gain of 3 dB and is capable of driving ste-reo headphones with impedances of 32 Ω orgreater. The TDA1308 uses a single ended supplyand is biased with Vref from the CS4297A. R119and R120 are included for short-circuit protection.

An option is provided to bypass the amplifier whenreplacing the CS4297A with a CS4201 audio co-dec. Since the CS4201 contains an integrated head-phone amplifier, an external headphone amplifiercircuit is not needed.

2.5 CS4294

The CS4294, shown in Figure 7, acts as the second-ary audio codec for the CRD4630-10. This audiocodec receives the CRD4630-10 AUX, CD, MIC,and LINE analog inputs. The CS4294 LINE_OUTand ALT_LINE_OUT signals connect respectivelyto the CRD4630-10 SURROUND OUT and CEN-TER/LFE OUT speaker jacks. All the signals areAC-coupled.

The primary audio codec, CS4297A, generates theBIT_CLK AC-Link signal for the CS4294. TheSDATA_IN/ASDIN2 AC-Link signal, created bythe CS4294, is used to communicate with theCS4630. ASDIN2 has a 47 Ω series termination re-sistor to prevent reflections on the AC-Link.

2.6 CS4297A

The CS4297A, shown in Figure 8, acts as the pri-mary audio codec for the CRD4630-10. This audiocodec receives the CRD4630-10 PC_BEEP andMIC analog inputs. The CS4297A LINE_OUT andALT_LINE_OUT signals connect respectively tothe CRD4630-10 FRONT OUT and HEAD-PHONE OUT speaker jacks. All the signals areAC-coupled. Unused analog inputs should be tiedto Vrefout (CS4297A pin 28) or AC-coupled toground through a capacitor to prevent noise.

The BIT_CLK and SDATA_IN/ASDIN AC-Linksignals, created by the CS4297A, are used to com-municate with the CS4630. Both outputs have a

JP2 JP3 Signal Enabled1-2 1-2 Line Input2-3 2-3 Headphone Output

Table 1. JP2 and JP3 Position Definitions

6 DS445RD10A1

CRD4630-10

47 Ω series termination resistor to prevent reflec-tions on the AC-Link.

An option is provided to replace the CS4297A witha CS4201 audio codec. In this case, C131 will needto be changed to a 2.2 µF ceramic capacitor.

2.7 CS4630

The CS4630 audio controller, shown in Figure 9,acts as a bridge between the PCI bus and the audiocodecs. Communication between the CS4297A,CS4294, and CS4630 is achieved through the AC-Link signals. The CS4630 generates three AC-Linksignals, SYNC, SDOUT, and RESET#. The SYNCand SDOUT outputs have a 47 Ω series terminationresistor to prevent reflections on the AC-Link.

An external EEPROM, U7, is used to provide aVendor ID and Subsystem ID to the CS4630 atpower-up. The EEPROM is connected to theCS4630 through a data and clock signal, EEDATand EECLK. The EEPROM interface is enabled byconnecting the EEPDIS pin to digital ground.

The CS4630 requires three power supply voltages:+3.3 V, +5 V, and +2.5 V. The PCIVDD pins sup-ply +3.3 V to the CS4630 PCI bus drivers. TheCRYVDD pin supplies +3.3 V to the internal phaselock loop and crystal oscillator. The VDD5REF pinis a +5 V pseudo supply for the PCI bus drivers.This supply enables the PCI interface to support+5 V signals. The CVDD pins supply +2.5 V to thecore stream processor inside the CS4630. All pow-er supply pins have a 0.1 µF decoupling capacitorconnected to digital ground.

Unused inputs and bidirectional pins on theCS4630 are tied to their respective inactive levelsthrough 220 kΩ resistors.

2.8 Digital I/O

The CRD4630-10 digital I/O capabilities includethe Joystick/MIDI interface as well as severalS/PDIF I/O options: S/PDIF optical output, S/PDIFoptical input, and S/PDIF coaxial input.

2.8.1 Joystick/MIDI

The MIDIOUT buffer driver circuit, shown inFigure 10, provides the +5 V TTL compatible out-put on J12. If a +3.3 V compatible output is suffi-cient, remove this circuit and populate R65 tobypass the buffer circuit. Capacitors C71, C78,C81, C84, C86, and C89 are provided for EMI sup-pression and can be removed if EMC testing showsthey are not required. Capacitors C72, C75, C79,C82, C87, C90, C91 and C95 are functional to thejoystick circuitry, as well as provide for EMI sup-pression, and must not be removed.

The Joystick/MIDI output on the CRD4630-10 isnot located on the primary bracket, shown inFigure 18. A short cable is provided to bring theJoystick/MIDI signal to a secondary bracket,shown in Figure 19, when using an analog joystick.If using a USB joystick, the secondary bracket isnot needed.

2.8.2 S/PDIF

The S/PDIF (IEC-958) input and output designs,shown in Figure 11, are compatible with digital in-puts and outputs on consumer devices such as con-sumer stereo receivers and MiniDisc recorders.The CRD4630-10 includes an optical S/PDIF out-put and two S/PDIF input choices, optical and co-axial. As shown in Table 2, jumper JP1 controlswhich input is enabled.

JP1 Signal Enabled1-2 S/PDIF In Coaxial2-3 S/PDIF In Optical

Table 2. JP1 Position Definitions

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The S/PDIF output operates at a fixed sampling fre-quency of 48 kHz. The S/PDIF inputs are capableof accepting S/PDIF signals with a sample frequen-cy from 22 kHz up to 48 kHz.

The optical S/PDIF input and output use industrystandard TOSLINK, a digital optical transmitterand receiver. The input uses a Toshiba TORX-173digital optical receiver. The output uses a ToshibaTOTX-173 transmitter.

2.9 PCI Bus

The PCI Local Bus Specification, Revision 2.2 [2]requires each unused +3.3 V power pin be connect-ed with an average of 0.01 µF capacitance. Three0.047 µF capacitors in parallel, shown inFigure 12, provide the required capacitance. Anoption to omit the +3.3 V regulator is offered if thisvoltage is known to be provided on the PCI bus.This is done by populating several 0 Ω resistors:R84, R85, and R86.

2.10 Power

The CRD4630-10 has three linear voltage regula-tors, shown in Figure 13, supplying the three re-quired power supply voltages: +5 V, +3.3 V, and+2.5 V. The +5 V supply is used exclusively for theanalog audio circuitry surrounding the CS4297Aand CS4294. The +3.3 V supply is used for the au-dio codecs and controller. The +2.5 V supply, la-beled +CVDD, is used exclusively for the CS4630.

The +3.3 VD and +CVDD digital power signals aresupplied from the +5 V_PCI signal located on the

PCI bus. A LM1117CST-3.3 regulator suppli+3.3 VD while a LM2937IMP-2.5 regulator suplies +CVDD. A separate regulator is recommened for the analog voltage supply to provide gooaudio signal quality. A Motorola MC78M05 reglates the +12 VD supply from the PCI bus down a clean +5 VA analog supply. For the best audperformance, the analog voltage regulator shoube located near the audio codecs.

2.11 Component Selection

Great attention was given to the particular compnents used on the CRD4630-10 board with coperformance, and package selection as the most important factors. Listed are some of the guidelinused in the selection of components:

• No components smaller than 0805 packa

• Single package components; no resistor

• 8-pin devices are in surface mount packa

2.12 EMI Components

A number of capacitors and inductors are into meet EMI compliance tests. These comvalues are suggestions only. Actual componeues will depend on your PC board layout andesign factors. Modify these values as neeorder to achieve an acceptable EMI profile. refer to Printed Circuit Board Design Techniqufor EMC Compliance [8] for further informationEMI compliance techniques.

8 DS445RD10A1

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3. GROUNDING AND LAYOUT

The component layout and signal routing of theCRD4630-10 provides a good model for laying outyour own PCI add-in card. PCI bus based add-incards have explicit requirements on trace lengthsthat are not imposed on motherboard designs.These trace length limits for add-in cards are as fol-lows:

• Maximum trace length for 32-bit signals on 32-bit and 64-bit cards is 1.5 inches.

• Maximum trace lengths for signals on the 64-bit extension are 2 inches.

• Trace length for the PCI CLK signal is2.5 inches ± 0.1 inch.

• The PCI CLK signal must drive only one load.

Please refer to the PCI Local Bus Specification, Re-vision 2.2 [2] for information on routing PCI bussignals on a motherboard.

3.1 Partitioned Voltage and Ground Planes

The CRD4630-10 is partitioned into separate digi-tal and analog sections to prevent digital noise fromaffecting the performance of the analog circuits.The analog section is completely isolated from thedigital section, with each section having their ownseparate ground plane. All analog components,power traces and signal traces are routed over theanalog ground plane. Digital components, powertraces and signal traces are not allowed to crossoverinto the analog section.

The audio codecs, CS4297A and CS4294, are lo-cated over the transition point between the analogand digital ground planes. The pins are arranged onthe audio codecs so that the analog and digital sig-nals are separated from each other. The analog and

digital ground planes must be tied together for tcodec to maintain proper voltage references. Fbest results, the two ground planes are tied togewith a single wide trace between the CS4297A athe CS4294, near their digital ground pins.

Data converters are generally susceptible to noon the crystal pins. In order to reduce couplinnoise on these pins, the area around the crystal its signal traces is filled with copper on the top abottom of the PCB and attached to digital groun

A separate chassis ground provides a refereplane for all the EMI suppression components. Tchassis ground plane is connected to the anaground plane at the external jacks.

3.2 CS4297A/CS4294 Layout Notes

Refer to the CS4297A CrystalClear SoundFu-sion Audio Codec ’97 [4] and the CS4294 Sound-Fusion Audio/Docking Codec ’97 [5] data sheetsfor partitioning and bypass capacitor placement.Pay close attention to bypass capacitors on theREFFLT, AFLT1, AFLT2 pins, and power supplycapacitors.

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4. REFERENCES

1) Intel®, Audio Codec ’97 Component Specification, Revision 2.1, May 22, 1998.http://developer.intel.com/ial/scalableplatforms/audio/

2) PCI Special Interest Group, PCI Local Bus Specification, Revision 2.2, December 18, 1998.http://www.pcisig.com/developers/specification/

3) Cirrus Logic, CS4630 CrystalClear SoundFusion PCI Audio Accelerator Data Sheethttp://www.cirrus.com/pubs/cs4630.pdf

4) Cirrus Logic, CS4297A CrystalClear SoundFusion Audio Codec ’97 Data Sheethttp://www.cirrus.com/pubs/cs4297A.pdf

5) Cirrus Logic, CS4294 SoundFusion Audio/Docking Codec ’97 (AMC’97) Data Sheethttp://www.cirrus.com/pubs/cs4294.pdf

6) Steve Harris, Clif Sanchez, Personal Computer Audio Quality Measurements, Ver 1.0http://www.cirrus.com/pubs/meas100.pdf

7) Microsoft®, PC 99 System Design Guide, Version 1.0, July 1999,http://www.microsoft.com/hwdev/desguid/

8) M. Montrose. Printed Circuit Board Design Techniques for EMC Compliance, IEEE Press, New York:1996.

5. DRAWINGS

• Schematic drawings

• Layout drawings

• Bracket drawings

10 DS445RD10A1

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D4630-10

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LINE IN + HEADPH. OUT

NALOG OUT

LINE_OUT_R_2LINE_OUT_L_2

ALT_LINE_OUT_L_2ALT_LINE_OUT_R_2

LINE_OUT_LLINE_OUT_R

POWER

ANALOG IN

MIC_IN_2

CD_IN_R

CD_IN_LCD_COM

PC_BEEP

AUX_IN_RAUX_IN_L

MIC_IN_1

LINE_IN_RLINE_IN_L

ALT_LINE_OUT_RALT_LINE_OUT_L

AVREF

HP_OUT_C

PCI_BUS

PA

R

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OP

#

TR

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FR

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INT

A#

RS

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RR

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DIGITAL I/O

JBCX

JACY

MIDIOUT

JBCY

JACX

JAB2

JBB2

MIDIIN

JAB1

JBB1

SPDIF_RXSPDIF_TX

CS4630

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JAB1

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VS

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SE

RR

#

CLK

C/B

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PA

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JAB2

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ABITCLK

INT

A#

JACY

SPDIF_RX

ASDIN

IDS

EL

JBB1

FR

AM

E#

MIDIOUT ARST#

ST

OP

#

RE

Q#

JBCX

ASYNC

TR

DY

#

JBCY

ASDOUT

SPDIF_TX

MIDIIN

JACX

JBB2

ASDIN2

CS4294

ASDIN2

ASYNCARST#

MIC_IN_2

LINE_OUTR_2

ALT_LINE_OUTL_2ALT_LINE_OUTR_2

LINE_OUTL_2

ASDOUTABITCLKAUX_IN_L

AUX_IN_R

CD_IN_LCD_GNDCD_IN_R

LINE_IN_LLINE_IN_R

CS4297A

ASYNC

ASDOUT

ASDIN

ARST#

ALT_LINE_OUT_LALT_LINE_OUT_R

LINE_OUT_LLINE_OUT_R

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MIC_IN_1

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AVREF

HP_OUT_C

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+12VA ----> +5VA+5V PCI -----> +3.3VD+5V PCI -----> +CVDD

Figure 2. CRD4630-10 Block Diagram

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GND

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%, for R102 and R104.

L11

31@100MHz

L14

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31@100MHz

J19

2X1HDR-SN/PB

12

R108

4.7K

C1482700pFX7R

C147

0.1uFX7R

J17

4X1HDR-AU

1234

L12

31@100MHz

L10

31@100MHz

R107

47K

C144

2.2uFELEC

+R101

100

R98

100

R102

100

R105

100

R103

47K

C142

2.2uFELEC

+

R99

47K

R97

100

AGND

A

A

A

AGNDDGND

AGND

AGND

PC_BEEP

AUX_IN_R

AUX_IN_L

CD IN

PC SPEAKER IN

AUX IN

For 2Vpp CD IN signal:1) Populate 6.8 kOhms, 1

2) Populate 3.4 kOhms, 1

For 2Vpp AUX IN signal:1) Populate 6.8 kOhms, 1%, for R97, R99, R101 and R103.

Figure 3. Aux, CD, and PC BEEP Inputs

CR

D4630-10

DS

445RD

10A1

13

_IN_2

_IN_1

R17 2.7K

R13

47K

R8

47K

R1 47K

R18

68K

R14 0

C60.1uFX7R

R50

C4

0.068uFX7R

J6

PHONO-1/8

43521

R15

47K

U1AMC33078D

3

21

84

+

-

R19

100K

R46.8K1%

C50.1uFZ5U

U1BMC33078D

5

67

84

+

-

C210uFELEC

+

C1510uFELEC

+

C1 220pFX7R

C3220pFX7R

C12220pFX7R

C13

2.2uFELEC

+

C11

2.2uFELEC

+

AGND

AGND

+5VA

+5VA

+5VA

CGND

AGND

AGND

AGND

AGND

AGND

AGND

+5VA

AGND

MIC

MIC

Place close topins 4 and 8

Connect CGNDto AGND atthe jack

MIC IN

Do not populateR5 & C6 forPre-Amp MicCircuit

Do not populateR14 when usingPre Amp MicCircuit

1) Do not populate U1, R18, R19, R8, R15, R1, R4, C1, C2 and C5.For Microphone Circuit without Op Amp:

2) Populate R14, R5 and C6

3) Populate:

1.5K for R13

100 ohm for C4 (fits on the same pad)

0.22uF for C13

2.2K for R17

Figure 4. Microphone Input

CR

D4630-10

14D

S445R

D10A

1

/LFE

UND

J15

PHONO-1/8

4

21

J16

PHONO-1/8

4

21

R89220K

J14

PHONO-1/8

4

21

R90220K

C112 10uFELEC

+

C111 10uFELEC

+

C114220pFX7R

C113220pFX7R

AGND

AGND

AGND CGND AGND

LINE_OUT_R_2

LINE_OUT_L_2

ALT_LINE_OUT_L_2

ALT_LINE_OUT_R_2

LINE_OUT_L

LINE_OUT_R FRONTOUT

Connect CGNDto AGND at thejack.

Connect CGNDto AGND at thejack.

Connect CGNDto AGND at thejack.

CENTEROUT

C116 10uFELEC

+

C115 10uFELEC

+

R91220K

R92220K

AGND

C118220pFX7R

C117220pFX7R

CGND

SURROOUT

C122220pFX7R

C121220pFX7R

CGND

R93220K

R94220K

AGND

C120 10uFELEC

+

C119 10uFELEC

+

Figure 5. Front, Surround, and Center/LFE Outputs

CR

D4630-10

DS

445RD

10A1

15

R109 C149

F

R120

101/4W

R119

101/4W

HEADPH_OUT_L

HEADPH_OUT_R

LINE_IN_L

LINE_IN_R

F

JP3

3x1 HDR

123

R111

6.8K1%

R1106.8K1%

6.8K1%J20

PHONO-1/8

4

21

JP2

3x1 HDR

123

C150220pFX7R

C152220pFX7R

2.2uELEC

C160

1uFELEC

+

R116

47K

R117

47K

C1590.1uFZ5U

C154

220uFELEC

+

U15A

TDA1308

3

21

84

+

-

C156 22pFNPO

C155

220uFELEC

+

R118

27K1%

U15B

TDA1308

5

67

84

+

-

R115 39K1%

R114

27K1%

HEADPH_OUT_L

HEADPH_OUT_R

AGND

CGND

AGND

AGND

CGND

AGND

AGND

+5VA

+5VA

+5VA

AGND

AGND

HP_OUT_C

ALT_LINE_OUT_L

AVREF

ALT_LINE_OUT_R

For CS4201 as Primary Codec:

LINE IN/HEADPHONEOUT

Connect CGNDto AGND at thejack.

1. Only populate C160 when CS4201 is primary codec.

2. Place near Headphone Out audio jack.

1) Do not populate U15, C153, C156 and C159.

3) Populate C160 with 1uF ELEC.

Place closeto pins 4and 8 onTDA1308

2) Populate R114, R113, R119, R118, R115and R120 with 0 Ohms.

C151

2.2uELECR112

6.8K1%

C153 22pFNPO

R113 39K1%

Figure 6. Line Input and Headphone Output

CR

D4630-10

16D

S445R

D10A

1

C441000pFNPO

C361000pFNPO

2

LINE_OUTR_2

ALT_LINE_OUTL_2ALT_LINE_OUTR_2

LINE_OUTL_2

TK

R39 47

C460.01uFX7R

C281000pFNPO

C501000pFNPO

C231000pFNPO

C250.1uFX7R

C240.1uFX7R

C551000pFNPO

C491000pFNPO

C291uFY5V

U3CS4294

LINE_OUT_R 30

AVdd231

ALT_LINE_OUT_L 33ALT_LINE_OUT_R 34

AVss2 32

DVdd12

XTL_IN4XTL_OUT3

DVss1 5

SDATA_OUT 6BIT_CLK 7DVss2 8

SDATA_IN 9

SYNC 11

DVdd210

RESET# 12

AUX_L14AUX_R15

CD_L16CD_GND17CD_R18MIC119

LINE_IN_L20LINE_IN_R21

AVdd122 AVss1 23

REFFLT24 Vrefout25

AFLT126AFLT227

LINE_OUT_L 29

FLT3D41FLTI42FLTO43

GPIO3 1GPIO4 48GPIO5 47GPIO6 46GPIO7 45GPIO8 44

ID0# 35ID1# 28

BCM# 13

AVdd336AVdd438 AVss3 37

AVss4 39AVss5 40

C301uFY5V

C520.1uFZ5U

C420.1uFZ5U

C310.1uFZ5U

C340.1uFZ5U

C380.1uFZ5U

C410.1uFZ5U

AGND

DGND

+3.3VD +5VA

AGNDAGNDDGND

DGND AGND

+5VA+3.3VDAGND

ASDINASYNCARST#

MIC_IN_2

ASDOUABITCLAUX_IN_L

AUX_IN_R

CD_IN_LCD_GNDCD_IN_R

LINE_IN_LLINE_IN_R

Figure 7. Secondary Audio Codec, CS4294

CR

D4630-10

DS

445RD

10A1

17

FC1291000pFNPO

C1301000pFNPO

AGND

ASDOUT

ALT_LINE_OUT_R

LINE_OUT_LLINE_OUT_R

ABITCLK

ALT_LINE_OUT_L

HP_OUT_C

R96 47

Y1

24.576 MHz

C1351000pFNPO

C1361000pFNPO

C1340.1uFX7R

R95 47

C1251000pFNPO

U14

CS4297A

LINE_OUT_R 36

MONO_OUT 37

AVdd238

ALT_LINE_OUT_L 39

nc7 44

ALT_LINE_OUT_R 41

AVss2 42

nc6 43nc5 40FLTO 34FLTI 33FLT3D 32BCFG 31

DVdd11

XTL_IN2XTL_OUT3

DVss1 4

SDATA_OUT 5BIT_CLK 6

DVss2 7

SDATA_IN8SYNC10

DVdd29

RESET#11

PC_BEEP12PHONE13AUX_L14AUX_R15VIDEO_L16VIDEO_R17CD_L18CD_GND19CD_R20MIC121MIC222LINE_IN_L23LINE_IN_R24

AVdd125 AVss1 26

REFFLT27Vrefout28AFLT129AFLT230 S/PDIF_OUT 48EAPD 47ID1# 46ID0# 45

LINE_OUT_L 35

C12322pFNPO

C12422pFNPO

C1260.01uFX7R

C1271000pFNPO

C1281000pNPO

C1320.1uFX7R

C1331uFY5V

C1400.1uFZ5U

C1410.1uFZ5U

C1380.1uFZ5U

C1311uFY5V

C1370.1uFZ5U

C13910uFELEC

+

DGND

AGND

DGND

DGND

AGND AGND

+3.3VD

AGND

DGND

+3.3VD +5VA

AGND

+5VA

ASYNCASDIN

ARST#

PC_BEEP

MIC_IN_1

AVREF

Note: For CS4201 asprimary codec populateC131 with 2.2uF.

Figure 8. Primary Audio Codec, CS4297A

CR

D4630-10

18D

S445R

D10A

1

L7

120 @ 100MHz

C631000pFNPO

20K

R88220K

R75220K

C620.1uFZ5U

+3.3VD

DGND

DGND DGND

AD[31..0]

#

SPDIF_RXSPDIF_TX

CS4630 AUDIOACCELERATOR

R67 47R68 47

U7

24LC00

SCL 6SDA 5

Vcc 8nc11nc22 nc4 7

Vss4 nc33

R73 4.7K

R722

R70220K

R76220K

R69 220K

R62 220K

C610.1uFZ5U

C690.1uFZ5U

C670.1uFZ5U

C680.1uFZ5U

C990.1uFZ5U

C980.1uFZ5U

C970.1uFZ5U

C930.1uFZ5U

C830.1uFZ5U

C850.1uFZ5U

C800.1uFZ5U

C770.1uFZ5U

C660.1uFZ5U

C920.1uFZ5U

U10

CS4630-CM

TEST65

INTA#109RST#110PCICLK111PCI_GNT#112PCI_REQ#113

CBE[3]# 126

IDSEL127

CBE[2]# 14FRAME#15IRDY#24TRDY25DEVSEL#28STOP#31PERR#32SERR#33PAR34

CBE[1]# 35CBE[0]# 46

AD[31] 116AD[30] 117AD[29] 118AD[28] 119AD[27] 120AD[26] 123AD[24] 125AD[25] 124AD[23] 2AD[22] 3AD[21] 4AD[20] 5AD[19] 6AD[18] 9AD[17] 10AD[16] 11AD[15] 36AD[14] 37AD[12] 41AD[11] 42

AD[13] 40

AD[10] 43AD[9] 44AD[8] 45AD[7] 49AD[6] 50AD[5] 51AD[4] 52AD[3] 53AD[2] 54AD[1] 55AD[0] 56

JACX66

JACY67

JAB1/SDO270JAB2/SDO371

JBCX68

JBCY69

JBB1/LRCLK72JBB2/MCLK73

MIDIOUT77 MIDIIN74

PCIGND[0] 115PCIGND[1] 121PCIGND[2] 1PCIGND[3] 7PCIGND[4] 30PCIGND[5] 38PCIGND[6] 48PCIGND[7] 57

CRYVDD 91CRYGND 94

CGND[0] 26CGND[1] 13CGND[2] 76CGND[3] 79CGND[4] 89

ABITCLK/SCLK96

ASDOUT/SDOUT97

ASDIN/SDIN98

ASYNC/FSYNC99ARST#100

SDIN2/GPIO/SENSE_VAUX88VOLUP/XTALI92VOLDN/XTALO93EECLK/GPOUT/PCREQ#101EEDAT/GPIO2/PCGNT#102

CVDD[0]27CVDD[1]12

PCIVDD[8]75

CVDD[2]78CVDD[3]90

PCIVDD[1]122 PCIVDD[0]114

PCIVDD[2]128PCIVDD[3]8PCIVDD[4]29PCIVDD[5]39PCIVDD[6]47PCIVDD[7]58

VDD5REF95

ARST2#/SELECT_VAUX62

ASYNC261

ASDOUT260

ASDIN2107

ZLRCLK80ZSCLK81ZSDATA82

SPDIFI 83SPDIFO 84

EGPIO[0] 85EGPIO[1] 86EGPIO[2] 87

ASCLK/EGPIO[3] 103104

ASDI/EGPIO[5] 105ASDO/EGPIO[6] 106

EGPIO[7] 63

CLKRUN# 64PME#108

ABITCLK259

EEPDIS 23VAUX_SEL16

NC217NC318NC419NC520

PCIVDD_SENSE21VAUX_SENSE22

AD26AD25

AD13

AD24

AD20

AD23

AD2

C/BE2

AD7

AD19

AD5

AD18

AD15

AD31

AD3AD4

AD0

AD17

C/BE3

AD1

C/BE1C/BE0

AD29AD28AD27

AD21

AD16

AD14

AD12AD11AD10AD9AD8

AD6

AD30

AD22

+3.3VD

DGND

DGND

DGND DGND

+3.3VD

DGND

+3.3VD

DGND

DGND

DGND

+3.3VD+3.3VD

DGND

+3.3VD

DGND

DGND

DGND

+3.3VD

DGND

DGND

+5V_PCI

DGND

DGND

DGND

+3.3VD

DGND

DGND

+3.3VD

+CVDD

+CVDD +CVDD +CVDD +CVDD

DGND

+3.3VD

+3.3VD

DGND

PERR#

JAB1

DEVSEL#

SERR#

CLKC/BE[3..0]

PAR

IRDY#

GNT#

JAB2

RST#

ABITCLK

INTA#

JACY

ASDIN

IDSEL

JBB1

FRAME#

MIDIOUT

ARST#

STOP#

REQ#

JBCX

ASYNC

TRDY#

JBCY

ASDOUT

MIDIIN

JACXJBB2

ASDIN2

CS4630-CM PCIVDD PINS

CS4630-CM CVDD PINS

C1000.1uFZ5U

ASFCLK/EGPIO[4]

Figure 9. Audio Controller, CS4630

CR

D4630-10

DS

445RD

10A1

19

C640.1uFZ5U

pFC71220pFX7R

C78220pFX7R

J1212345678910111213141516

_JOY

+5V_JOY

DGND DGND

D

PIN 2

C875600pFX7R

C905600pFX7R

C795600pFX7R

C825600pFX7R

R83

4.7K

R74

4.7K

R82

4.7K

R77

4.7K

C951000pFX7R

C751000pFX7R

C721000pFX7R

R71

47K

C1030.1uFZ5U

C81220X7R

C84220pFX7R

C89220pFX7R

C86220pFX7R

Q7

MMBT3904LT1

1

32

R615.1K

R64 39K Q6

MMBT2907ALT1

1

32

R5910K

R6020K

R63 39K

R65 100

MIDI_BUF

+5V+5V_JOY

+5V_PCI

DGND DGN

+3.3VD

DGND

+5V_PCI

DGND

DGND

JBCXJACY

JBCY

JACX

JAB2

MIDIIN

JAB1

JBB1

MIDIOUT

JBB2

J12 JOYSTICKSUPPLY PINS

PIN 1Joystick button pullups stillrequired on CS462X/CS4280 --must be populated

optional MIDI out buffer -- populate as necessary

Place NearCS4630

populate instead of MIDIout buffer as necessary

2.2K

2.2K2.2K

2.2KR79

R81R80

R78

C911000pFX7R

Figure 10. Joystick/MIDI Interface

CR

D4630-10

20D

S445R

D10A

1

R66 8.2K

J11

TOTX-173

1

2

3

45

6

I

DGND

DGND

_RX

S/PDIF OUTOPTICAL

JP1

3x1 HDR

123

R21

1K

L647uH

J1

TORX-173

1

2

3

45

6

U13

SN75179B

R 2

D 3

A8B7

Y5Z6

J13

2X1HDR-SN/PB

12

C108

0.01uFX7R C109

0.01uFX7R

R87

75

C140.1uFZ5U

C1100.1uFZ5U

C650.1uFZ5U

+5V_PCI

+5V_PCI

+5V_PC

+5V_PCI DGND

DGNDDGND

DGND

DGNDDGND

DGND

DGND

SPDIF

SPDIF_TX

S/PDIF IN

COAXIAL

Place closeto pins 1and 4 onSN75179B

S/PDIF IN

OPTICAL

Figure 11. S/PDIF Output and Inputs

CR

D4630-10

DS

445RD

10A1

21

C1020.047uFZ5U

C1050.047uFZ5U

+3.3V_PCI_C+3.3V_PCI_B

+12VD +5V_PCI+5V_PCI

D DGND

ax

+5V_PCI supply. Place near6 of the PCI edge connector.

ted

+5V_PCI supply. Place nearf the PCI edge connector.

PLACE OVERPIN B38

PLACE OVERPIN B49

pply pins. Must be plated andCI spec 2.1, chapter 4.4.2.1.nector within 1/4" of pin[s].

P1

PCI BUS 5V B

-12V1TCK2GND113TDO4+5V(8)5+5V(9)6INTB#7INTD#8PRSNT1#9RSVD(4)10PRSNT2#11GND(12)12GND(13)13RSVD(5)14GND(14)15CLK16GND(15)17REQ#18+5V(10)19AD[31]20AD[29]21GND(16)22AD[27]23AD[25]24+3.3V(7)25C/BE[3]#26AD[23]27GND(17)28AD[21]29AD[19]30+3.3V(8)31AD[17]32C/BE[2]#33GND(18)34IRDY#35+3.3V(9)36DEVSEL#37GND(19)38LOCK#39PERR#40+3.3V(10)41SERR#42+3.3V(11)43C/BE[1]#44AD[14]45GND(20)46AD[12]47AD[10]48GND(21)49KEY350KEY451AD[8]52AD[7]53+3.3V(12)54AD[5]55AD[3]56GND(22)57AD[1]58+5V(11)59ACK64#60+5V(12)61+5V(13)62

Side B

P2

PCI BUS 5V A

TRST# 1+12V 2TMS 3TDI 4

+5V(1) 5INTA# 6INTC# 7+5V(2) 8

RSVD(1) 9+5V(3) 10

RSVD(2) 11GND(1) 12GND(2) 13

RSVD(3) 14RST# 15

+5V(4) 16GNT# 17

GND(3) 18PME# 19AD[30] 20

+3.3V(1) 21AD[28] 22AD[26] 23

GND(4) 24AD[24] 25IDSEL 26

+3.3V(2) 27AD[22] 28AD[20] 29

GND(5) 30AD[18] 31AD[16] 32

+3.3V(3) 33FRAME# 34

GND(6) 35TRDY# 36GND(7) 37STOP# 38

+3.3V(4) 39SDONE 40

SBO# 41GND(8) 42

PAR 43AD[15] 44

+3.3V(5) 45AD[13] 46AD[11] 47

GND(9) 48AD[9] 49KEY1 50KEY2 51

C/BE[0]# 52+3.3V(6) 53

AD[6]54

AD[4]55

GND(10)56

AD[2]57

AD[0]58

+5V(5)59

REQ64#60

+5V(6) 61

+5V(7)62

Side A

C1040.047uFZ5U

R84 0

R85 0

R86 0

+

+

+3.3V_PCI_B

+3.3V_PCI_B

+3.3V_PCI_C

+3.3V_PCI_A

+3.3V_PCI_C

+3.3V_PCI_A

+3.3V_PCI_B

+3.3V_PCI_B

C/BE3

+3.3V_PCI_C

+3.3V_PCI_A

+3.3V_PCI_C

C/BE1

C/BE0

C/BE2

+3.3V_PCI_A

AD7

AD21

AD14

AD5

AD19

AD12

AD1

AD23

AD27

AD17

AD3

AD29

AD10

AD8

AD31

AD25

+3.3V_PCI_A

+3.3V_PCI_A

+3.3V_PCI_B

+3.3V_PCI_C

DGND

DGND

+5V_PCI

DGND

-12VD

DGND

DGNDGND+3.3VD

AD[31..0]

SERR#

CLK

C/BE[3..0]#

GNT#

TRDY#DEVSEL#

PAR

IRDY#

RST#

STOP#

IDSEL

REQ#

PERR#

FRAME#

INTA#

PRSNT1#, PRSNT2# = 00Power Requirement = 7.5W m

PCI Buspin 5 &

TDI and TDO must be connecif IEEE 1149.1 is not used

PCI Buspin 62 o

PLACE OVERPIN B26

Unused PCI Bus +3.3V sudecoupled according to PPlace near PCI edge con

Do not populate R84, R85and R86. (unless 3.3V PCIis Guaranteed)

AD18

AD28

AD16

AD30

AD22

AD26

AD24

AD20

AD0

AD11

AD15

AD13

AD9

AD2

AD4AD6

C9410uFELEC

C880.1uFZ5U

+5V_PCI

C10110uFELEC

C960.1uFZ5U

Figure 12. PCI Bus

CR

D4630-10

22D

S445R

D10A

1

H1HOLE

U6

MC78M05ACDT

OUT 3

GND

2

H2HOLE

C5710uFELEC

+

CGND

AGND

+5VA

AGND

CGND

nect CGND to DGND with a 50 mil trace the finger edge of the board.

F4

FUSE 0.5A

IN1

L931@100MHz

U8

LM1117CST-3.3 (SOT-223)

OUT 2

GND

1

IN3TAB (OUT)

4

U12

LM2937IMP-2.5 (SOT-223)

OUT 3

GND

2

IN1TAB (GND)

4

C760.1uFZ5U

C1070.1uFZ5U

C740.1uFZ5U

C7310uFELEC

+C7010uFELEC

+

C10610uFELEC

+

DGND

+5V_PCI

DGND

+5V_PCI

+5V_JOY

+12VD

+3.3VD

+CVDD

DGND

Connear

2.5 Volts

Figure 13. Power Supplies

CR

D4630-10

DS

445RD

10A1

23

Figure 14. Assembly Drawing

CR

D4630-10

24D

S445R

D10A

1

Figure 15. Top Silkscreen

CR

D4630-10

DS

445RD

10A1

25

Figure 16. Top Layer

CR

D4630-10

26D

S445R

D10A

1

Figure 17. Bottom Layer

CR

D4630-10

DS

445RD

10A1

27

2X R.039

5

.035

.495

3.362

.398

.370

2X .128

EXTRUDED AND TAP#4 - 40

6XR.051

2X .255

.307

.100

.725

2X .155

2X.100

2X 4.439

.155

.413

2X52

5X.250

.338

1.501

1.911

1.091

.681

2XTRUE R.079

4X .018

2.321

4X .107

2.555

1.042

.273

.340

.850

.174

.200

.725

.285

.430

.5502X R.079

.675

FULL R

R.039

4.725

.450

.200

A

A

.155

VIEW A- A

7 PL

MIC IN

FRONT OUT

REAR OUT

C/SUB OUT

HP/LINE IN

SPDIF IN

SPDIF OUT

5

Figure 18. Bracket A Drawing

CR

D4630-10

28D

S445R

D10A

1

5

4.725

50

200

.035

A

A

.100

.725

2X .1552X .100

2X 4.439

.155

.413

2X 52

2XTRUE R.079

.441.221

1.0861.312

4X R.132

2X .120

2X 10

.3662.336

.113

.850

.174

.200

.725

.285

.430

.5502X R.079

FULL R

.4

.

VIEW A- A

JOYSTICK

5

Figure 19. Bracket B Drawing

CR

D4630-10

29D

S445R

D10A

1

6. BILL OF MATERIALSItem Qty Pop Reference Description PCB Footprint Manufacturer. Part Number

C0805C221K5RAC

NIC ECA-1CM100

C0805C683K5RACC0805C104M5UAC

C0805C104K5RACC0805C104K5RAC

NIC ECE-V1VS2R2SRC0805C102K5GAC

C0805C105M8VACC0805C103K5RACC0805C102K5RACC0805C562K5RACC0805C473M5UACC0805C220K5GAC12062F105M8BB0

NIC ECA-1HM2R2

C0805C272K5RACNIC ECA-0JM221NIC ECA-1HM010M miniSMD050-2

TSW-103-07-T-SA TORX-173CTRONICS SJ372

A TOTX-173103309-370553-0036

CTRONICS SJ37370553-0003

S SIMID03-47uHHF30ACB453215-T

1 17 C1,C3,C12,C71,C78,C81,C84,C86,C89,C113,C114,C117,C118,C121,C122,C150,C152

CAP, 0805, X7R, 220pF, 10%, 50V CSN_0805 KEMET

2 15 C2,C15,C57,C70,C73,C94,C101,C106,C111,C112,C115,C116,C119,C120,C139

CAP, ALU 5.0MM, ELEC, 10uF, 16V ALU5.0MM PANASO

3 1 C4 CAP, 0805, X7R, .068uF, 10%, 50V CSN_0805 KEMET4 38 C5,C14,C31,C34,C38,C41,C42,

C52,C61,C62,C64,C65,C66,C67,C68,C69,C74,C76,C77,C80,C83,C85,C88,C92,C93,C96,C97,C98,C99,C100,C103,C107,C110,C137,C138,C140,C141,C159

CAP, 0805, Z5U, .1uF, 20%, 50V CSN_0805 KEMET

5 5 C24,C25,C132,C134,C147 CAP, 0805, X7R, .1uF, 10%, 50V CSN_0805 KEMET6 1 NOPOP C6 CAP, 0805, X7R, .1uF, 10%, 50V CSN_0805 KEMET7 2 C11,C13 CAP, SMT A, ELEC, 2.2uF, 20%, 35V CSP_ELEC_A PANASO8 15 C23,C28,C36,C44,C49,C50,C55,

C63,C125,C127,C128,C129,C130,C135,C136

CAP, 0805, C0G, 1000pF, 10%, 50V CSN_0805 KEMET

9 3 C29,C30,C133 CAP, 0805, Y5V, 1uF, 20%, 10V CSN_0805 KEMET10 4 C46,C108,C109,C126 CAP, 0805, X7R, .01uF, 10%, 50V CSN_0805 KEMET11 4 C72,C75,C91,C95 CAP, 0805, X7R, 1000pF, 10%, 50V CSN_0805 KEMET12 4 C79,C82,C87,C90 CAP, 0805, X7R, 5600pF, 10%, 50V CSN_0805 KEMET13 3 C102,C104,C105 CAP, 0805, Z5U, .047uF, 20%, 50V CSN_0805 KEMET14 4 C123,C124,C153,C156 CAP, 0805, C0G, 22pF, 10%, 50V CSN_0805 KEMET15 1 C131 CAP, 1206, Y5V, 1uF, 20%, 25V CSN_1206 PHILIPS16 7 C142,C143,C144,C145,C146,

C149,C151CAP, ALU 5.0MM, ELEC, 2.2uF, 50V ALU5.0MM PANASO

17 1 C148 CAP, 0805, X7R, 2700pF, 10%, 50V CSN_0805 KEMET18 2 C155,C154 CAP, ALU 5.1MM, ELEC, 220uF, 6.3V ALU5.0MM PANASO19 1 NOPOP C160 CAP, ALU 5.0MM, ELEC, 1uF, 50V ALU5.0MM PANASO20 1 F4 FUSE, SMT, 0.5A hold, 1.0A trip FUSE_1812 RAYCHE21 2 H1,H2 HOLE22 3 JP1,JP2,JP3 HDR, 3x1, 0.025" PIN, 0.1" CTR HDR3X1 SAMTEC23 1 J1 OPTICAL TOSLINK RECEIVER TORX173 TOSHIB24 1 J6 CONN, 1/8" DOUBLE SW. STEREO PHONE JACK CON_STEREO_LZR LZR ELE25 1 J11 OPTICAL TOSLINK TRANSMITTER TOTX173 TOSHIB26 1 J12 CONN, 8x2 RIBBON, MALE, STRAIGHT, SHROUDED HDR8X2_SHR AMP27 2 J13,J19 HDR, 2X1, 0.025" PIN, 0.1" CTR, 150u" SN/PB CON_MLX_70553_2 MOLEX28 4 J14,J15,J16,J20 CONN, 1/8" NON-SW. STEREO PHONE JACK CON_STEREO_LZR LZR ELE29 2 J18,J17 HDR, 4X1, 0.025" PIN, 0.1" CTR, 15u" AU CON_MLX_70553_4 MOLEX30 1 L6 IND,47uH,10%,210mA IND_1812 SIEMEN31 1 L7 IND,FBEAD,1812,120@100MHz,25% IND_1812 TDK

Table 3. Bill of Materials

CR

D4630-10

30D

S445R

D10A

1

32 7 L9,L10,L11,L12,L13,L14,L15 IND, FBEAD, 1206, 31@100MHz, 25% IND_FB1206 TDK HF50ACB321611-T33 1 P1 PCI BUS 5V SIDE B PCI_BUS_5V_B

AL MMBT2907ALT1AL MMBT3904LT1

9C08052A4702J

9C08052A6801F9C08052A0R00J9C08052A2701J9C08052A6802J9C08052A1003J9C08052A1001J9C08052A47R0J9C08052A1002J9C08052A2002J9C08052A5101J9C08052A2203J

9C08052A3902J9C08052A1000J9C08052A1000J9C08052A8201J9C08052A4701J9C08052A2201J9C08052A75R0J9C08052A3302F9C08052A2702F9C12063A10R0J

OLA MC33078DL SEMICOND. CS4294-JQOLA MC78M05ACDTHIP 24LC00/SN

AL SEMICOND. LM1117MPX-3.3L SEMICOND. CS4630-CM

AL SEMICOND. LM2937IMP-2.5SN75179B

L SEMICOND. CS4297A-JQTDA1308TFS24.576

34 1 P2 PCI BUS 5V SIDE A PCI_BUS_5V_A35 1 Q6 TRAN, SO, PNP, SOT23 SOT23 NATION36 1 Q7 TRAN, SO, NPN, SOT23 SOT23 NATION37 13 R1,R8,R13,R15,R71,R99,R100,

R103,R104,R106,R107,R116,R117RES, SO, 0805, 47K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS

38 5 R4,R109,R110,R111,R112 RES, SO, 0805, 6.8K, 1%, 1/10W, METAL FILM RES_0805 PHILIPS39 5 NOPOP R5,R14,R84,R85,R86 RES, SO, 0805, 0, 5%, 1/10W, METAL FILM RES_0805 PHILIPS40 1 R17 RES, SO, 0805, 2.7K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS41 1 R18 RES, SO, 0805, 68K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS42 1 R19 RES, SO, 0805, 100K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS43 1 R21 RES, SO, 0805, 1K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS44 5 R39,R67,R68,R95,R96 RES, SO, 0805, 47, 5%, 1/10W, METAL FILM RES_0805 PHILIPS45 1 R59 RES, SO, 0805, 10K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS46 1 R60 RES, SO, 0805, 20K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS47 1 R61 RES, SO, 0805, 5.1K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS48 13 R62,R69,R70,R72,R75,R76,R88,

R89,R90,R91,R92,R93,R94RES, SO, 0805, 220K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS

49 2 R63,R64 RES, SO, 0805, 39K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS50 5 R97,R98,R101,R102,R105 RES, SO, 0805, 100, 5%, 1/10W, METAL FILM RES_0805 PHILIPS51 1 NOPOP R65 RES, SO, 0805, 100, 5%, 1/10W, METAL FILM RES_0805 PHILIPS52 1 R66 RES, SO, 0805, 8.2K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS53 6 R73,R74,R77,R82,R83,R108 RES, SO, 0805, 4.7K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS54 4 R78,R79,R80,R81 RES, SO, 0805, 2.2K, 5%, 1/10W, METAL FILM RES_0805 PHILIPS55 1 R87 RES, SO, 0805, 75, 5%, 1/10W, METAL FILM RES_0805 PHILIPS56 2 R115,R113 RES, SO, 0805, 33K, 1%, 1/10W, METAL FILM RES_0805 PHILIPS57 2 R114,R118 RES, SO, 0805, 27K, 1%, 1/10W, METAL FILM RES_0805 PHILIPS58 2 R119,R120 RES, SO, 1206, 10, 5%, 1/4W, METAL FILM RES_1206 PHILIPS59 1 U1 IC, SO, SOIC8, 33078, DUAL OP-AMP SO8 MOTOR60 1 U3 IC, TQFP, AC ’97 2.0 SERIAL QUAD CODEC QFP48_7X7 CRYSTA61 1 U6 IC, SO, +5V REGULATOR, DPAK, 2%, 500mA DPAK MOTOR62 1 U7 IC, SO, SOIC8, SERIAL EEPROM, 16 x 8, 2.5V SO8 MICROC63 1 U8 IC, SO, +3.3V REGULATOR, SOT-223, 2%, 800mA SOT223 NATION64 1 U10 IC, MQFP, AC ’97 PCI AUDIO CONTROLLER MQFP-128 CRYSTA65 1 U12 IC, SO, +2.5V REGULATOR, SOT-223, 5%, 400mA SOT223 NATION66 1 U13 IC, SO, SOIC8, DIFF. DRIVER/RECEIVER PAIR SO8 TI67 1 U14 IC, TQFP, AC ’97 2.1 SERIAL CODEC QFP48_7X7 CRYSTA68 1 U15 IC, SO, SOIC8, 1308, LOW NOISE HEADPHONE AMP SO8 PHILIPS69 1 Y1 XTAL, 24.576MHz, HC49S, Fund Mode, Par Res XTL_HC49S FOX

Table 3. Bill of Materials (cont.)

• Notes •