closed-form critical conditions of subharmonic oscillations for buck converters

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 60, NO. 7, JULY 2013 1967

Closed-Form Critical Conditions of SubharmonicOscillations for Buck Converters

Chung-Chieh Fang

Abstract—Based on a general critical condition of subharmonicoscillation in terms of the loop gain, many closed-form critical con-ditions for various control schemes in terms of converter param-eters are derived. Some previously known critical conditions be-come special cases in the generalized framework. Given an arbi-trary control scheme, a systematic procedure is proposed to de-rive the critical condition for that control scheme. Different controlschemes share similar forms of critical conditions. For example,both control and proportional voltage mode control have thesame form of critical condition. A peculiar phenomenon in averagecurrent mode control where subharmonic oscillation occurs in awindow value of pole can be explained by the derived critical con-dition. A ripple amplitude index to predict subharmonic oscilla-tion proposed in the past research has limited application and isshown invalid for a converter with a large pole comparable to theswitching frequency.

Index Terms—Critical condition, DC-DCpower conversion, har-monic balance, instability, subharmonic oscillation.

I. INTRODUCTION

C RITICAL conditions of subharmonic oscillation havebeen reported for some control schemes: (peak) current

mode control (CMC) [1], average CMC (ACMC) [2], voltagemode control (VMC) without considering the effect of equiva-lent series resistance (ESR) [3], [4], and control [5]. Theseconditions are generally obtained case by case.In [6], subharmonic oscillation is analyzed in a nonlinear

system perspective, and the critical condition is obtained sys-tematically. Similar analysis is applied to variable-switching-frequency buck converter [7]. This paper continues to answersimilar questions for the fixed frequency case:1) There exists a peculiar phenomenon in ACMC such thatsubharmonic oscillation occurs in a window value of pole[8]. Is there a general theory to explain this phenomenon?Does it also exist in other cases?

2) It is hypothesized in [3], [4] that the signal ripple ampli-tude can predict the occurrence of subharmonic oscillation.Does it have limited application only in some particularcases?

3) Some VMC and CMC control schemes may seem dif-ferent, but do they share the same or similar form of criticalcondition?

4) Type-II or type-III compensators are popular in industry.How to obtain the associated critical conditions?

Manuscript received June 01, 2012; revised September 11, 2012; acceptedOctober 17, 2012. Date of publication January 21, 2013; date of current versionJune 24, 2013. This paper was recommended by Associate Editor T.-J. P. Liang.The author is with Sunplus Technology, Hsinchu 300, Taiwan (e-mail:

[email protected]).Color versions of one or more of the figures in this paper are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TCSI.2012.2230498

Fig. 1. A VMC buck converter with a compensator .

By applying harmonic balance [6], [9]–[11], many new criticalconditions for particular control schemes are obtained.The remainder of the paper is organized as follows. A unified

VMC/CMC switching model and harmonic balance analysis areapplied in Sections II and III. Section IV applies the analysis tovarious control schemes. Section V focuses on a case occurringfrequently in industry. Conclusions are collected in Section VI.

II. UNIFIED VMC/CMC SWITCHING MODEL

Consider a VMC buck converter shown in Fig. 1, whereis the source voltage, is the diode voltage, is the outputvoltage, is the reference voltage, is the feedback signal,and is the compensator transfer func-tion. Denote the cycle period as , the switching frequency as

and let . The sawtooth signal in VMC andthe compensating ramp in CMC is modeled [9], [12] as the sameramp signal (varying from to ). Denote the ramp am-plitude as and the ramp slope as .Let the ESR be . Let . For , .Let the dc resistance of the inductor be . From [1], the powerstage -to- transfer function is

(1)

For CMC, a control signal controls the (peak) inductor cur-rent . Let , then . Thepower stage -to- transfer function is

(2)

Let . Since is a square wave, foreither VMC or CMC, the buck converter can be modeled as aswitching model in Fig. 2, where the offset of is implicitlyadjusted by . The square-wave generator has a gain ,and the loop gain is . An equivalent nor-malized model for Fig. 2 is shown in Fig. 3.

1549-8328/$31.00 © 2013 IEEE

1968 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 60, NO. 7, JULY 2013

Fig. 2. Unified VMC/CMC switching model.

III. CRITICAL CONDITION IN L-PLOT OR S-PLOT

The critical condition based on harmonic balance [6],[9]–[11] is briefly reviewed. Define an “F-transform” ofas

It is a function of many converter parameters. Define thisfunction as an L-plot . For , the loop gain

, then define an S-plot (validfor ) as . From [6], the critical conditionis

(3)

The S-plot shows the minimum ramp slope to stabilize the con-verter. For , and the L-plot also predictsthe minimum ramp slope. Generally, the region with or

is stable. The condition (3) is for trailing-edge mod-ulation (TEM) [9]. For leading-edge modulation (LEM, lesscommon in practice), as proved in [13], the critical conditionrequires replacing by in (3). This paper focuses onTEM only, except in Example 2.Let and be the pole and zero of , respectively. Let

and . Starting from a simplest case, let. From [6],

(4)

Expand by Taylor series , where, and

by the L’Hospital’s rule. A plot ofis shown in Fig. 4, where for

and . The right straight-line edge in Fig. 4 is.

Letbe a correction term. A plot of is shown in

Fig. 5. For , . For , ,and , linearly proportional to .Based on partial fraction decomposition, the F-transforms of

typical loop gains are shown in Table I, each containing partialterms of . Once the high-frequency form of is ob-tained, the critical condition is readily obtained from Table I.This technique is applied next to various control schemes.

Fig. 3. An equivalent normalized switching model.

Fig. 4. Plot of for case .

Fig. 5. Plot of the correction term .

TABLE IF-TRANSFORM OF TYPICAL LOOP GAIN

FANG: CLOSED-FORM CRITICAL CONDITIONS OF SUBHARMONIC OSCILLATIONS FOR BUCK CONVERTERS 1969

IV. APPLICATIONS TO VARIOUS CMC/VMC SCHEMES

A. Peak CMC: Case

From (2), at high frequency, , and, which is of case and it leads to the critical condi-

tion [6], , or equivalently,

(5)

With no ramp , the critical point is .

B. ACMC With PI Compensator: Case

Here, the inductor current is fed back through a resistorand a PI compensator , then

(6)

which is of case . From Table I, the critical condition is

(7)

agreed with [2, Eq. 4.6]. For , from (7), the ramp sloperequired to avoid the subharmonic oscillation is

(8)

which is similar to (5) for peak CMC.

C. VMC With PI Compensator and : Case

Using the above PI compensator,

(9)

which is of case with . From Table I, the criticalcondition in terms of L-plot is

(10)

For , case is close to (a special case of ). For, using is more accurate than using [7].

Example 1: Consider a VMC PI buck converter with, , , ,, , , and .

This is an counter-example of the ripple index hypothesis [3],which expects occurrence of subharmonic oscillation for any. The L-plot (Fig. 6) shows that subharmonic oscillation does

not occur for any . The converter is stable. This is confirmedby the sampled-data analysis, which shows three stable polesaround 0.99, 0.99 and 0. Here, , which explains theinaccuracy of the ripple index. As a side note, if, a slow-scale instability occurs with two unstable poles at

, also not predicted by the slow-scale stability indexproposed in [3].

D. PVMC: Four Possible Cases , , , and

In proportional VMC (PVMC), the voltage loop has a gain. One has and . Four cases are

analyzed to see the effects of and on the stability.

Fig. 6. L-plot based on (10) in solid line shows no occurrence of subharmonicoscillation (due to ). In contrast, the ripple index [3] (dashed line) wronglypredicts an occurrence of subharmonic oscillation.

1) General PVMC, Case : From (1),

(11)

which is of case with and. From Table I, the critical condition is

(12)

Other PVMC critical conditions are special cases of (12).For , . Case becomes , and (12) becomes

(13)The critical point is denoted with a star superscript. Asdecreases, increases, and increases according to (13).Example 2. (Small Leads to Large .): Consider a PVMC

LEM buck converter [14]: , ,, , , and . The switching

condition or leads to

(14)

which is the familiar condition if . Theplots of (13), with replaced by for LEM, are shown inFig. 7. The intersection of (13) and (14) leads to .Decrease from 25 to 5. The plots of (13) for 25 and

20 are close to each other because is small. Each intersectswith (14) around . For , becomessignificant. As decreases, increases, agreed with [14].2) PVMC With and , Case : For(with large , and small and ), . Case

becomes , and (12) becomes

(15)The term with can be ignored only if . Notethat such a term is also included in (5) and (8) for CMC.


Fig. 7. The plot of (13) (solid line) for , 20, 15, 10, and 5. Its intersec-tion with (14) (dashed line) is . As decreases, increases.

3) Control, Case , Same as PVMC: As reported in[6], (15) for PVMC is applicable to the constant-frequency peakvoltage regulator (CF-PVR) [5] or control.4) PVMC With and , Case : For ,

and becomes . The condition (15) leads to

(16)

agreed with [3] which claims that the ripple amplitude suchas (or ) is an index to predict subharmonic oscilla-tion. For the buck converter, it happens [1] that

, and (16) can be expressed as a condition in termsof . However, (16) is valid only for .

V. CASE : COMMON IN PRACTICE

Shown below are four different VMC/CMC schemes withdynamic compensators. All of them are of case . Let bethe crossover frequency. Let be a gain. Adding a type-II ortype-III compensator generally leads to

(17)

It is of case which has some interesting properties and de-serves special attention. With the phase never beyond , acontinuous-time system with (17) is expected to be stable. How-ever, a switching converter with (17) may be unstable.Property 1: Instability Due to Large or : Setting

in (17), is related to by

(18)

(19)

For large , . A large leads to a large .From Table I, the (inequality) stability condition is

, or equivalently

(20)

Fig. 8. Plot of for case .

Fig. 9. Contour plot of for case .

From (20), a large or leads to instability. A plot of(also a scaled L-plot, ) is shown in Fig. 8. Its con-

tour plot (Fig. 9), with the contour-level , defines the crit-ical stability boundary. Let , for example, the regionbounded by the level-0 is always stable. For , the regionbounded by the level-0.5 is stable. As decreases, the stabilityregion enlarges.Property 2: Conservative Condition (Around )

to Prevent Subharmonic Oscillation: For (or), the whole region in Fig. 9 is stable. Therefore, a con-

servative (because valid for all and ) design to avoid thesubharmonic oscillation is . This gives a theoret-ical explanation on the traditional wisdom [15, p. 250] to set

.However, this traditional wisdom may be too conservative.

Assume that the converter operates within and, for example. From Fig. 9, the converter is still stable

with (or ). This allows a crossover frequencyten times larger (compared with the traditional wisdom

) for faster response.Property 3: Unstable Window of Pole: The contour plot is

also helpful to see the “weak spots” which are susceptible tosubharmonic oscillation in the parameter space. Those regionswith high levels (elevations) in the contour plot are the weak


Fig. 10. Stable -periodic orbit, .

spots. From Figs. 8 or 9, for a large or small , the level ishigh, and these regions are the weak spots. For mid-range of

, there exists a window of such that the level ishigh, which also leads to instability.The unstable window of can be estimated. Since

(21)

Based on (20) and (21), the unstable window of is

(22)

A. ACMC With a Type-II Compensator: Case

In ACMC [15], , where is asensing resistor and is generally a type-II compensator,

(23)

with . At high frequency, from (2) and (23), one has(17) and (20) with .Example 3. (Unstable Window of .): Consider an ACMC

buck converter [16, p. 114] with , ,, , , , ,

, , , ,, and .

Time-Domain Simulation: Let .For , subharmonic oscillation occurs [8]. Let

, for example, the converter is stable (Fig. 10). Let, the converter is unstable (Fig. 11). Next, let .

The converter is stable again (Fig. 12).Sampled-Data Pole Trajectories: There are four poles. Two

poles are fixed around 0.88, and 0.95. A pole leaves the unitcircle through when , and enters the unit circlewhen . It explains exactly the unstable window of .Accurate Prediction by L-Plot or (22): In Fig. 13, the L-plot

shows an unstable window of . The small erroris due to the approximation of at high frequency. The

Fig. 11. Subharmonic oscillation, .

Fig. 12. Stable -periodic orbit with a larger ripple, .

Fig. 13. For L-plot , subharmonic oscillation occurs. If the rampslope is 1.2 times larger, the subharmonic oscillation is prevented.

L-plot also shows that if or is 1.2 times larger, the un-stable window is removed and the converter is stable.Here, and . The L-plot is

also a scaled cross-section of Fig. 8 at . The stableregion is bounded by the level-0.77 in Fig. 9. Draw a line at

in Fig. 9. The line intersects with the level-0.77 alsoat 0.18 and 0.46. Also, (22) gives a close estimate of theunstable window .


In ACMC, the subharmonic oscillation is not linearly relatedto the ripple amplitude [8]. In steady state, is -periodic,denoted as . As increases, the amplitude of in-creases monotonously (because is a low-pass filter). For

, the converter is unstable with a small amplitudeof , whereas for , the converter is stable witha larger amplitude of . The ripple amplitude index to pre-dict the subharmonic oscillation hypothesized in [3], [4] doesnot apply in this case.In this example, the existence of unstable window of

is verified by time-domain simulation, pole trajectories, andagreed closely with the derived critical condition.

B. VMC With a Type-III Compensator: Case

Here, , where is a type-IIIcompensator. A typical guideline [15, p. 412] on is asfollows. Set one pole at 0 as an integrator, the second poleat (to cancel the ESR zero), and the third polearound . Set the gain to adjust the phase margin andthe crossover frequency. Set the two zeros at and

(to cancel the power stage poles), where is a zeroscale factor to have additional flexibility to adjust the phasemargin and the crossover frequency. In practice, .The guideline leads to

(24)

At high frequency, from (1) and (24), one has (17) and (20) with. The critical condition is

(25)

A small leads to a small , shrinking the stability region.Example 4. (With a Phase Margin of 38.9 Based on the

Average Model, Subharmonic Oscillation Still Occurs.): Con-sider a buck converter [17] with the type-III compensator (24):

, , , ,, , , ,

, and .Subharmonic oscillation (Fig. 14) occurs at, confirmed with a sampled-data pole at . With ,

(25) gives . As discussed above, the small error is dueto the high frequency approximation of .However, the Bode plot (Fig. 15) of average model shows

a phase margin of 38.9 and an infinite gain margin, whichwrongly predicts that the converter is stable for any .The next example shows that, as a case , the buck converter

with a type-III compensator also has an unstable window of .Example 5. (Unstable Window of , Unrelated to the Ripple

Amplitude of ): Consider again Example 4 with .Now, vary from 0.1 to 0.6. An unstable window of

is found. Similar to Example 3, the value ofadjusts the ripple amplitude of . A large leads to a largeripple of . The ripple index hypothesis [3], [4] is claimedto be valid for VMC. However, it does not apply to this VMCexample.Time-Domain Simulation: For , the ripple amplitude

of is small, and the converter is stable (Fig. 16). For


Fig. 15. Bode diagram shows a phase margin of 38.9 and an infinitegain margin, but the subharmonic oscillation still occurs.

Fig. 16. The converter is stable, .

, the ripple (of unstable not shown) is larger, and theconverter is unstable with subharmonic oscillation (Fig. 17). For

, the ripple is even larger, but the converter is stable(Fig. 18). Comparing Figs. 16–18, the ripple amplitude ofis not linearly related to subharmonic oscillation.Sampled-Data Pole Trajectories: There are five poles. Three

poles are fixed around 0.95, 0.89, and 0.51. A pole leaves the



Fig. 18. The converter is stable with a larger ripple, .

unit circle through when , and enters the unit circlewhen . This agrees with the unstable window of .Accurate Prediction by L-Plot or (22): In Fig. 19, the L-plot

shows an unstable window of . As discussedabove, the small error is due to the high-frequency approxima-tion of . The L-plot also shows that if or is 1.1 timeslarger, the unstable window is removed and the converter isstable. Also, (22) gives a close estimate of the unstable window

.

C. VMC With a Type-II Compensator: Case

For a converter with a large ESR, a type-II compensatorwith is generally

used, which also leads to case . One has (17) and (20) with. Similar analysis as above can be

applied. It is omitted to save space.

D. VMC With a Phase-Lead Compensator: Case

ForVMCwith a small ESR, adding a phase-lead compensatorwith also leads to case .

One has (17) and (20) with .

VI. CONCLUSION AND CONTRIBUTIONS

Based on a general critical condition (3), many closed-formcritical conditions for various control schemes in terms of con-

Fig. 19. For L-plot , subharmonic oscillation occurs.

TABLE IICRITICAL CONDITIONS FOR DIFFERENT CONTROL SCHEMES

verter parameters are derived, summarized in Table II. Thosepreviously known critical conditions, such as (5), (7), and (16),become special cases of (3). The effects of different parameters(such as , , , and ) on the subharmonic oscillation canbe clearly seen. The critical condition can be expressed in termsof L-plot or S-plot: or .The questions asked in the Introduction are answered:1) The unstable window of pole can be explained by case .A case- system, such as ACMC with a type-II compen-sator or VMC with a type-III compensator, has an unstablewindow of pole if the feedback gain is large.

2) Five counter-examples of the ripple index hypothesis arepresented and summarized in Table III.

3) A typical critical condition is a weighted combination ofthree terms: ,

, and a correction term . For example, bothcontrol and PVMC have the same form of critical con-

dition. Also, many critical conditions have a common term. For a compensator with a pole

, .4) Given an arbitrary control scheme, the critical conditioncan be systematically obtained from Table I.

Compared with the past research including [18] (with com-ments in [13]), the contributions of this paper are as follows.First, a general critical condition (3) in terms of the loop gain


TABLE IIIFIVE COUNTER-EXAMPLES OF THE RIPPLE INDEX HYPOTHESIS [3]

is derived. The traditional loop gain analysis is popular amongengineers, and it predicts slow-scale instability. However, an ad-ditional limitation (3) on the loop gain is required to avoid thesubharmonic oscillation (fast-scale instability).Second, many closed-form critical conditions in terms of

pole/zero, not in series form as in [18], are obtained and sum-marized in Tables I and II. This gives a new perspective on theinstability different from [18].Third, in [18], only simple static compensators are presented.

Here, the critical conditions for both static and dynamic (suchas type-II or type-III) compensators are explicitly obtained. Thedynamic compensator is widely used in industry, and the ob-tained critical conditions are very useful for engineers to designa stable converter.Fourth, the critical conditions presented in [18] are pole in-

dependent. They are useful only when the compensator poleis small. When (also reported in [19]), the crit-ical conditions in [18] require infinite series terms. In contrast,the critical conditions obtained in this paper do not have such alimitation. They are pole dependent and are still applicable evenwhen . Generally, the type-II or type-III compen-sator has , and that explains why the critical condi-tions for the type-II and type-III compensators are not obtainedin [18]. It also explains that the unstable window of is notobserved in [3], [4], [18].Fifth, the ripple index hypothesis [3], [4] to predict subhar-

monic oscillation is applicable only to a buck converter withzero ESR (case ). It is not applicable to case or witha large pole or case with nonzero ESR. Also note that theripple amplitude, either or for , has a termof which is symmetric with respect to .Among the cases in Table I, only the critical condition foris symmetric with respect to . Therefore, the rippleindex has limited applications. Also as proved in [13], bothTEM and LEM buck converters have the same ripple amplitudebut different instability conditions, which also serves anothercounter-example of the hypothesis.Sixth, for the case common in practice, a stability condition

(20) is obtained in terms of the feedback gain or the crossoverfrequency . The traditional wisdom to set is con-servative. It can be relaxed to achieve better performance de-pending on the operating region of duty cycle.Seventh, either the L-plot or S-plot shows the required ramp

slope to stabilize the converter. Using the contour plot (suchas Fig. 9), the instability boundary in the parameter space canbe determined. These plots are useful for engineers to design astable converter.

This paper focuses on the converter with a fixed switchingfrequency. For the variable frequency case, see [6], [7]. TheF-transforms in Table I still apply, but with a different expres-sion of . The same approach can be also applied to ana-lyze other instabilities (such as saddle-node bifurcation) [6].

REFERENCES

[1] R. W. Erickson and D. Maksimovic, Fundamentals of Power Elec-tronics, 2nd ed. Berlin, Germany: Springer, 2001.

[2] F. Yu, “Modeling of Control with composite capacitors and averagecurrent mode control,” M.S. thesis, Dept. ECE, Virginia PolytechnicInst. and State Univ., Blacksburg, 2011.

[3] A. E. Aroudi, E. Rodriguez, R. Leyva, and E. Alarcon, “A design-ori-ented combined approach for bifurcation prediction in switched-modepower converters,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57,no. 3, pp. 218–222, Mar. 2010.

[4] E. Rodriguez, A. E. Aroudi, F. Guinjoan, and E. Alarcon, “A ripple-based design-oriented approach for predicting fast-scale instability inDC-DC switching power supplies,” IEEE Trans. Circuits Syst. I, Reg.Papers, vol. 59, no. 1, pp. 215–227, Jan. 2012.

[5] R. Redl and J. Sun, “Ripple-based control of switching regula-tors—An overview,” IEEE Trans. Power Electron., vol. 24, no. 12,pp. 2669–2680, Dec. 2009.

[6] C.-C. Fang, “Critical conditions for a class of switched linear systemsbased on harmonic balance: Applications to DC-DC converters,” Non-linear Dyn., vol. 70, pp. 1767–1789, 2012.

[7] C.-C. Fang, “Closed-form critical conditions of instabilities for con-stant on-time controlled buck converters,” IEEE Trans. Circuits Syst.I, vol. 59, no. 12, pp. 3090–3097, Dec. 2012.

[8] C.-C. Fang, “Modeling and instability of average current control,” inProc. EPE-PEMC, Dubrovnik, Croatia, 2002, Paper SSIN-03 [Online].Available: http://arxiv.org/abs/1210.1959

[9] C.-C. Fang, “Sampled-data analysis and control of DC-DC switchingconverters,” Ph.D. dissertation, Dept. of Elect. Eng., Univ. of Mary-land, College Park, 1997.

[10] C.-C. Fang and E. H. Abed, “Harmonic balance analysis and control ofperiod doubling bifurcation in buck converters,” in Proc. IEEE ISCAS,May 2001, vol. 3, pp. 209–212.

[11] C.-C. Fang and E. H. Abed, “Analysis and control of period-doublingbifurcation in buck converters using harmonic balance,” Latin Amer.Appl. Res.: Int. J., pp. 149–156, 2001.

[12] C.-C. Fang and E. H. Abed, “Limit cycle stabilization in PWMDC-DC converters,” in Proc. IEEE Conf. Decision Control, 1998, pp.3046–3051.

[13] C.-C. Fang, “Comments on prediction of subharmonic oscillationin switching converters under different control strategies” [Online].Available: http://arxiv.org/abs/1204.0343

[14] D. Giaouris, S. Banerjee, B. Zahawi, and V. Pickert, “Stability anal-ysis of the continuous conduction mode buck converter via Filippov’smethod,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 4, pp.1084–1096, Apr. 2008.

[15] C. P. Basso, Switch-Mode Power Supplies. NewYork: McGraw-Hill,2008.

[16] W. Tang, F. C. Lee, and R. B. Ridley, “Small-signal modeling of av-erage current-mode control,” IEEE Trans. Power Electron., vol. 8, no.2, pp. 112–119, Apr. 1993.

[17] D. Mattingly, “Designing stable compensation networks for singlephase voltage mode buck regulators,” Intersil Americas Inc., 2003[Online]. Available: www.intersil.com/data/tb/tb417.pdf

[18] A. E. Aroudi, “Prediction of subharmonic oscillation in switching con-verters under different control strategies,” IEEE Trans. Circuits Syst.II, Exp. Briefs, 2012, to be published.

[19] C.-C. Fang, “Unified model of voltage/current mode control to pre-dict subharmonic oscillation” [Online]. Available: http://arxiv.org/abs/1202.4232

Chung-Chieh Fang received the B.S. degree from National Taiwan University,and the M.S. and Ph.D. degrees from University of Maryland, College Park, allin electrical engineering. He also received the J.D. degree from University ofIdaho, Moscow.He is currently a Legal Manager at Sunplus Technology, Hsinchu, Taiwan.

closed-form critical conditions of subharmonic oscillations for buck converters

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