chapter 1
TRANSCRIPT
CHAPTER 1
INTRODUCTION TO CIRCUIT SIMULATION
MOTIVATION WHY SIMULATE CIRCUIT?
1950s Design technique: Circuits built-up of discrete elements Experiments by breadboarding, measuring, tuning Manual techniques traditionally used for circuit
analysis and design (graph theory, state equation, nodal analysis, loop analysis etc.)
Later: ICs with growing density of integration Breadboarding with discrete elements not useful Only chip pads accessible for measurements Manual techniques become simply inadequate
ADVANTAGE OF SIMULATION test new ideas (‘dry lab’) fast changes possible considering parasitic effects ( with suitable models) simulation of ‘ ideal’ elements (isolation of parasitic
components) run circuit under conditions which are:
difficult to realize (loading, noise, etc) dangerous ( destruction of the circuit) not customary ( needs special equipment)
fast turnaround reduction of costs Simulation allows designers to predict and optimize circuit
performance
DISCRETISATION OF THE SEMICONDUCTOR EQUATION
The partial differential equations, which constitute the semiconductor eq. , are then approximated in each of the subdivided regions by a set of equation which describe the variable at specific points in the domain. This is called discretisation.
Discretisation results in a large set of non linear eq. which describe the variables at a discrete point in the device domain
Numerical techniques are then employed to solve this set of eq. In device simulation, variety of numerical method available, most
common numerical method to solve the semiconductor equation:
1. Finite difference method
2. Finite element method
Finite-difference method This method subdivides the simulation domain into regions defined by mesh
which consist of set of mesh lines parallel to the coordinate axes. This method is used in 1-D and 2-D rectangular device simulations
fiq. Uniform finite difference mesh supperimposed over the simulation domain
In this method, the continuous derivative of the semiconductor eq. are replaced by discrete finite difference approximation at each of the node in finite difference method.
Finite-element method This method provides a flexible means of investigating semiconductor device
which have irregular geometries, and is particularly useful in obtaining accurate solutions in regions of high E.F and abrupt changes in carrier distribution.
The location of the nodal point within the simulation can be chosen to suit the particular problem
Continuous function representing solution are assumed to have simple analytic forms within each element
The continuous semiconductor equation are then used to define an equivalent integral formulation
Then transform the continuous function of semiconductor eq. into discretised forms
The principle disadvantage : initially it required more efforts to implement the numerical algorithm
Circuit Simulation should have following capabilities:
Linear DC analysis Non linear DC analysis Linear AC analysis Small signal AC analysis Linear signal transient analysis Poles/zero analysis and noise analysis Special purpose simulation program for: thermal
analysis, switched capacitor circuit analysis, and so on…….
1. LINEAR, TIME INVARIANT CIRCUIT
Comprised of the most basic elements: resistor, ideal independent current and voltage sources. The
easiest problem is that of finding the DC operating point of a linear circuit, which requires one to solve a set of equations derived from Kirchhoff’s voltage law and the branch constitutive equations.
For a small circuit with linear elements, described by linear branch voltage-current dependencies, the exact DC solution is readily available through hand calculations.
Many circuit simulation programs (e.g. SPICE) use nodal analysis as a basis .
1.2 NODAL ANALYSIS Nodal analysis produces a compact set of equations for the network, which can be
solved by hand if small, or can be quickly solved using linear algebra by computer. When elements do not have admittance representations, a more general extension of nodal analysis, modified nodal analysis, can be used.
NODAL ANALYSIS: 1. consider a b branch, (n+1) node of circuit (1= reference/ground node). 2. Write KCL equation in terms of node voltage for every non datum node. 3. We can write program to formulate and then solve set of equation to get node
voltage. n nodal equation can be express in matrix form (Yv=J) Y= n x n nodal admittance matrix J = n x 1 vector of current source input v = n x 1 vector of node voltage
1.3 Nodal admittance equation stamp
A circuit simulation program analyse circuit in terms of netlist. It first convert graphical representation into a netlist description ( name a component, designate the nodes where it's
connected, and give it a value ) Branches containing resistor contribute terms to the Y
matrix while independent current and voltage sources contribute to the J vector.
These contribution can be characterized on a branch by branch basis in terms of matrix stamp
Matrix stamp
Resistor matrix stamp:
for a resistor of value R from node i to j.
1/R -1/R -1/R 1/R
Current matrix stamp:
for a independent current source of value I from i to j
-I I
Finally after stamping all of the element from the netlist we have set of nodal equation in the form of Yv=J
In this case the zeroth row and zeroth column correspond to the designated ground node, and be omitted.
Final step is to solve the matrix equations to obtain the dc node voltage:
either by constructing the inverse of Y and multiplying it by J or using gauss elimination or LU factorization (most often used in circuit simulation).
2. NON LINEAR (DC) CIRCUIT ANALYSIS
Here the problem is to find the dc bias point of the circuit containing non-linear elements
Consider a simple diode circuit
R
+ +
Vs id Vd id=(Vs-vd)/R
-
FIG. 1 Classically, we can obtain the operating point by the means of load line shown
in graph: Computationally, we solve for this dc operating point iteratively.
2.1 Diode i-v curve and graphical solution of dc operating point
id slope=-(1/R)
Vs/R
dc operating point
Vs vd
2.2 How circuit simulator analyze non linear circuit?
First convert the Thevenin equivalent in to norton equivalent
+
VS/R R vd id=(VS-vd)/R
_
FIG. 2 Form single KCL equation at non-datum node
vd/R + id =Vs/R ---(1)
The non linear expression for a diode’s current, I d =I sat [exp(qvd /nkt)-1] ---(2)
Isat = the reverse saturation current, q= charge on an electron, n= non ideality factor,
k= boltzmann’s constant, T= absolute temperature(in K),
From eq 2, eq 1 implies; vd/R + I sat {exp(qvd /nkt)-1} =Vs/R thus, the non linear function f(vd)= Vs/R –{vd/R + I sat [exp(qvd /nkt)-1]} -----(3)
now, we will solve it using newton-raphson method1. intial guess: vd=vn2. linearize: f(vn+∆vn)≈f(vn)+f’(vn)∆vn=0(taylor’s expansion) 3. solve: ∆vn=-f(vn)/f’(vn)4. increment: vn+1=vn+∆vn5. test: |f(vn+1) |≤ ε ?If yes, we have converged to the required solution; if no, then return to the linearization step
Each non linear device replaced by its tangent determined Norton equivalent circuit .(at each iteration)
Then we perform dc analysis of linear circuit
id
T2
Vs/R P1 P2 S1
Vs vd S1 T1
2.3 NEWTON RAPSON ITERATION TO OBTAIN DC OPERATING POINT:
2.4 Linearized approximation about presumed operating point
id
P1
Ieq=id axis intercept Geq=slope of linearization
NORTON EQUIVALENT FOR NON LINEAR ELEMENT ABOUT THEIR PESUMED OPERATING POINT
Ieq ≡≡ Geq
2.5 FLOW CHART FOR NON LINEAR ANALYSIS
N
NEWTON -
RAPHSON
ITERATION LOOP
Y
INITIAL GUESS
LINEARIZE NON LINEAR ELEMENT
LINEAR DC ANALYSIS
CONVERGED?
SOLUTION
3.SMALL SIGNAL ANALYSIS
The newton-raphson linearization step produces a portion of the small signal equivalent circuit model used for ac analysis.
The model donot account for small signal capacitance effects The small signal capacitance effect are simply obtained by evaluating
them at dc operating point. Complex admittances for capacitors and inductors during ac analysis:
V I=jwCV Geq=jwC
V I=V/jwl Geq=1/jwl
For small signal ac analysis the energy storage elements are modeled in the frequency domain.
Now we can extend linear dc analysis to linear ac analysis simply by using complex valued voltage and current and stamping the complex admittances in to Y matrix.
Nodal analysis, which handles only admittances branch relation, may not well with the frequency extremes…. specifically, as w tends to 0 the capacitor become open circuit and the inductor shorts and conversely at w tends to infinity.
Even the value close to extremes may cause the Y matrix entries becomes excessively large or small, thus causing numerical problem due to finite precision and precision and range of number representation in a computer
3.1 FLOW CHART FOR SMALL SIGNAL AC ANALYSIS
NON LINEAR DC BIASING
UPDATE ELEMENT VALUES
INCREMENT FREQUENCYSOLVE COMPLEX NODAL EQUATION
FORMULATE COMPLEX NODAL EQUATION
BODE PLOT
INTIAL FREQUENCY
END FREQ ?
EXTREME VALUE?
Y
N
N
4. LINEAR TRANSIENT ANALYSIS
It is applied to evaluate the large signal behavior of a linear circuit as function of time, t.
Implementation of a linear transient analysis for RLC circuit using the companion model:
1. Start with a known set of capacitance voltages and inductances currents at a specified time (the initial conditions are either user-specified or obtained from a dc bias computation)
2. Increment time by a prescribed amount ∆t and invoke the appropriate companion models; ∆t is selected based on stability, accuracy, and efficiently considerations and can be different at different time.
3. Perform dc type analysis;
4. Return to step (1) with the results and appropriately modify the companion model values until the specified end time is attained.
5. NON LINEAR TRANSIENT ANALYSIS
NON LINEAR DC BIASING
INITIAL CONDITION
FORM COMPANION MODEL
NON LINEAR DC ANALYSIS
END TIME?
TRANSIENT RESPONSE PLOT
INCREMENT TIME