IET Power Electronics

Research Article

Control method for the two-stage matrixconverter to enhance the linear voltagetransfer ratio

ISSN 1755-4535Received on 30th November 2017Revised 31st July 2018Accepted on 17th September 2018E-First on 23rd October 2018doi: 10.1049/iet-pel.2018.5388www.ietdl.org

Hui Wang1, Yichun Zhang1, Mei Su1, Yao Sun1, Xin Li1, Guanguan Zhang2 1School of Information Science and Engineering, Central South University, Room 133, Minzhu Building, Changsha, People's Republic of China2School of Control Science and Engineering, Shandong University, Jinan, People's Republic of China

E-mail: dr_zgg@163.com

Abstract: The relatively low-linear voltage transfer ratio (VTR) is considered an intrinsic drawback of the conventional two-stagematrix converter (TSMC). However, the studies demonstrate that the linear VTR of the third-harmonic injection TSMC (3TSMC)can push this limit. After reviewing the operating principles and modulation strategy of 3TSMC briefly, the VTR characteristic of3TSMC is analysed and a control method to enhance the linear VTR is proposed. With the developed method, the maximumlinear VTR can break through the intrinsic limit and VTR > 0.866 can be achieved by regulating the input reactive power underarbitrary output conditions theoretically. Finally, simulations and experimental results verify the correctness of the theoreticalanalysis, and the comparison of 3TSMC and other TSMCs with improved VTR demonstrates the effectiveness of the proposedmethod.

1 IntroductionAn indirect matrix converter, also known as the two-stage matrixconverter (TSMC), is a type of direct AC–AC power conversiontopology that can generate variable amplitude and frequency outputwaveforms without the need of bulky energy storage elements [1–6]. Due to the advantages such as sinusoidal input and outputcurrents, controllable input power factor, high-power density, zero-current commutation as well as the potential of constructing a cost-effective derived topology with multiple phases and/or multipleoutput ports [6], TSMCs have attracted an increasing attention inthe recent years. However, the relatively low voltage transfer ratio(VTR) is one of the major drawbacks of the three-phase-to-three-phase TSMCs, especially when TSMCs are applied in ACadjustable speed drives (ASDs), power supplies, and powersystems and so on. Usually, there are two solutions to improve theVTR: one is altering the topology of TSMCs to boost the outputvoltage [7–13]; the other is applying modulation strategy toenhance the VTR [14–19].

For the first solution, extra circuits have to be added andmerged into the conventional TSMCs. In [7, 8], two hybrid TSMCtopologies with significant improvement of VTR have beenproposed, which are formed by integrating an H-bridge inverterand an auxiliary boost converter in the DC link of TSMC,respectively. In [9], the voltage boosting and unity VTR of TSMCwas achieved by adding four extra switches to construct anequivalent AC–AC boost topology. The authors of [10–13] focusedon the improvement of VTR by introducing a Z-source network.Although the VTR has been enhanced greatly, a disadvantage ofthese methods is the need of extra passive energy storagecomponents, which contradicts the original ‘all-silicon’ feature ofTSMCs and leads to a reduced power density.

Regarding the second solution, several modulation schemeshave been presented to improve the VTR. In [14], a modulationstrategy that improves the VTR of a matrix converter operatingwith non-unity input power factor was suggested, which is able toobtain higher VTR when compared with the traditional strategies.Based on the space vector modulation (SVM), Xia et al. [15]investigated the derivation about the VTR and proved that thetheoretical maximum linear VTR can reach 0.928 when the outputfrequency and initial phase are the same as those of the input side.The authors of [16–19] focused on the improvement of VTR byoperating TSMCs in the over-modulation region. The over-

modulation strategy that can improve the VTR to unity by addingthird harmonic to the modulation signals was presented in [16]. In[17], two over-modulation methods based on square wavemodulation and trapezoidal wave modulation were discussed,which can increase the maximum VTR from 0.866 to 0.97 and0.92, respectively. Bozorgi et al. [18] proposed a simple spacevector over-modulation method to increase the VTR of the matrixconverter. A six-step variable frequency over-modulation strategy,which is capable of providing more than unity fundamentalcomponent of output voltage, was developed in [19]. Although theVTR can be enhanced significantly by these over-modulationstrategies without introducing additional hardware circuits, low-order harmonics in the input current and output voltage areinevitable and thus is not desirable. Besides, the VTR is coupledwith the input power factor tightly. When the ability to generate theinput reactive power is required, the maximum available VTR ofTSMC will reduce furthermore [2, 4, 5]. Thus, further research isrequired to enhance the VTR.

The third-harmonic injection TSMC (3TSMC) is a new kind ofTSMC [20, 21]. In addition, to possessing the same essentialfeatures as conventional TSMCs such as sinusoidal input/outputcurrents and bidirectional power flow, 3TSMC also has theadvantage of enhanced input reactive power capability. The basicTSMC based on the third-harmonic injection technique ispresented to perform direct AC–AC power conversion in [20]. Toovercome the drawbacks of the conventional topologies withmultiple VSIs for the applications that require multiple three-phaseoutputs such as multiple drives, the active third-harmonic injectionindirect matrix converter with multiple VSIs is suggested in [21].Aiming at overcoming the intrinsic drawback of relatively low-linear VTR of TSMCs, the linear VTR capability of 3TSMC isresearched systematically in this work, and a control method toenhance the linear VTR of 3TSMC from two aspects is proposed.On the one hand, the linear VTR capability of 3TSMC is exploredconsidering the instantaneous six-pulse shape intermediate DC linkvoltage, and the maximum linear VTR is extracted bysystematically analysing the SVM strategy of the inversion stage. Itis found that the maximum linear VTR can break through theintrinsic limit of 0.866 under certain conditions. Specifically, whenthe output frequency and initial phase are the same as those of theinput side, a theoretical maximum VTR of one can be achieved. Onthe other hand, the capability of generating input reactive power isutilised as an additional degree of freedom to improve the linear

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VTR of 3TSMC, and the linear VTR can be increased to infinite intheory at the expense of increasing the voltage and current stressesof the input filter.

After introducing the topology and operating principle briefly inSection 2, the linear VTR feature of 3TSMC is analysed, and therelationship between the maximum linear VTR and the output/input frequency ratio, the initial phase of the output voltage and theinput reactive power is investigated in Section 3. In Section 4, thedeveloped control method to improve the linear VTR of 3TSMC ispresented in detail, and the effect of the input filter on the VTR isalso discussed. In Section 5, the theoretical analysis is verified bysimulation and experimental results, and the comparison of3TSMC and other TSMCs with improved VTR is presented todemonstrate the effectiveness of the proposed method. Finally, themain points of this paper are summarised in Section 6.

2 Topology and operating principles of 3TSMCThe topology of 3TSMC is shown in Fig. 1, which mainly consistsof a line-commutated bidirectional current source rectifier, a third-harmonic injection circuit, a conventional two-level voltage sourceinverter, and an inductor capacitor input filter. The third-harmonicinjection circuit is composed of three bidirectional switches, athird-harmonic injection inductor, and a bridge leg.

Assuming that the three-phase input voltages are symmetricaland sinusoidal, the operating principles of 3TSMC are describedbriefly as follows: for the front-end rectifier, the switches of therectifier anti-paralleled to the conducting diodes are turned on so asto impose the maximum instantaneous input line–line voltageacross the intermediate DC link. Consequently, as with the output

voltage of a diode rectifier, the DC link voltage upn of 3TSMCexhibits a piecewise six-pulse shape waveform. According to therequirements of the load, the rear-end inverter provides three-phaseoutput voltages with variable frequency and amplitude. The third-harmonic injection circuit is essentially a time-sharing multiplexingsingle-phase shunt active power filter, and the input power factorcorrection and the normal operation of 3TSMC depend on injectingthe quasi-third-harmonic current into the input side. For the third-harmonic injection circuit, the bidirectional switch that isconnected to the input phase with the medium instantaneousvoltage is turned on, and high-frequency switches Sy+ and Sy– ofthe bridge leg switch complementally to generate the desired quasi-third-harmonic current iy, i.e. equal to the minus value of the inputcurrent corresponding to the input phase with the mediuminstantaneous voltage [20], as described in (1), where Ird and Irq arethe amplitudes of the active and reactive components of the inputcurrent, irmid and θmid are the input current before filtering and thephase corresponding to the input phase with the mediuminstantaneous voltage

iy = − irmid = − Ird cos(θmid) − Irq sin(θmid) . (1)

If the switching function of a switch Sij in Fig. 1 is defined as

Si j = 0, when open1, when closed, i = a, b, c; j = y, + , − . (2)

Then the switching states of the rectifier and the third-harmoniccurrent injection circuit can be expressed as shown in Table 1,where θi is the input phase voltage of the filtering capacitor ofphase a.

In this manner, sinusoidal three-phase input currents andcontrollable input power factor are achieved, as shown in Fig. 2.The validity of sinusoidal input currents and controllable powerfactor has been presented in detail in [20] and thus is not elaboratedhere.

3 Analysis of the linear VTR of 3TSMCSuppose that SVM is adopted for the inverter and the referenceoutput voltage vector uo is given as

uo = Uom ejθo = Uom ej(2π f ot + φo) . (3)

Then the duty ratios can be derived as

d1 = 3 Uomsin(π /3 − θo) /upn,d2 = 3 Uomsin(θo) /upn,d0 = 1 − d1 − d2,

(4)

where d0, d1, and d2 are the duty ratios of the zero vector and thetwo adjacent active vectors, respectively; and Uom, θo, fo and φoare the amplitude, phase, frequency and initial phase of the rotatingreference output voltage vector, respectively.

As can be seen from (4), the duty ratios depend on theintermediate DC-link voltage consisting of the maximum inputline-line voltage of the input filtering capacitors. Therefore, thelinear VTR characteristic of 3TSMC is quite different from that ofTSMC, and it can be inferred that the linear VTR depends on the

Fig. 1  Schematic diagram of 3TSMC

Table 1 Switching states of the rectifier and the third-harmonic current injection circuitθi Sector Say Sby Scy Sa+ Sa− Sb+ Sb− Sc+ Sc−0–π/3 1 0 1 0 1 0 0 0 0 1π/3–2π/3 2 1 0 0 0 0 1 0 0 12π/3–π 3 0 0 1 0 1 1 0 0 0π–4π/3 4 0 1 0 0 1 0 0 1 04π/3–5π/3 5 1 0 0 0 0 0 1 1 05π/3–2π 6 0 0 1 1 0 0 1 0 0

Fig. 2  Key waveforms of 3TSMC

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frequency and initial phase relationship between the inputs and theoutputs, as well as the dynamic behaviour of the input filter.Assuming that the three-phase inputs and outputs are symmetricaland sinusoidal, the concrete analysis of the linear VTRcharacteristic of 3TSMC is given as follows.

3.1 Ignoring the effects of the input filter

Suppose that the input voltages are given by

usa = Uimcos(θi) = Uimcos(2π f i t),usb = Uimcos(θi − 2π /3) = Uimcos(2π f i t − 2π /3),usc = Uimcos(θi + 2π /3) = Uimcos(2π f i t + 2π /3),

(5)

where Uim and fi are the amplitude and frequency of the inputvoltages.

Assuming that the effects of the input filter can be ignored, andthen the three-phase input filtering capacitor voltages can beexpressed as

ua = Ucmcos(θca) = usa,ub = Ucmcos(θca − 2π /3) = usb,uc = Ucmcos(θca + 2π /3) = usc,

(6)

where Ucm and θca are the amplitude and phase of the filteringcapacitor voltage of phase a.

According to the operating principles of 3TSMC and (6), theDC link voltage upn can be expressed as

upn = 3Ucmcos (θi/ /(π /3)) − π /6 , (7)

where‘//’ is the operator of the remainder value.For linear modulation of 3TSMC, the duty ratios in each

switching period should satisfy

0 ≤ d1 ≤ 1,0 ≤ d2 ≤ 1,0 ≤ d1 + d2 ≤ 1.

(8)

Substituting (4) and (7) into (8), the constraint of the output voltagecan be derived as

Uom ≤ Ucmcos[(θi/ /(π /3)) − π /6]cos[(θo/ /(π /3)) − π /6] . (9)

Formula (9) contains both input and output phases. To simplify (9),define the output/input frequency ratio nf as

nf = f o/ f i = 2π f ot /2π f it = (θo − φo)/θi . (10)

Combining (9) and (10), we can get the upper limit of theamplitude of the output voltage vector in a switching period as

Uom ≤ Ucmcos[(((θo − φo)/nf)/ /(π /3)) − π /6]cos[(θo/ /(π /3)) − π /6] . (11)

Define the VTR of 3TSMC as

m = Uom/Uim . (12)

Then from (11), the constraint of the VTR in a switching periodcan be derived as

m ≤ cos[(((θo − φo)/nf)/ /(π /3)) − π /6]cos[(θo/ /(π /3)) − π /6] . (13)

It can be found from (13) that the maximum VTR in a switchingperiod changes with the phase of the output voltage. Therefore, themaximum linear VTR mmax of 3TSMC can be deduced bysearching the minimum value of m in the whole θo range

mmax = min cos[(((θo − φo)/nf)/ /(π /3)) − π /6]cos[(θo/ /(π /3)) − π /6] , (14)

where min() is the operator of the minimum value.It can be seen from (14) that the maximum linear VTR is a

nonlinear function of the variables nf and φo. For the given nf andφo parameters, the maximum linear VTR can be obtained bysolving (14) with respect to the variable θo.

Fig. 3 shows the 3D plot of the maximum linear VTR of3TSMC with nf varying from 0 to 4 and φo varying from 0 to 2π. Itcan be found that, for the given nf, mmax is a periodic function ofthe variable φo, and the maximum value of mmax is related to nf.The minimum value of mmax is 0.866, which is irrelevant to nf. Themaximum value of mmax depends on nf, which can achieve 1 whennf = 1.

It can be found from the above analysis that for 3TSMC, themaximum linear VTR can break through the intrinsic limit of 0.866when the output frequency and initial phase satisfy certainconditions.

3.2 Considering the dynamic behaviour of the input filter

For most cases, the effects of the input filter can be neglected whenanalysing the VTR characteristic, since usually the voltage drop onthe filtering inductor is small. However, for some specificsituations such as a relatively high-input frequency, a relativelyhigh-input inductance, as well as large input reactive power, thedynamic behaviour of the input filter should be taken intoconsideration since the capacitor voltages are used directly forsynthesising the output voltage instead of the input voltages.

The per-phase equivalent circuit and the steady-state phasordiagram of the input filter are illustrated in Fig. 4, where Us, Ucand UL are the input voltage, capacitor voltage, and inductorvoltage phasors, respectively; Is and Ir are the input current phasorand the input current phasor of the rectifier, respectively.

Referring to Fig. 4b, the amplitude of the capacitor voltagephasor can be expressed as

Fig. 3  3D plot of the maximum linear VTR of 3TSMC

Fig. 4  Per-phase equivalent circuit and the steady-state phasor diagram ofthe input filter(a) Per-phase equivalent circuit, (b) Steady-state phasor diagram of the input filter

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Uc = Ucm = Us2 − 2π f i LF Ird

2 + 2π f i LFIrq

1 − 2π f i LFCF2 . (15)

It can be found from the operating principles of 3TSMC that thereactive component of the input current in (15), labelled as Irq, canbe controlled freely, which provides an additional freedom tochange the filtering capacitor voltages so as to regulate the VTR of3TSMC. As can be seen from (15), the VTR can be increased byproviding positive input reactive current (capacitive). Since thecontrol range of the input reactive power in 3TSMC has no limit, intheory, the theoretical linear VTR of 3TSMC is infinite. However,the practical VTR range is limited by some physical factors, suchas the voltage rating of the input capacitors and the current ratingof the semiconductor switches. This will be discussed further in thenext section.

4 Control method to enhance the linear VTR4.1 Control algorithm

As has been analysed in Section 3, the linear VTR of 3TSMC canbe improved from two aspects. When the frequency and initialphase of the outputs satisfying certain conditions, a VTR > 0.866could be obtained directly without regulating the input reactivepower. For other cases, the desired VTR could be obtained byadjusting the input reactive power indirectly. Considering thosetwo aspects, a control method enhancing the linear VTR ispresented and analysed in detail in this section.

The detailed control algorithm for improving the linear VTR isdepicted in Fig. 5. Firstly, the input filtering capacitor voltages aresampled and processed by a phase-locked loop to obtain theamplitude and phase of the capacitor voltages. Then based on theoutput parameters including Uom, φo and nf, the amplitude of thecapacitor voltages is examined to verify whether Ucm is sufficientlyhigh to synthesise the output voltages according to (11) and (14). IfUcm is high enough and the desired VTR is not greater than theVTR limit, the expected output voltage is synthesised directly bySVM using (4), and the input reference reactive current Irq is set as0. Otherwise, the capacitor voltage has to be boosted by generatinginput reactive power. In this work, a capacitor voltage closed-loopcontrol is adopted. In the implemented control loop, the referenceamplitude of the capacitor voltage, denoted as Ucm

∗ , is calculatedusing (11). Also, Ucm

∗ is compared with the feedback Ucm to obtainthe voltage error, then the error is feed into a proportional–integral(PI) controller to generate the reference reactive current Irq. Finally,the reference third-harmonic injection current iy∗ is calculatedaccording to (1), and a PI controller is utilised to track the practicalthird-harmonic injection current [20]. By doing this, the amplitudeof the capacitor voltages can be changed by regulating the inputreactive current, and then the expected VTR is obtained.

4.2 Effect of input filter parameters on the VTR and design ofthe input filter

As has been analysed in Section 3.2, the linear VTR of 3TSMC canbe improved freely by regulating the input reactive power. Intheory, the linear VTR of 3TSMC is infinite. However, this isachieved at the expense of increasing the voltage and currentstresses of the input filter. As a result, capacitors and inductors with

higher voltage and current rating are needed. Therefore, thepractical VTR is limited by the voltage rating of the filteringcapacitors and the current rating of the inductors. For most loads, amaximum VTR of 1 is sufficient. That is to say, the voltage ratingof the capacitors should be 15% higher than the grid voltage. Thiswill not increase the volume and cost of the capacitors significantlyand thus is acceptable.

As can be seen from (15), the inductance of the inductor, thecapacitance of the capacitor, the input reactive current componentall have had effects on VTR. Therefore, the input filter parametersshould be properly designed, aiming at obtaining an optimisedinput filter size. This can be done by performing optimisation ofthe input filter parameters with the optimisation objective ofminimised total volume. The design procedures can be describedbriefly as follows. The first step is to select a capacitance of theinput capacitor, whose upper and lower limits are decidedaccording to the constraints of capacitor voltage ripple and thereactive current absorbed by the capacitor

Iom4 f s δUs

≤ CF ≤ Qi

6π f i Us2 , (16)

where fs, δ and Qi are the switching frequency, voltage ripple indexand input reactive power, respectively. The next step is to choosean inductance of the input inductor

LF = 14π2 f c

2 CF, f c ∈ (0.1 − 0.5) f s . (17)

where fc is the cut-off frequency of the input filter. Then, assuminga maximum VTR of 1 is required in rated condition, the maximumreactive input current Irq can be solved according to (15). Finally,the volume models of the capacitor and inductor can be establishedas

VLF = F(LF, iLF), iLF = Ird2 + Irq

2 . (18)

VCF = F(CF, Uc) . (19)

Also, the total volume of the input filter can be expressed as

VF = Σ(VLF, VCF) . (20)

By searching the global minimum VF, the optimal input filterdesigns are identified, and one of the input filter designs with theparameters listed in Table 2 is selected.

5 Simulation and experimental resultsTo verify the correctness of the developed control method, theVTR characteristic of 3TSMC was firstly verified by simulationsusing Matlab/Simulink software and then was validatedexperimentally. The system parameters are listed in Table 2.

Fig. 5  Control algorithm for enhancing the linear VTR of 3TSMC

Table 2 System parameters of 3TSMCParameters Valueinput line–line voltage 200 Vrmsinput frequency fi 50 Hzswitching frequency fs 16 kHzcapacitor CF 6.6 µFinductor LF 1 mHinductor Ly 1.2 mHload inductor 3 mHload resistor 25 Ωmotor 1.1 kW, four poles

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5.1 Simulation

Fig. 6 illustrates the waveforms of 3TSMC with different mmaxcorresponding to different nf and φo. The parameters were set as nf = 0.5, φo = π /12, mmax = 0.8967 in Fig. 6a; nf = 2, φo = 0, mmax = 0.9542 in Fig. 6b and nf = 1, φo = 0, mmax = 1 in Fig. 6c,respectively. Also, the reference input reactive current is set at 0 inFig. 6.

The waveforms are shown in Fig. 6 consists of the input line-line voltage usab, the input current ia, the output line–line voltageurs and the output current ir. As can be seen from Fig. 6, the inputand output currents are almost sinusoidal. Besides, the inputcurrent ia lags behind the input line-line voltage uab by a phaseangle of π /6. This is reasonable since 3TSMC is in the linearmodulation region and the reference input reactive current is 0.

The analysed fundamental amplitudes of the output line–linevoltage are 253.7, 269.8 and 282.3 V in Figs. 6a–c, respectively,which match the expected VTR of 0.8967, 0.9542 and 1 very well.Moreover, the measured input power factors are 0.995, 0.999 and0.999 in Figs. 6a–c, respectively. The results in Fig. 6 clearlydemonstrate that with the developed method, the linear VTR of

3TSMC can break through 0.866 if the output parameters satisfycertain conditions.

Fig. 7 shows the waveforms of 3TSMC with the linear VTR>1.In Fig. 7, the expected VTR is set at 1.05, and the output frequencyis 60 Hz. It is clear that the input and output currents are stillsinusoidal, and the phase angle between the input current ia and theinput line-line voltage uab is no longer π /6 because the inputreactive current has to be regulated to a certain level so as to boostthe capacitor voltages and obtain the expected linear VTR. Theanalysed fundamental amplitude of the output line-line voltage is296.3 V, which confirms the linear VTR of 1.05 and verifies theeffectiveness of the control method.

5.2 Experiments

To verify the theoretical analysis and simulation results, a 1.5 kWprototype of 3TSMC with the specifications given in Table 2 isbuilt. To verify the theoretical analysis sufficiently, both resistorinductor (RL) load and motor load are tested. The experimentalresults are shown in Fig. 8 correspond to the simulation resultsshown in Fig. 6, and the waveforms of the RL load and motor loadare depicted on the left and right side, respectively. As can be seenfrom Fig. 8, sinusoidal input/output currents and unity input powerfactor are achieved. The measured fundamental amplitudes of theoutput line–line voltage are 250.6, 266.7 and 276.3 V for RL loadand are 250.1, 267.5 and 275.9 V for the motor load when thedesired VTRs are 0.8967, 0.9542 and 1, respectively. Referring toFig. 8, the experimental results match the simulation results well,except for a slight reduction in the fundamental amplitude of theoutput voltage and distortions of the currents. The differences areprimarily attributed to the voltage drop of devices and dead timeeffects.

It can be found from the simulation and experimental resultsabove that with the developed control method, the linear VTR of3TSMC can break through the intrinsic limit of 0.866. Bygenerating capacitive reactive power at the input side, the linearVTR of 3TSMC can be regulated freely for arbitrary outputconditions. Thus, the correctness of the method is verified bysimulation and experimental results.

5.3 Comparison of 3TSMC and other TSMCs

Although several solutions have been proposed to enhance theVTR of TSMC, most of them are achieved at the expense of addingextra passive components and/or sacrificing some otherperformance of the converter, and thus each method has its ownlimitations. To compare the presented method and other TSMCswith improved VTR, several performances including the number ofswitches, voltage and current rating of the switches, the range ofthe VTR and the waveforms quality, are evaluated and compared.Table 3 shows the comprehensive performance comparison of theproposed method and other methods, where Iim and Iom are theamplitude of the input and output currents, respectively. To enablea fair comparison, the unidirectional rectification stage in [11, 15]is replaced with the conventional 12 switches current sourcerectifier. It should be noted that when calculating the voltage and

Fig. 6  Simulation waveforms of 3TSMC with different mmax(a) nf = 0.5, φo = π /12, mmax = 0.8967, (b) nf = 2, φo = 0, mmax = 0.9542, (c) nf = 1,φo = 0, mmax = 1

Fig. 7  Simulation waveforms with linear VTR of 1.05

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current stresses, the ripple voltage, and ripple current are ignoredfor simplicity. For the detailed calculation process refer to [20] andthus is not elaborated here.

As can be seen from Table 3, the theoretical maximum VTR in[7, 11, 15, 17] and this study are 0.955, ∞, 0.928, 0.97 and ∞,respectively. On the other hand, the required semiconductorswitches in [7, 11, 15, 17] are 22 and 18, respectively, while thenumber of the switches in this study is 20. However, it should benoted that the comparison of the number of the switches only givesa first overview of the performance of the topologies, because thecurrent/voltage stress and the losses of the switches for eachtopology are quite different. For example, although only 18switches are required in [11], the voltage stress of the inverterswitches is high and goes up with the increasing of VTR. As acomparison, the voltage stress of the switches in 3TSMC isrelatively low, and the current rating of the switches of the third-harmonic injection circuit is only half of the amplitude of the inputcurrent. Besides, the switching losses of the rectifier and thebidirectional switches can be ignored due to their line frequencycommutation. Thus, it is possible to make an optimised selection ofthe switches of 3TSMC.

Regarding the input waveforms quality, 3TSMC has a superiorperformance than the others in terms of the total harmonicdistortion (THD) of the input current because of the pre-filteringeffect of the third-harmonic injection inductor [20], while [7, 17]have the inferior input current THD performance among the fivemethods due to the low-order current harmonics caused by thefluctuant input power and over-modulation, respectively. For thecomparison of the output waveforms quality, in [15] the 3TSMChave the best output voltage THD performance, and the outputvoltage THD performance in [7, 11] is a little bit worse because ofthe higher inverter side DC link voltage, while the over-modulationin [17] results in the worst output voltage THD performance.

It can be found from the comparison that 3TSMC makes a goodtrade-off between the VTR and other aspects including therequirements of semiconductor switches/extra energy storageelements, the power density, the efficiency, and the input/outputpower quality when compared with the other methods, although theinput capacitors with 15% higher voltage rating has to be selected.Thus, 3TSMC is an attractive choice for the applications wherehigh VTR and excellent input/output power quality are required.

6 ConclusionIn this study, a control method to enhance the linear VTR of3TSMC has been presented. Firstly, the maximum VTR undercertain output frequency and initial phase are extracted consideringthe instantaneous intermediate DC link voltage. Besides, bygenerating the input capacitive reactive power, the input reactivepower capability of 3TSMC is used as an additional degree offreedom to enhance the linear VTR significantly. The proposedmethod provides a new insight into the improvement of VTR of

Fig. 8  Experimental waveforms of 3TSMC with different mmaxcorresponding to different nf and φo

(a) nf = 0.5, φo = π /12, mmax = 0.8967, (b) nf = 2, φo = 0, mmax = 0.9542, (c) nf = 1,φo = 0, mmax = 1

Table 3 Comparison of different methods with improved VTRLiterature Theoretical

VTR rangeNumber

ofswitches

Energystorage

components

Rating of the switches (voltage, current) Inputcurrentquality

Outputcurrentquality

Rectifier Inverter Others

[7] 0.955 22 one capacitor 3 Uim, Iom 2π 3 + 6 3 − 3π2π Uim, Iom 6 3 − 3π

2π Uim, Iomdistorted

(THD = NA)sinusoidal

(THD = NA)[11] ∞ 18 two capacitors

two inductors3 Uim, Iom ≥ 2 3VTR Uim, Iom NA sinusoidal

(THD = NA)sinusoidal

(THD = NA)[15] 0.928 18 0 3 Uim, Iom 3 Uim, Iom NA sinusoidal

(THD = 5.11%)

sinusoidal(THD = 2.8%)

[17] 0.97 18 0 3 Uim, Iom 3 Uim, Iom NA distorted(THD = 7%)

distorted(THD = 5%)

this work ∞ 20 0 2 Uim, Iim 2 Uim, Iom 2 Uim, Iim2 (Sy+, Sy−)

3 Uim, Iim2 (Say, Sby,

Scy)

sinusoidal(THD = 4.77%)

sinusoidal(THD = 3.48%)

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TSMC. The validity and correctness of the theoretical analysis areverified by simulation and experimental results, and thecomparison of 3TSMC and other schemes with improved VTRdemonstrates the effectiveness of the proposed method. Togetherwith the advantages such as sinusoidal input and output currents,bidirectional power flow, as well as the enhanced input reactivepower capability, the presented method makes 3TSMC a potentialcandidate for power supplies, ASDs, and other applications.

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IET Power Electron., 2018, Vol. 11 Iss. 14, pp. 2295-2301© The Institution of Engineering and Technology 2018

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