aro-puf: an aging-resistant ring oscillator puf design

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ARO-PUF: An Aging-Resistant Ring Oscillator PUF Design Md. Tauhidur Rahman 1 , Domenic Forte 1 , Jim Fahrny 2 , and Mohammad Tehranipoor 1 1 ECE Dept., University of Connecticut 2 Comcast {tauhid, forte, tehrani}@engr.uconn.edu jim [email protected] Abstract—Physically Unclonable Functions (PUFs) have emerged as a security block with the potential to generate chip- specific identifiers and cryptographic keys. However it has been shown that the stability of these identifiers and keys is heav- ily impacted by aging and environmental variations. Previous techniques have mostly focused on improving PUF robustness against supply noise and temperature but aging has been largely neglected. In this paper, we propose a new aging resistant design for the popular ring-oscillator (RO)-PUF. Simulation results demonstrate that our aging resistant RO-PUF (called ARO- PUF) can produce unique, random, and more reliable keys. Only 7.7% bits get flipped on average over 10 years operation period for an ARO-PUF due to aging where the value is 32% for a conventional RO-PUF. The ARO-PUF shows an average inter- chip HD of 49.67% (close to ideal value 50%) and better than the conventional RO-PUF (45%). With lower error, ARO-PUF offers 24X area reduction for a 128-bit key because of reduced ECC complexity and smaller PUF footprint. KeywordsPUF, reliable RO-based PUF, reliable PUF, robust PUF, aging resistant PUF, PUF reliability. I. I NTRODUCTION In the effort to design secure systems, Physical Unclon- able Functions (PUFs) have emerged as a potential security block [1-4] as they can generate volatile secret keys for a system. PUF is an integrated circuit that generates secret keys by exploiting the inherent physical variations of devices. PUFs provide a high level of protection in security block. It offers strong volatile key storage to make the system tamper-resistant. Functionally, a PUF maps a challenge, input to the PUF, to responses, PUF output. A PUF exploits the physical characteristics of silicon and provides an alterna- tive to conventional digital signature stored in non-volatile memory. It uses the physical properties of each device to generate a chip-specific fingerprint or key. Identical PUFs with the same manufacturing process provide a different set of data because of small variations between each device. PUF can be used extensively in security applications such as IC identification/authentication, hardware metering, certified execution, and key generation for encryption [4-9]. Several PUFs have been proposed over the past decade, such as Arbiter PUF [2], ring-oscillator-based PUF (RO-PUF) [4], SRAM- based PUF [13], Butterfly PUF [14], etc. Among them, the RO-PUF is considered more reliable under a wide range of temperatures and it has been more widely accepted because it is less complex and easier to fabricate [4, 17, 22]. In order to be useful in practical security applications, the fingerprint or key generated by the PUF should be reliable or stable (i.e., not change over time). For example, in cryptogra- phy, decrypting the original message will be impossible with wrong private/public keys. Authentication of devices, secure communication, etc. also suffer from complications due to PUF instability. It is relatively well known that aging and environmental variations lead to performance degradation and lower reliability in ICs [10-12, 23-24, 32]. Similarly PUFs, hence, the keys they generate will therefore also be rendered less reliable by such variations. Run-time aging effects such as negative bias temperature instability (NBTI), hot carrier injection (HCI), oxide breakdown, and electromigration (EM) are the most critical causes of continuous performance and reliability degradation [10]. Threshold voltage ( V T ), channel length, timing, etc. are the critical parameters that decide the performance of a chip. NBTI can degrade V T of a transis- tor by 10-15% in the first year depending on technology and workload [23], which reduces drive current and hence circuit performance. During negative bias (pMOS is ON), pMOS experiences a constant degradation. However, partially recovery occurs when the stress is removed (pMOS is OFF). HCI is a function of switching activity and can accelerate degradation even further by shifting the threshold voltage of nMOS transistors over time [12]. While HCI mostly impacts the V T of the nMOS, it may also degrade the drain current of both nMOS and pMOS [32]. The delay degradation due to NBTI and HCI follows the same trend as the V T degradation. The severity of the degradation due to NBTI and HCI is dependent on workload, logic function, temperature, supply voltage, threshold voltage, technology and geometry [10, 21, 23-24, 32]. In general, low V T transistors experience more degradation over time than high V T transistors. Similarly, higher-supply voltage, V DD , and higher-operating temperature expedite the delay degradation over time. Fundamentally, aging will permanently shift many critical parameters the PUF uses to generate its key and therefore is a significant concern to PUF reliability. Another issue for PUF reliability is temperature variation. Operating temperature affects the delay of a device by changing its mobility and threshold voltage [12]. As temperature increases, the threshold voltage decreases which leads to an increase in the drain saturation current. At the same time, it decreases the mobility of the MOSFET, which causes a decrease in the drain saturation current. However, the mobility degradation dominates, and consequently, the delay of the device decreases. Similar to aging, these temperature-induced changes to delay will also create noise in the PUF’s key. However, unlike aging, the effects can be reversed by returning the device to its nominal operating temperature. Like temperature, power supply noise also affects the delay, because of deviation from nominal V DD , of logic gates and hence the reliability of an IC. The power supply delivery network and parasitic impedance of packages result in V DD fluctuation and impact the IC performance. Like aging and temperature variation, V DD fluctuation is also liable to impact the reliability of a PUF. Unlike aging the supply noise’s impact is temporary, i.e., when V DD is back to its nominal value, the PUF operates more reliably. Researchers have proposed several techniques to improve the reliability of a PUF [16-19, 21, 23, 24, 28-29]. For example, error correcting codes (ECC) have been used to fix up to a certain number of erroneous bits in the PUF key. For example, it has been reported in [15] that the index-based syndrome followed by a 3x repetition code and BCH [30] code can lower the RO-PUF error rate below 1 ppm under severe operating

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Page 1: ARO-PUF: An Aging-Resistant Ring Oscillator PUF Design

ARO-PUF: An Aging-ResistantRing Oscillator PUF Design

Md. Tauhidur Rahman1, Domenic Forte1, Jim Fahrny2, and Mohammad Tehranipoor1

1ECE Dept., University of Connecticut 2Comcast

{tauhid, forte, tehrani}@engr.uconn.edu jim [email protected]

Abstract—Physically Unclonable Functions (PUFs) haveemerged as a security block with the potential to generate chip-specific identifiers and cryptographic keys. However it has beenshown that the stability of these identifiers and keys is heav-ily impacted by aging and environmental variations. Previoustechniques have mostly focused on improving PUF robustnessagainst supply noise and temperature but aging has been largelyneglected. In this paper, we propose a new aging resistant designfor the popular ring-oscillator (RO)-PUF. Simulation resultsdemonstrate that our aging resistant RO-PUF (called ARO-PUF) can produce unique, random, and more reliable keys. Only7.7% bits get flipped on average over 10 years operation periodfor an ARO-PUF due to aging where the value is 32% for aconventional RO-PUF. The ARO-PUF shows an average inter-chip HD of 49.67% (close to ideal value 50%) and better thanthe conventional RO-PUF (∼ 45%). With lower error, ARO-PUFoffers ∼ 24X area reduction for a 128-bit key because of reducedECC complexity and smaller PUF footprint.

Keywords—PUF, reliable RO-based PUF, reliable PUF, robustPUF, aging resistant PUF, PUF reliability.

I. INTRODUCTION

In the effort to design secure systems, Physical Unclon-able Functions (PUFs) have emerged as a potential securityblock [1-4] as they can generate volatile secret keys for asystem. PUF is an integrated circuit that generates secretkeys by exploiting the inherent physical variations of devices.PUFs provide a high level of protection in security block.It offers strong volatile key storage to make the systemtamper-resistant. Functionally, a PUF maps a challenge, inputto the PUF, to responses, PUF output. A PUF exploits thephysical characteristics of silicon and provides an alterna-tive to conventional digital signature stored in non-volatilememory. It uses the physical properties of each device togenerate a chip-specific fingerprint or key. Identical PUFswith the same manufacturing process provide a different setof data because of small variations between each device.PUF can be used extensively in security applications such asIC identification/authentication, hardware metering, certifiedexecution, and key generation for encryption [4-9]. SeveralPUFs have been proposed over the past decade, such as ArbiterPUF [2], ring-oscillator-based PUF (RO-PUF) [4], SRAM-based PUF [13], Butterfly PUF [14], etc. Among them, theRO-PUF is considered more reliable under a wide range oftemperatures and it has been more widely accepted because itis less complex and easier to fabricate [4, 17, 22].

In order to be useful in practical security applications, thefingerprint or key generated by the PUF should be reliable orstable (i.e., not change over time). For example, in cryptogra-phy, decrypting the original message will be impossible withwrong private/public keys. Authentication of devices, securecommunication, etc. also suffer from complications due toPUF instability. It is relatively well known that aging andenvironmental variations lead to performance degradation and

lower reliability in ICs [10-12, 23-24, 32]. Similarly PUFs,hence, the keys they generate will therefore also be renderedless reliable by such variations. Run-time aging effects suchas negative bias temperature instability (NBTI), hot carrierinjection (HCI), oxide breakdown, and electromigration (EM)are the most critical causes of continuous performance andreliability degradation [10]. Threshold voltage (VT ), channellength, timing, etc. are the critical parameters that decide theperformance of a chip. NBTI can degrade VT of a transis-tor by 10-15% in the first year depending on technologyand workload [23], which reduces drive current and hencecircuit performance. During negative bias (pMOS is ON),pMOS experiences a constant degradation. However, partiallyrecovery occurs when the stress is removed (pMOS is OFF).HCI is a function of switching activity and can acceleratedegradation even further by shifting the threshold voltage ofnMOS transistors over time [12]. While HCI mostly impactsthe VT of the nMOS, it may also degrade the drain currentof both nMOS and pMOS [32]. The delay degradation due toNBTI and HCI follows the same trend as the VT degradation.The severity of the degradation due to NBTI and HCI isdependent on workload, logic function, temperature, supplyvoltage, threshold voltage, technology and geometry [10, 21,23-24, 32]. In general, low VT transistors experience moredegradation over time than high VT transistors. Similarly,higher-supply voltage, VDD, and higher-operating temperatureexpedite the delay degradation over time. Fundamentally,aging will permanently shift many critical parameters thePUF uses to generate its key and therefore is a significantconcern to PUF reliability. Another issue for PUF reliabilityis temperature variation. Operating temperature affects thedelay of a device by changing its mobility and thresholdvoltage [12]. As temperature increases, the threshold voltagedecreases which leads to an increase in the drain saturationcurrent. At the same time, it decreases the mobility of theMOSFET, which causes a decrease in the drain saturationcurrent. However, the mobility degradation dominates, andconsequently, the delay of the device decreases. Similar toaging, these temperature-induced changes to delay will alsocreate noise in the PUF’s key. However, unlike aging, theeffects can be reversed by returning the device to its nominaloperating temperature. Like temperature, power supply noisealso affects the delay, because of deviation from nominal VDD,of logic gates and hence the reliability of an IC. The powersupply delivery network and parasitic impedance of packagesresult in VDD fluctuation and impact the IC performance. Likeaging and temperature variation, VDD fluctuation is also liableto impact the reliability of a PUF. Unlike aging the supplynoise’s impact is temporary, i.e., when VDD is back to itsnominal value, the PUF operates more reliably. Researchershave proposed several techniques to improve the reliabilityof a PUF [16-19, 21, 23, 24, 28-29]. For example, errorcorrecting codes (ECC) have been used to fix up to a certainnumber of erroneous bits in the PUF key. For example, ithas been reported in [15] that the index-based syndromefollowed by a 3x repetition code and BCH [30] code can lowerthe RO-PUF error rate below 1 ppm under severe operating

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Table IV: % of ′1′ in response to all possible challenges atdifferent temperatures

Temperature (◦C)% ’1’ in response

% ImprovementARO-PUF RO-PUF

−25 60 66 9.090 59 64 7.81

25 55 60 8.3350 58 62 6.4575 58 62 6.45100 58 61 4.91125 58 60 3.33

and 45% ′0′ on average, which is close to the ideal value (50%′1′ and 50% ′0′) and better than the conventional RO-PUF.

Table V: Area overhead comparison for 128-bit key

Blocks ARO-PUF RO-PUF ReductionRequired ROs 510 16382 32xArea for ROs 510*6.5*AnMOS 16382*3.5*AnMOS 17.3xECC Encoder ∼ 3Kgates ∼ 12 Kgates ∼ 4xECC Decoder ∼ 20 Kgates ∼ 75 Kgates ∼ 3.75xAnMOS: Area of nMOS with Wn=0.12u3.5 ≡ (Wn = 0.12u)+(W p = 2.5∗Wn)6.5 ≡ (Wn = 0.12u)+(W p = 2.5∗Wn)+(WMb =Wn)+(WMc = 2∗Wn)

Area Overhead: Table V shows the estimated area overheadcomparison between ARO-PUF and RO-PUF for 128-bit keygeneration based on [30-31]. A system with the ARO-PUFrequires a smaller PUF footprint. For example, to correct∼ 7.9% and ∼ 25% errors for a 128-bit key generation, BCHrequires 255 and 8191 bits respectively [30]. Though AROconsumes more area than a conventional RO, ARO-PUF saves∼ 17x area because of smaller PUF footprint. At the sametime, both BCH encoder and decoder required lower overhead(timing, power and area) since ARO-PUF has less errors thanRO-PUF. Estimation shows that ARO-PUF offers ∼ 7x areareduction for BCH encoder and decoder. ARO-PUF offersmore area efficient implementation for longer key size.

V. CONCLUSION

In this work, we have proposed the first aging-resistantRO-PUF design. The simulation results show that the proposedARO-PUF ages significantly less compared to the conventionalRO-PUF. The ARO-PUF provides a more stable key over longtime and therefore reduces ECC complexity and offers smallerPUF footprint, resulting in a more efficient implementation. Atthe same time, the keys generated by the ARO-PUF are lesssensitive to temperature and also possess strong security prop-erties. In future work, we shall evaluate the proposed ARO-PUF in real ASICs and investigate complementary approachesfor further reducing ECC overhead.

VI. ACKNOWLEDGMENT

This work was supported in part by the National ScienceFoundation under grant CNS-0844995 and a grant from Com-cast.

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