arm architecture
DESCRIPTION
ARM Architecture. Computer Organization and Assembly Languages Yung-Yu Chuang 2007/11/ 5. with slides by Peng-Sheng Chen, Ville Pietikainen. Announcements. Midterm exam on 11/12 Open-book (books, lecture notes and your own notes but not computers). ARM history. - PowerPoint PPT PresentationTRANSCRIPT
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ARM Architecture
Computer Organization and Assembly Languages Yung-Yu Chuang 2007/11/5
with slides by Peng-Sheng Chen, Ville Pietikainen
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Announcements
• Midterm exam on 11/12 • Open-book (books, lecture notes and your
own notes but not computers)
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ARM history
• 1983 developed by Acorn computers– To replace 6502 in BBC computers – 4-man VLSI design team– Its simplicity comes from the inexperience team– Match the needs for generalized SoC for reasonable
power, performance and die size• 1990 ARM (Advanced RISC Machine), owned by
Acorn, Apple and LSI
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ARM Ltd
Design and license ARM core design but not fabricate
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Why ARM?
• One of the most licensed and thus widespread processor cores in the world– Used in PDA, cell phones, multimedia players, hand
held game console, digital TV and cameras– ARM7: GBA, iPod– ARM9: NDS, PSP, Sony Ericsson, BenQ– ARM11: Apple iPhone, Nokia N93, N800– 75% of 32-bit embedded processors
• Used especially in portable devices due to its low power consumption and reasonable performance
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ARM powered products
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Naming ARM
• ARMxyzTDMIEJFS– x: series– y: MMU– z: cache– T: Thumb– D: debugger– M: Multiplier– I: Interrupt– E: Enhanced – J: Jazelle– F: Floating-point– S: Source
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Popular ARM architecture
• ARM7TDMI– 3 pipeline stages– One of the most used ARM-version (for low-end
systems)
• ARM9TDMI– Compatible with ARM7– 5 pipeline stages– Separate instruction and data cache
• ARM11
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ARM architecture
• Load/store architecture
• A large array of uniform registers
• Fixed-length 32-bit instructions
• 3-address instructions
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Processor modes
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ARM architecture
• 37 registers– 1 Program counter– 1 current program
status registers– 5 saved program
status registers– 30 general purpose
registers
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Registers
• Only 16 registers are visible to a specific mode. A mode could access– A particular set of r0-r12– r13 (sp, stack pointer)– r14 (lr, link register)– r15 (pc, program counter)– Current program status register (cpsr)
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Register organization
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General-purpose registers
08 716 1524 2331
8-bit Byte
16-bit Half word
32-bit word
• 6 data types (signed/unsigned)• All ARM operations are 32-bit. Shorter data
types are only supported by data transfer operations.
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Program counter
• Store the address of the instruction to be executed
• All instructions are 32-bit wide and word-aligned
• Thus, the last two bits of pc are undefined.
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mode bits
Program status register (CPSR)
overflowcarry/borrowzeronegative
state bitFIQ disableIRQ disable