Indian Journal of Pure & Applied Physics

Vo l. 39, November 200 1, pp. 73 1-737

Analytical model for saturation drain current and substrate current of fully overlapped LDD MOSFET

Ani I Kumar, *Ekta Kalra, Srikanta Bose, Adarsh Singh, Simrata Bindra, **Subhas is Haldar & R S Gupta

Semi conductor Devices Research Laboratory, Department of Electronic Sc ience.

South Campus, Universi ty of Delh i, New Delhi II 0 02 1

*Multi Media University, Jalan Ayer Keroh Lama, 75450. Melaka, Malaysia

**Department of Physics, Motil al Nehru College, Benito Ju arez Road, New Delh i II 0 02 1

Received 20 April 200 I ; rev ised 9 Jul y 200 I ; accep ted 27 July 200 I

An analytic model fo r saturation drain current and substrate current of full y overlapped lightl y doped drai n (FOLD) MOSFET is developed using pseudo-two-dimensional approximation in the channel and drain regions and expression of maximum electric fie ld is obtained. An express ion fo r channel length modul ati on factor is also developed and the substrate current is calculated .

1 Introduction

Device degradati on caused by impact-ionizati on-generated hot carri ers near the drain junction imposes a seri ous limit to MOSFET scaling 1

• To reduce the hot carrier induced device damage, a li ghtly doped drain (LDD) MOSFET is introduced2

·' but it degrades the drain current drivability due to the presence of LDD paras it ic series res istances owing to a vo ltage drop across the LDD region . To reduce the paras itic res istance and ac hieve high performance n· full y overl apped structure, FOLD structure4

·7

, whi ch uses the angled ion-implanted method, is considered in the present analysis. Advantage of FOLD is that it can suppress hot carri er degradat ion in compari son with the conventional LDD due to trappi ng of e lec trons in the s idewall K.

When the e lectric fi e ld near the d ra in s ide reaches the critical f ie ld for saturat ion ve locity, a short channe l MOSFET will operate in the saturati on region. Furthermore, the high e lectri c fie ld in the drain j uncti on may resul t in carrier impact ioni zation and produces the substrate current. On the other hand, the pinch-off point of the invers ion channe l may move towards the source side as the dra in bi as increases, resulti ng in the ri se up of the drain current. In the present analys is an ana lytic mode l to ca lculate the maxi mum e lectric

fie ld is developed and the drawback of earli er model~ is overcome, which considered the non-zero value of the channe l length modulati on fac to r at the onset of saturation condition. Us ing the estab li shed /d- Vd mode l for the linear region pub lished in 1011 and the calculated channel length modul ation fac tor, the drain current in the saturati on region can be eas il y calculated. The substrate current fo r fu ll y overlapped lightly doped drain (FOLD) MOSFET is also obta ined using the calcul ated e lectric fie ld. T he good agreement between the developed model and experimental results for the LDD structure is found and the comparison of the results fo r LDD and FOLD is also shown.

2 Theoretical Considerations

The drain current of FOLD M OSFET in the linear region is expressed as 10

:

~t,WC,_, w; .. - VTO- av,;,.

... ( I )

where J..l, is the maxi mum e lectron mobility in the inversion layer of the active channe l device, L (W) the effecti ve channe l length (width), Vro the

732 INDIAN 1 PURE & APPL PHYS, VOL 39, NOVEMBER 2001

threshold voltage at zero drain bias , C,IX the gate­

oxide capacitance per unit area, 1/JF the fermi potential, £.,; dielectric permittivity of silicon, a, T/ the empirical constants of the electron mobility in

the inversion layer, {3 the reciprocal of the critical I 1 .

field , a = 2- k , b = 2 + k and k the slope of the

threshold voltage-drain voltage curve at zero drain

bias. v .... ,' ( Vtf,· ') are intrin sic gate (drain) to source voltage and are given 11 as:

... (2a)

and

=Vt.-. -!".,. R, ... (2b)

where R.,., =R,.,. + R, and R, =R,.,. + R,. + R," + R", R," (R11,.) are the series resistance of the n.· region near the drain (source) side.

Substituting L and vd.: for L - L·'"' and V'·'"' respectively, the drain current in the saturation region can be written as:

Using Eq. (2a), Eq. (3) reduces to :

A1lt~.w/ + B1lt!.wt + C1 = 0

The solution of Eq. (4) is given by:

-B1 +VB~2 -4AI C1 fd.-.at = 2 AI

where

a Cox A I = --2-- R.,.,

£.,;

I Vt!.wt C WR Bl = + f.ln ox ·'' +

(L- L,",)

... (3)

... (4)

... (5)

... (6a)

... (6b)

and

f.l,CoxW (V V V )V (L- L ) xs - TO -a dsat d.wt

Slll

. .. (6c)

As the drain voltage is increased, the electric field in the channel region near the dra in will reach the critical electric field E"', and will result in the saturation velocity for electrons. The saturation current at the saturation voltage can be expressed as:

where V".,."" E"" and f.letf are the saturation voltage, saturation electric field and the effective mobility in the channel region respectively . Using Eq. (2a) , Eq. (7) can be written as:

f.l~tr W Cox( Vx.-. - Vm- (1-k) Vt~."" ) Ew,

!".,."' = 1 W C (R R )E + Jle.n· ox s + II.\' sat ... (8)

Eq .(l) can also be rewritten as:

... (9)

where

f.l,

.. . (I 0)

Substituting V",' = Vt.,m and Eq. (2a) into Eq. (9), the drain current in the saturation region can be written as :

... ( I I )

Equating Eqs (8) and (I I) , the saturation voltage in the channel region can be obtained from:

... ( 12)

or

KUMAR et af.: OVERLAPPED LDD MOSFET 733

where

Az = (k- k) + k E.wa WJ..L.n Cox (R, + R,.,)

Bz =(I- k) £""' L+ (V .... , - VTo)

C2 = - E.wrr L(V8_, - VTo)

~--- L --··-~ ·- - ---··········- ---·-

... (13 )

... ( I 4a)

... (14b)

. . . (14c)

Fig. I - The schematic diagram of a FOLD MOSFET in the saturation region

The saturation voltage at the drain end CVvsAT) can be expressed as:

. .. (15)

Using Eqs (II) and (13) of Refs. I I , the above equation gives:

... (I 6)

or

... (I 7)

with

.. . (18a)

... (1 8b)

... ( I 8c)

where C(FOLD) is the capac itance 11 of the surface charge layer in then· region .

It is assumed that the channe l current is uniformly distributed with the finite depths of x; and r,. for the channel and drain edges , respectivel y (Fig. 1). Gauss ' s law is applied to rectangular boxes labeled (1)-(4) in the velocity-saturated depl eted region of the channel and drain region s. The equation for the field at the surface in the channel region can be written as:

Xj y Xj _r .\',/

fE,;E111,dX- ft: ox Eoxdy - fE,.;Erdx +q J J N( x) dx dy () -L~,, 0 . - L ,.lll X j

... ( I 9)

-L.wa

Similarly, the lateral electric field in the drain region can be written as :

r,. y,1 r,. y,1 r,. +W,1

- f E,;E,.111d.x- f EoxEoxdy + f E,;E rd.x + q f f N (x) dx dy 0 y 0 . y r,

Yd Y<~

= -J Qm dy - qf Nd r,. dy .. . (20)

y y

where wd is the depletion width under the drain region, Yd(y) is depletion width in two-dimen sional­approximation section near the channel side.

The mobile charge density can be written as (see Appendix A)

. . . (2 I )

The normal electric field at the interface is given by:

(V8.:- VFn- ¢., - V) E,x = t

ox . .. (22)

Using Eqs (21) and (22) , Eqs (19) and (20) reduce as : (see Appendix B)

734 lNDlAN J PURE & APPL PHYS, VOL 39, NOVEMBER 2001

d2V 2 ) 2 d/ -K1 (V - V"'"' = -K1 T1 -L,,11~y5D

and

d2 V K 2 ( V V ') - K 2 T 0< < d/ - 2 - "" - - 2 2 ~Y-Yc~

where

(c )112 K - ----1.!L

I- E.,.iXj

K - __!!L ( c )1/2

2 - E.,·i r"

and

.. . (23)

... (24)

... (25 )

... (26)

... (27)

, ) 2 /""'' q N"( ) , T2 = ( V.11s - V FB - t/J.,. - W C - C r" + Wd - Vts ox v.,. ox

... (28)

The differential Eqs (23) and (24) are subj ected to the fo llowing boundary conditi ons:

At the pinch-off point, y = -L.w11

V = Vt.wt and Er = E.wt·

At the end of the depletion edge, y = Yc1

V = Vt/ and Er = E.l'(lt.

The channel potential and the electric field are continuous between the different regions i.e. , substrate and LDD.

Using above boundary conditions, Eqs (23) and (24) are solved as:

V = P1 exp(K, y) + Q1 exp(-K1 y) + T1 + V"'"'

.. . (29)

V = P2 exp(K2y) + Q2 exp(-K2y) + T2 + V"/

... (30)

where

I ( E.\'(/') ( ) ( ) P1 = 2 -T1 + J<': exp K1 L.\'(/1 = M1 exp K1 L.,11 1

... (31)

I ( £.\'(/,) ( ) ( ) QJ = 2 -T1 -f<': exp -K1 L.\'(/1 = N1 exp -K1 L\'(/ ,

.. . (32)

I ( E.\'(/') ( ) ( ) P2 = 2 -T2 + Kz exp -K2Yc1 = M2 exp -K2Yc1

... (33)

I ( E.\'(/') ( ) ( ) Q2 = 2 -T2 -Kz exp K2Yc1 = N2 exp K2Yc1

.. . (34)

Differentiating Eq. (29) and putting y = 0, the maximum electric field can be calcu lated as:

.. . (35)

Since potential and electric field are continuous at y = 0, Eqs (29) and (30) give:

PI + QJ = p2 + Q2 + z KJ PI - KJ QJ = K2 p2 - K2 Q2

where Z = T2 + V"/ - T1 - V"\'(/'

... (36)

.. . (37)

Eqs (36) and (37) can also be reduced to the following quadratic equation :

A4M 1 exp(K1L"',) + N1 exp(-K1Lw,)) 2 +

... (38)

where

A4 = - (K/- K/) .. . (39a)

B4 = 2 K/ Z ... (39b)

C4 =- 4 K1 2 M1 N1 + 4 K/ M2 N2- K/ Z2 ... (39c)

Solving Eq. (38) one can get:

M1 exp(K1L,."') + N1 exp(-K1L""))

-B4 +~B;f -4A4C4 = =DJ

2A4

. . . (40)

which implies:

Therefore, L.wt can be expressed by:

KUMAR et al.: OVERLAPPED LDD MOSFET 735

... (42)

The substrate current expression proposed in Ref. I 2 can be expressed as:

( Bs J l .mh = As Emax Ids exp -E max

.. . (43)

where Ids can be obtained by Eq. (5); As and Bs are the fitting parameters; Enuu is the maximum electric

field .

3 Results and Discussion

Fig. 2(a,b) shows the variation of the drain current for FOLD and LDD MOSFETs with drain voltage at the different gate voltages. The modeled results for LDD structure show the close proximity with the experimental data". The comparison of drain currents for LDD and FOLD structures is also shown. It is observed that FOLD structure can

1 C • ·---- -----··--------·-··--· ·----····---- --·····

.s

·G

.,(_

2.

0 0

, 2

1 0

a

G

'·

2

0 0

t-._.., o de -1 ,..,.., o de l

'I ~ 11;0 0 2 9 .J..T ,.,.._

'V"y" :=: 1 0 ~- ~· m

1 o "X '"'90A

0 - S .,.o

( l.. C • L ) ')

f ,_ CJ· C:> ) { F"O L D ::

........... ~ .. ·············------......_ ______________ .... _______ .._ __ _ 1 . s 2 ·0 2-s 3 -o 3-s ~ .. .. o .::,.s ~:=.-o

£::)'1!'"' -o i r:·'ll v-o I 't. o. g e · { V }

Fig. 2- (b) /d- Vd characteristics of FOLD and LDD MOSFETs for different gate voltages. [~0=605cm2/V -s, a=2.5x I o-7 crn!Y. ~=8 .8x l0"5crn!Y, T]=2.05x i0"2V"1

, vlh = -0.97V, R, = Rd =38!1, N,=2.2xl0 16cm·J. Nd=I.Oxi0 1Rcm"\ Xj = 0.22~m. rn = 0.25~m]

~: [ L ... 0

1'-_., ode-1 ( ~~--OL. 'C• ') L = <:) -· G 2 J. .. ~ ~·r"!t

......... ~" ""' 5 S .1-1. r .-. ,"0~ ....., 2. s o A

Fig. 3-Variation of maximum electric field of FOLD and LDD MOSFETs with gate voltage

736 INDIAN 1 PURE & APPL PHYS, VOL 39, NOVEMBER 2001

achieve higher drivability than the LDD owing to less parasitic resistance of the n· region . Therefore resistance of the n· region at the source/drain (R",IR,R1) end is the main parameter that cause the difference in the characteristics of LDD and FOLD structures.

Fig. 3 shows the variation of the calculated E max

in Eq. (35) with gate bias taking the drain voltage as a parameter. It is found that electric field is less in the FOLD structure than that of LDD structure.

Go t e vottoge \ v !

Ga1~ volta g (• r V)

E><r•t (I, 00 I "'" <> d<t" I ( ~ - () ())

' ' " · . 0 •• '" ··············(,, . , .l Y ./ tt •,•; J.f ~"' ! ~ ... " ~ 7 f ; '{; .!.

-· ~---·-- ··· ' ·-~-·--···· ................. ... l ,,, ___ .. .i ... _ 1 ~ (.. ._, (. '7

Fig. 4- Modelled and measured substrate current versus gate­voltage characteristics of FOLD and LDD MOSFETs. (a) L =. 32Jlm (b) L =- 64Jlm (c) L =. 62Jlm [A 5 = 5.8 xlo-5 crn!V, B5 = 3.lxl06 Y/cm)

The modelled and experimental 14 substrate currents for FOLD and LDD devices with different channel lengths are shown in Fig. 4 . It is observed from the figures that the FOLD devices show lower substrate current than LDD devices because the parasitic effect at n- extension region is minimi zed due to higher controllability of the gate electrode at that region. The substrate current l "'" initi all y increases with increasing gate voltage initially due to the increase in drain current. A further increase in gate voltage will result in the decrease in substrate current due to increase in saturation drain voltage, which in turn reduces the channel field. Thus the substrate current increases first , reaches a peak value and then decreases.

4 Conclusion

In the present model, an analytic saturation model has been developed for fully overlapped lightly doped drain MOSFET using the pseudo-two­dimensional approximation in the channel and drain regions to obtain the channel length modulation and the maximum electric field. In order to verify the accuracy of a developed saturation model , the calculated drain and substrate currents are compared with the experimental resul ts, and a good agreement is obtained. It is confirmed that the reduction in substrate current realizes the most reliable drain structure design for the FOLD structure. This is because the parasitic effect at n­extension region is minimized due to higher controllability of the gate electrode at that region.

Acknowledgement

The authors are grateful to Defence Research and Development Organization , Ministry of Defence, Government of India for providing financial support to carry out this work.

Appendix A

The velocity of electron in the linear region is :

V,. = flnE

The drift velocity at the onset of saturation can be obtained from :

f.l"E vdrift =--E-

1+­Ec

KUMAR er al.: OVERLAPPED LDD MOSFET 737

by setting E=Ecin order to simplify the analysis , the drain current in Two Dimensional Approximation section is assumed to be equal to /d'"" so the mobile charge density can be written as :

Q = /dsat

"' Wvdrift(EJ

Appendix B

Differentiating Eq. ( 19) with respect to y and combining with Eqs (21) and (22) , one can get:

d 2V [Cox )v· -V _n. -V) 2 + !:-" FB 'l's

dy E,;Xj

-[ Cox r (V. -V _n. -V)- 2/"·"'' - QNa y l K·' FB 'l'x WC C d

~~ M~ M

Adding (C.,/£,; X;) vdsal on both sides of the above equation, one can have:

d2v -[~)v-v )=-[~1 2 d .I'U(

dy E,;X j E,;X;

( .I'll( ll y v (

. 21 1 QN l (VK-" - VFB -1/J.,.- V)- WCoxV,. - Cox d- t!.wt

(c )112

where Kt = ___!!L £.,; Xj

Similarly Eq. (24) can also be obtained.

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