Advancing Optics with Physical & Link Layer Interoperability

Steve JoinerOIF Technical Committee Chair

Ignis Opticssteve.joiner@ignisoptics.com

Agenda

Mission of the Optical Internetworking Forum

OIF’s Strategy to advance optics What are Implementation Agreements? Published Implementation Agreements Work in Progress OIF at Supercomm2003

OIF’s Mission

Foster the development and deployment of interoperable products and services for data switching and routing using optical networking technologies.

Requires addressing multiple issues related to optical internetworking for• Carrier• System vendor• Component vendor

Integrated approach strengthens the OIF’s ability to fulfill its mission.

Strategy to Achieve Mission Industry Driven Focus

• Carrier Voice in the technical committee• Membership driven

Develop Implementation Agreements Rapid Development controlled by a

rigorous standards-like process Working Group Organization

• Carrier• Architecture• Signaling• OAM&P (security)• Physical and Link Layer (PLL)• Interoperability

Implementation Agreements

Narrowing the choices to a single profile

Create the “Glue Logic” that enables the commercial implementation of standards

Create new standards when needed

Do IAs advance the optics industry? Improves development efficiency

• Collective wisdom prevails• Reduces development mis-steps• Results driven process required• Technology providers make first solution

selection Improves adoption rate by industry

• Interoperability tests reduce risk• Improves confidence in new technology

Improves system cost• Creates competition• Competitive edge driven by factors other than

basic performance; i.e. price, efficiency, etc. Improves time to market

Published IAs

Network control and signaling Electrical interfaces Optical interfaces Optical multi-source agreement Security

Critical non-IAs driving the industry• Carrier Requirement Documents

• Liaisons to ITU, IETF, T1X1…

OIF Electrical Specifications

OIF Electrical Specifications

SFI = SERDES to Framer Interface

SPI = System Packet Interface

TFI = TDM Fabric Interface

CEI = Common Electrical Specification

Electrical Interface Architecture for the Data Path

SERDES FramerInterface (SFI)

FEC

Data

Clock

Data

Clock

OR

SERDES FramerInterface (SFI)

OpticalInterface

SERDES Device

andOptics

Data

Clock

Data

Clock

OIF Electrical Specifications

Status

Transmit Link Layer

Device

Receive Link Layer

Device

System PacketInterface (SPI)

Data

Status

Data

Data

Data

T F I

PHYDevice

TDM Fabric to Framer Interface (TFI)

System Packet Interface (SPI-n)

Transmit Link Layer

Device

Receive Link Layer Device

PHYDevice

Data

TransmitInterface

Status

Data

Status

ReceiveInterface

System PacketInterface (SPI)

S y s t e m t o O p t i c s

O p t i c s t o S y s t e m

OC-48SPI3-1 16 lane path

OC-192SPI4-1 16 lane pathSPI4-2 4 lane path

OC-768SPI5-1 16 lane path

OIF-SFI-4 phase 1 Electrical InterfaceS y s t e m t o O p t i c s

O p t i c s t o S y s t e m

Serdes

REFCLK REFCLK REFCLK

FramerFEC

Processor

TXCLK

TXDATA [15:0] DC

TXCLKSRC

AB

RXCLK

RXDATA [15:0]

AB

TXCLKSRC

AB

RXCLK

RXDATA [15:0]

AB

TXCLK

TXDATA [15:0]

DC

The 300 pin MSA data interface

SerdesFramerFEC

Processor

REFCLKREFCLKREFCLK

TXCLKSRC

AB

TXCLKSRC

AB

OIF-SFI-4 phase 1 OIF-SFI-4 phase 2 S y s t e m t o O p t i c s

O p t i c s t o S y s t e m

TXCLK

TXDATA [15:0] DC

Phase 1

TXCLK

TXDATA [15:0]

DC

Phase 1

RXCLK

RXDATA [15:0]

AB

Phase 1

RXCLK

RXDATA [15:0]

AB

Phase 1

SerdesFramerFEC

Processor

REFCLKREFCLKREFCLK

TXCLKSRC

AB

TXCLKSRC

AB

OIF-SFI-4 phase 1 OIF-SFI-4 phase 2 S y s t e m t o O p t i c s

O p t i c s t o S y s t e m

TXCLK

TXDATA [3:0] DC

Phase 2

TXCLK

TXDATA [3:0]

DC

Phase 2

RXCLK

RXDATA [3:0]

AB

Phase 2

RXCLK

RXDATA [3:0]

AB

Phase 2

Capable of driving at least 8” of FR4 interconnect with one connector

SerdesFramerFEC

Processor

OIF-SFI-4 phase 2 Electrical Interface

8"8"

S y s t e m t o O p t i c s

O p t i c s t o S y s t e m

TXDATA [3:0] DC

TXCKSRC

AB

RXDATA [3:0]

AB

TXCKSRC

AB

RXDATA [3:0]

AB

TXDATA [3:0] DC

REFCK REFCK REFCK

SFI-5 OC-768 SERDES to Framer Interface

TXREFCK TXREFCK TXREFCK

RXREFCK

SerdesFramer

FECProcessor

TXDCK

TXDATA [15:0]

TXDSC

TXCKSRC

TXDCK

TXDATA [15:0]

TXDSC

TXCKSRC

RXREFCK

DC

AB

DC

AB

RXDCK

RXDATA [15:0]

RXDSC

RXSAB

RXDCK

RXDATA [15:0]

RXDSC

RXSAB

Supports Forward Error Correction (FEC).

EFECGFEC

S y s t e m t o O p t i c s

O p t i c s t o S y s t e m

TDM Fabric to Framer (TFI-5)Reference Diagram

TD

M S

witch

Fab

ric

SONETFramer

TFI-5

SONETFramer

FECProcessor

SONET/SDHOC 3/12/48/192/768

G.709 OTN OTM 1/2/3

10GE LAN PHProcessor

10GELAN PHY

SONETSignals

Non-SONETSignals

SONETFramer

Tunable Laser IAs

Tuneable Laser IA• Classify Tunable lasers by application and

features• Protocol for Command; multiple interfaces• Multiple mechanical feature options

Tuneable Laser MSA IA• Specific set of choices from Tuneable Laser

IA

Common Electrical I/0 (CEI) Supercomm2003 – Introduction to market Under Development by OIF 4 physical link interfaces

• 6+ Gbs Short Reach Long Reach• 11+ Gbs Short Reach Long reach

Short reach• Chip to chip• Chip to module across one connector

Long Reach• Backplane with two connectors

Data signaling for future interfaces• Future SPI4 and SPI5 interfaces• Future SFI4 and SFI5 interfaces• Future TFI5 interface

OIF at Supercomm 2003

Superdemo Area See interoperability demonstrations

• CEI 6+ G Long reach• CEI 11+ G Short reach• CEI 11+ G Long reach• SPI-4.2• SFI-4.1• Tuneable Laser MSA• UNI/NNI