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October 2008

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET

©2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.comFDS4897AC Rev.C

FDS4897AC Dual N & P-Channel PowerTrench® MOSFET N-Channel: 40 V, 6.1 A, 26 mΩ P-Channel: -40 V, -5.2 A, 39 mΩ

FeaturesQ1: N-Channel

Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.1 A

Max rDS(on) = 31 mΩ at VGS = 4.5 V, ID = 5.6 A

Q2: P-ChannelMax rDS(on) = 39 mΩ at VGS = -10 V, ID = -5.2 A

Max rDS(on) = 65 mΩ at VGS = -4.5 V, ID = -4.1 A

100% UIL Tested

RoHS Compliant

General DescriptionThese dual N- and P-Channel MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench® process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance.

ApplicationsInverter

Power Supplies

SO-8

Q1

Q2

Q1

Q2

S1

G1

S2

G2

D1

D1

D2

D2

1

2

3

4

8

7

6

5

Pin 1

D1D1

D2D2

S2

S1G1

G2

MOSFET Maximum Ratings TA = 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Q1 Q2 UnitsVDS Drain to Source Voltage 40 -40 VVGS Gate to Source Voltage ±20 ±20 V

IDDrain Current - Continuous 6.1 -5.2

A - Pulsed 24 -24

PD

Power Dissipation for Dual Operation 2.0WPower Dissipation for Single Operation TA = 25 °C (Note 1a) 1.6

TA = 25 °C (Note 1b) 0.9EAS Single Pulse Avalanche Energy (Note 3) 37 73 mJTJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C

RθJC Thermal Resistance, Junction to Case, (Note 1) 40°C/W

RθJC Thermal Resistance, Junction to Ambient, (Note 1a) 78

Device Marking Device Package Reel Size Tape Width QuantityFDS4897AC FDS4897AC SO-8 13 ” 12 mm 2500 units

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Electrical Characteristics TJ = 25 °C unless otherwise noted

Off Characteristics

On Characteristics

Dynamic Characteristics

Switching Characteristics

Symbol Parameter Test Conditions Type Min Typ Max Units

BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 VID = -250 µA, VGS = 0 V

Q1Q2

40-40 V

∆BVDSS ∆TJ

Breakdown Voltage TemperatureCoefficient

ID = 250 µA, referenced to 25 °CID = -250 µA, referenced to 25 °C

Q1Q2 37

-32 mV/°C

IDSS Zero Gate Voltage Drain Current VDS = 32 V, VGS = 0 VVDS = -32 V, VGS = 0 V

Q1Q2

1-1 µA

IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V Q1Q2 ±100

±100nAnA

VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 µAVGS = VDS, ID = -250 µA

Q1Q2

1.5-1.5

2.0-2.0

3.0-3.0 V

∆VGS(th) ∆TJ

Gate to Source Threshold VoltageTemperature Coefficient

ID = 250 µA, referenced to 25 °CID = -250 µA, referenced to 25 °C

Q1Q2

-6 6 mV/°C

rDS(on) Static Drain to Source On Resistance

VGS = 10 V, ID = 6.1 A VGS = 4.5 V, ID = 5.6 A VGS = 10 V, ID = 6.1 A, TJ = 125 °C

Q1202430

263139

mΩVGS = -10 V, ID = -5.2 A VGS = -4.5 V, ID = -4.1 A VGS = -10 V, ID = -5.2 A, TJ = 125 °C

Q2284541

396557

gFS Forward Transconductance VDD = 5 V, ID = 6.1 AVDD = -5 V, ID = -5.2 A

Q1Q2

2414 S

Ciss Input Capacitance Q1VDS = 20 V, VGS = 0 V, f = 1 MHZ

Q2VDS = -20 V, VGS = 0 V, f = 1 MHZ

Q1Q2 795

76510551015 pF

Coss Output Capacitance Q1Q2

95135

130180 pF

Crss Reverse Transfer Capacitance Q1Q2

6580

100120 pF

Rg Gate Resistance Q1Q2

1.73.6 Ω

td(on) Turn-On Delay Time Q1VDD = 20 V, ID = 6.1 A, VGS = 10 V, RGEN = 6 Ω

Q2VDD = -20 V, ID = -5.2 A, VGS = -10 V, RGEN = 6 Ω

Q1Q2 6

81215 ns

tr Rise Time Q1Q2 2

31010 ns

td(off) Turn-Off Delay Time Q1Q2 17

173030 ns

tf Fall Time Q1Q2 2

31010 ns

Qg(TOT) Total Gate Charge Q1VGS = 10 V, VDD = 20 V, ID = 6.1 A

Q2VGS = -10 V, VDD = -20 V, ID = -5.2 A

Q1Q2

1515

2120 nC

Qgs Gate to Source Charge Q1Q2 2.5

2.6 nC

Qgd Gate to Drain “Miller” Charge Q1Q2 2.9

3.2 nC

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Electrical Characteristics TJ = 25 °C unless otherwise noted

Drain-Source Diode Characteristics

Symbol Parameter Test Conditions Type Min Typ Max Units

VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2)VGS = 0 V, IS = -1.3 A (Note 2)

Q1Q2 0.75

-0.76 1.2-1.2 V

trr Reverse Recovery Time Q1IF = 6.1 A, di/dt = 100 A/sQ2IF = -5.2 A, di/dt = 100 A/s

Q1Q2

1720

3136 ns

Qrr Reverse Recovery Charge Q1Q2 7

101520 nC

b) 135 °C/W when mounted on a minimun pad

a) 78 °C/W when mounted on a 1 in2 pad of 2 oz copper

Notes:1: RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by

the user's board design.

2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.3: Starting TJ = 25 °C, N-ch: L = 3 mH, IAS = 5 A, VDD = 40 V, VGS = 10 V; P-ch: L = 3 mH, IAS = -7 A, VDD = -40 V, VGS = -10 V.

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted

Figure 1.

0.0 0.5 1.0 1.5 2.00

4

8

12

16

20

24

VGS = 3 V

VGS = 3.5 V

PULSE DURATION = 80 µsDUTY CYCLE = 0.5% MAX

VGS = 4.5 V

VGS = 4 V

VGS = 10 V

I D, D

RA

IN C

UR

REN

T (A

)

VDS, DRAIN TO SOURCE VOLTAGE (V)

On Region Characteristics Figure 2.

0 4 8 12 16 20 240.5

1

2

3

4

5

VGS = 3.5 V


NO

RM

ALI

ZED

DR

AIN

TO

SO

UR

CE

ON

-RES

ISTA

NC

E

ID, DRAIN CURRENT (A)

VGS = 4 V VGS = 4.5 V

VGS = 3 V

VGS = 10 V

Normalized On-Resistance vs Drain Current and Gate Voltage

Figure 3. Normalized On Resistance

-75 -50 -25 0 25 50 75 100 125 1500.6

0.8

1.0

1.2

1.4

1.6

1.8

ID = 6.1 AVGS = 10 V

NO

RM

ALI

ZED

DR

AIN

TO

SO

UR

CE

ON

-RES

ISTA

NC

E

TJ, JUNCTION TEMPERATURE (oC)

vs Junction TemperatureFigure 4.

2 4 6 8 1010

20

30

40

50

60

70

80

ID = 6.1 A

TJ = 125 oC

TJ = 25 oC


r DS(

on),

DR

AIN

TO

SO

UR

CE

ON

-RES

ISTA

NC

E (m

Ω)

VGS, GATE TO SOURCE VOLTAGE (V)

On-Resistance vs Gate to Source Voltage

Figure 5. Transfer Characteristics

1 2 3 40

4

8

12

16

20

24

TJ = 150 oC

VDS = 5 V


TJ = -55 oCTJ = 25 oCI D, D

RA

IN C

UR

REN

T (A

)

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 6.

0.0 0.2 0.4 0.6 0.8 1.0 1.20.001

0.01

0.1

1

10

40

TJ = -55 oC

TJ = 25 oCTJ = 150 oC

VGS = 0 V

I S, R

EVER

SE D

RA

IN C

UR

REN

T (A

)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Source to Drain Diode Forward Voltage vs Source Current

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Figure 7.

0 4 8 12 160

2

4

6

8

10

ID = 6.1 A

VDD = 25 V

VDD = 15 V

V GS,

GA

TE T

O S

OU

RC

E VO

LTA

GE

(V)

Qg, GATE CHARGE (nC)

VDD = 20 V

Gate Charge Characteristics Figure 8.

0.1 1 10 4010

100

1000

2000

f = 1 MHzVGS = 0 V

CA

PAC

ITA

NC

E (p

F)

VDS, DRAIN TO SOURCE VOLTAGE (V)

Crss

Coss

Ciss

Capacitance vs Drain to Source Voltage

Figure 9.

0.01 0.1 1 10 201

2

3

456789

10

TJ = 25 oCTJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

I AS,

AVA

LAN

CH

E C

UR

REN

T (A

)

Unclamped Inductive Switching Capability

Figure 10.

25 50 75 100 125 1500

1

2

3

4

5

6

7

VGS = 4.5 V

RθJA = 78 oC/W

VGS = 10 V

I D, D

RA

IN C

UR

REN

T (A

)

TC, AMBIENT TEMPERATURE (oC)

Maximum Continuous Drain Current vs Ambient Temperature

Figure 11. Forward Bias Safe Operating Area

0.01 0.1 1 10 1000.01

0.1

1

10

30

1 s10 s

DC

100 ms

10 ms

1 ms

100 us

I D, D

RA

IN C

UR

REN

T (A

)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS LIMITED BY rDS(on)

SINGLE PULSETJ = MAX RATEDRθJA = 135 oC/WTA = 25 oC

200

Figure 12.

10-4 10-3 10-2 10-1 1 10 100 10000.5

1

10

100

1000

SINGLE PULSERθJA = 135 oC/WTA = 25 oC

VGS = 10 V

P(PK

), PE

AK

TR

AN

SIEN

T PO

WER

(W)

t, PULSE WIDTH (sec)

Single Pulse Maximum Power Dissipation


FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Figure 13.

10-4 10-3 10-2 10-1 1 10 100 10000.001

0.01

0.1

1

SINGLE PULSERθJA = 135 oC/W(Note 1b)

DUTY CYCLE-DESCENDING ORDER

NO

RM

ALI

ZED

TH

ERM

AL

IMPE

DA

NC

E, Z

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5 0.2 0.1 0.05 0.02 0.01

2

PDM

t1

t2NOTES:DUTY FACTOR: D = t1/t2PEAK TJ = PDM x ZθJA x RθJA + TA

Junction-to-Ambient Transient Thermal Response Curve


FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted

Figure 15. On- Region Characteristics Figure 16. Normalized on-Resistance vs Drain Current and Gate Voltage

Figure 17. Normalized On-Resistance vs Junction Temperature

Figure 18. On-Resistance vs Gate to Source Voltage

Figure 19. Transfer Characteristics Figure 20. Source to Drain Diode Forward Voltage vs Source Current

0.0 0.5 1.0 1.5 2.0 2.5 3.00

4

8

12

16

20

24VGS = -10 V

VGS = -4.5 V


VGS = - 4 V

VGS = -3.5 V

VGS = -5 V

-I D, D

RA

IN C

UR

REN

T (A

)

-VDS, DRAIN TO SOURCE VOLTAGE (V)0 4 8 12 16 20 24

0.5

1

2

3

4

5

VGS = -3.5 V

VGS = -5 V


NO

RM

ALI

ZED

DR

AIN

TO

SO

UR

CE

ON

-RES

ISTA

NC

E

-ID, DRAIN CURRENT (A)

VGS = -4.5 V

VGS = -4 V

VGS = -10 V

-75 -50 -25 0 25 50 75 100 125 1500.6

0.8

1.0

1.2

1.4

1.6

1.8

ID = -5.2 AVGS = -10 V

NO

RM

ALI

ZED

DR

AIN

TO

SO

UR

CE

ON

-RES

ISTA

NC

E

TJ, JUNCTION TEMPERATURE (oC)2 4 6 8 10

20

40

60

80

100

120


TJ = 125 oC

TJ = 25 oC

ID = -5.2 Ar D

S(on

), D

RA

IN T

O

SOU

RC

E O

N-R

ESIS

TAN

CE

(mΩ

)

-VGS, GATE TO SOURCE VOLTAGE (V)

1 2 3 4 50

4

8

12

16

20

24

VDS = -5 V


TJ = -55 oCTJ = 25 oC

TJ = 150 oC

-I D, D

RA

IN C

UR

REN

T (A

)

-VGS, GATE TO SOURCE VOLTAGE (V)0.0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

1

10

40

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

VGS = 0 V

-I S, R

EVER

SE D

RA

IN C

UR

REN

T (A

)

-VSD, BODY DIODE FORWARD VOLTAGE (V)

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET



Figure 21. Gate Charge Characteristics Figure 22. Capacitance vs Drain to Source Voltage

Figure 23. Unclamped Inductive Switching Capability

Figure 24. Maximum Continuous Drain Current vs Ambient Temperature

Figure 25. Forward Bias Safe Operating Area

Figure 26. Single Pulse Maximum PowerDissipation

0 4 8 12 160

2

4

6

8

10

ID = -5.2 A

VDD = -20 V

VDD = -15 V

-VG

S, G

ATE

TO

SO

UR

CE

VOLT

AG

E (V

)

Qg, GATE CHARGE (nC)

VDD = -25 V

0.1 1 10 4010

100

1000

2000

f = 1 MHzVGS = 0 V

CA

PAC

ITA

NC

E (p

F)

-VDS, DRAIN TO SOURCE VOLTAGE (V)

Crss

Coss

Ciss

0.1 1 10 401

2

3

456789

10

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

-I AS,

AVA

LAN

CH

E C

UR

REN

T (A

)

25 50 75 100 125 1500

1

2

3

4

5

6

RθJA = 78 oC/W

VGS = -4.5 V

VGS = -10 V

-I D, D

RA

IN C

UR

REN

T (A

)

TC, AMBIENT TEMPERATURE (oC)

0.01 0.1 1 10 1000.01

0.1

1

10

30

10 s

1 s

100 ms

DC

10 ms

1 ms

100 us

THIS AREA ISLIMITED BY rds(on)

SINGLE PULSETJ = MAX RATED

RθJA = 135 oC/WTA = 25 oC

-I D, D

RA

IN C

UR

REN

T (A

)

-VDS, DRAIN to SOURCE VOLTAGE (V)200 10-4 10-3 10-2 10-1 1 10 100 1000

0.51

10

100

1000

VGS = -10 V

SINGLE PULSERθJA = 135 oC/W

P(PK

), PE

AK

TR

AN

SIEN

T PO

WER

(W)

t, PULSE WIDTH (sec)


Figure 27. Junction-to-Ambient Transient Thermal Response Curve

10-4 10-3 10-2 10-1 1 10 100 10000.001

0.01

0.1

1

SINGLE PULSERθJA = 135 oC/W(Note 1b)

DUTY CYCLE-DESCENDING ORDER

NO

RM

ALI

ZED

TH

ERM

AL

IMPE

DA

NC

E, Z

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5 0.2 0.1 0.05 0.02 0.01

2

PDM

t1

t2NOTES:DUTY FACTOR: D = t1/t2PEAK TJ = PDM x ZθJA x RθJA + TA

FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


FDS4897A

C D

ual N &

P-Channel Pow

erTrench® M

OSFET


Rev. I37

ANTI-COUNTERFEITING POLICYFairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Farichild’s Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support.

Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Farichild strongly encourages customers to purchase Farichild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Farichild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Farichild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.

PRODUCT STATUS DEFINITIONSDefinition of Terms

TRADEMARKSThe following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.

* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.

DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices or systems which, (a) are

intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

Build it Now™CorePLUS™CorePOWER™CROSSVOLT™CTL™Current Transfer Logic™EcoSPARK®

EfficentMax™EZSWITCH™ * ™

Fairchild®

Fairchild Semiconductor®FACT Quiet Series™FACT®

FAST®

FastvCore™FlashWriter® *FPS™F-PFS™

FRFET®

Global Power ResourceSM

Green FPS™Green FPS™ e-Series™GTO™IntelliMAX™ISOPLANAR™MegaBuck™MICROCOUPLER™MicroFET™MicroPak™MillerDrive™MotionMax™Motion-SPM™OPTOLOGIC®

OPTOPLANAR®®

PDP SPM™Power-SPM™PowerTrench®

PowerXS™

Programmable Active Droop™QFET®

QS™Quiet Series™RapidConfigure™

™Saving our world, 1mW /W /kW at a time™SmartMax™SMART START™SPM®

STEALTH™SuperFET™SuperSOT™-3SuperSOT™-6SuperSOT™-8SupreMOS™SyncFET™

®

The Power Franchise®

TinyBoost™TinyBuck™TinyLogic®

TINYOPTO™TinyPower™TinyPWM™TinyWire™µSerDes™

UHC®

Ultra FRFET™UniFET™VCX™VisualMax™XS™

tm

®

tm

tm

Datasheet Identification Product Status Definition

Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Preliminary First ProductionDatasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.

Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.

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