usb 2.0 compliance testing

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USB 2.0 Compliance Testing

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The USB 2.0 standard is widely deployed in both computer and embedded systems. Compliance testing for this standard includes signal integrity as well as a number of low-level protocol tests. This presentation provides an overview of the test requirements for USB 2.0 compliance and provide background on each test case. Details of fixtures and signal integrity requirements are highlighted in detail. For more information visit http://rohde-schwarz-scopes.com or call (888) 837-8772 to speak to a local Rohde & Schwarz expert.

TRANSCRIPT

Page 1: USB 2.0 Compliance Testing

USB 2.0 Compliance Testing

Page 2: USB 2.0 Compliance Testing

2

Agendal Overview of USB 2.0 physical layer compliance

l Compliance test pointsl Fixtures and probingl Eye pattern measurement

l USB 2.0 electircal compliance testsl Signal qualityl Packet parametersl Chirp timingl J/K SE0 NAKl Receiver sensitivity

l Measurement example

Page 3: USB 2.0 Compliance Testing

3

USB 2.0 Compliance Testing

Purpose

Ensure that USB entities (hub, host and device) reliably communicate

Originally performed during "plugfests"Electrical measurements included in USB 1.0 and expanded in version 2.0 of the specification

Electrical tests measure the signal quality, speed negotiation and timing of the interface signals

Page 4: USB 2.0 Compliance Testing

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Upstream and Downstream Tests

Page 5: USB 2.0 Compliance Testing

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USB 2.0 Electrical Compliance Testsl Signal quality

l Signal amplitude and jitterl Signaling ratel Data packet content (sync field, etc.)

l Packet parametersl Timing between transmit and responsel EOP width

l Chirp timingl Timing and ability to shift from low speed to high speed when HS device

is connectedl J/K SE0 NAK

l Absolute voltage levels for J and K levels as well as single ended zero (SE0) used for EOP

l Receiver sensitivtyl Minimum detectable signal at device receiver

Page 6: USB 2.0 Compliance Testing

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USB 2.0 Electrical Test Tool (USBHSET)

l Controls host computer placing DUT into test model Designed to control Intel EHCI (Enhanced Host Control Interface)

l Available from USB-IF (www.USB.org)

Page 7: USB 2.0 Compliance Testing

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Test Points for Signal Quality Tests

Page 8: USB 2.0 Compliance Testing

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Optional and Mandatory Mask Templates

Page 9: USB 2.0 Compliance Testing

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Mask Template Region Definitions

Page 10: USB 2.0 Compliance Testing

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USB 2.0 Signal Quality Test Fixture

Page 11: USB 2.0 Compliance Testing

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Signal Quality Test Connections

l Test fixture connects DUT to host running USBHSETl Command DUT to transmit test packetl Switch disconnects host and terminates transmit lines of DUT once packet transmission

beginsl DUT stops transmitting only when powered off

l Probe signal at termination using a differential probe ( minimum 2 GHz)l Required for logo compliance: direct connection to 2 oscilloscope channels

(+ and -) using RF cables

Fixture using differential probe

Fixture using direct connecition

Page 12: USB 2.0 Compliance Testing

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Considerations for fixture/probes

l Impedance matching is criticall Must be 90Ω

differential impedance over the operating frequency rangel Probe loading is also an important factor (loading increases with

frequency)l Loading at 240 MHz is important for accurate amplitude measurement

l Frequency response of the measurement systeml Fixture + probe + oscilloscopel High frequency loading and roll-off increases overshootl Low frequency flatness impacts signal amplitude

Page 13: USB 2.0 Compliance Testing

Bandwidth – Requirements of the Test Signal

l Required scope bandwidth depends on test signals frequency componentsl e.g. digital “square” waveform is composed

of odd sine wave harmonics

Frequency

Am

plitu

de

fFundamentalf3rd harm.f5th harm.

Rule of thumb:BWScope = 3 … 5x fmax of Test Signal

Page 14: USB 2.0 Compliance Testing

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Frequency Response and Measurement Accuracy

l Example of a well matched oscilloscope and probel Less than 0.25 dB loss at 240 MHz (11 mV or 3%)l A system with 1 dB dip would result in a 49 mV error (10%)l The compliance mask tolerance is 100 mV

Page 15: USB 2.0 Compliance Testing

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Probe Loading

C R12

fRC

RZ

Impedance becomes small at high frequency due to capacitance

For example, R = 1MΩ

and C = 0.6 pf

Z = 1105Ω

at 240 MHz resulting in an 8% amplitude error

90Ω

Probe loading

Page 16: USB 2.0 Compliance Testing

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Fixture Loading

50504.01

143*)8.15()8.155(45

1

Ro

RRVV 0.509 for R=52Ω

(4% termination error)

45Ω

45Ω

Page 17: USB 2.0 Compliance Testing

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USB 2.0 Test Packet

Page 18: USB 2.0 Compliance Testing

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Eye pattern of a data packet

Page 19: USB 2.0 Compliance Testing

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Eye Opening

Page 20: USB 2.0 Compliance Testing

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Signal Quality Test Results

l Signal waveform from test packet is acquired using a real time oscilloscope

l Waveform processed to generate eye pattern and measure key parameters

l Software supplied by instrument manufacturer or USB-IF (USBETT)l ESBETT required for logo certification

Page 21: USB 2.0 Compliance Testing

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High Speed Packet Parameters

l Downstream (from host) signal is slightly smaller than upstream (from the DUT) signal

l Measure delay from host packet to DUT responsel Ensure that EOP has the proper length and sync field is the

correct number of bits

Page 22: USB 2.0 Compliance Testing

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Chirp Timing

l Device must switch to HS termination when connected to a host

l Speed negotiation takes place using termination

Not allowed in aHS device

Page 23: USB 2.0 Compliance Testing

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Chirp Timing

l Events occurring after HS device is connected to the hostl Switch from low speed to full speed terminationl Begin HS differential signalingl Switch in HS termination

Page 24: USB 2.0 Compliance Testing

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Device J/K SE0 NAK

l J level ( 400 mV on + line 0 mV on – line)l K level (400 mV on – line and 0 mV on + line)l SE0 (single ended zero) both lines at 0 mV

l Used to acknowledge receipt of packet from hostl Measured using DMM or equivalent

l Cannot be accurately measured with a scope due to accuracy requirement

Page 25: USB 2.0 Compliance Testing

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Suspend, Resume, Reset

l Suspend from high speed mode

l Resume high speed mode from full speed

l Reset from HS model Pass/fail rather than

parametric

suspend resume

reset

Page 26: USB 2.0 Compliance Testing

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Receiver Sensitivity

l Place DUT into SE0 NAK (loop back) model Transmit IN packet to DUT from signal source (AWG) and

determine if ACK is sent from DUTl Measure minimum level of IN packet where ACK occursl Measure maximum level of IN packet where ACK does not

occur

To hostcomputer

To DUT

Cables to AWG

host

DUT

fixture AWG

Switch outHost during test

Page 27: USB 2.0 Compliance Testing

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Receiver Sensitivity

IN Packet

NAK

Page 28: USB 2.0 Compliance Testing

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Conclusion

l USB 2.0 requires both electrical and interoperability tests for compliance

l Electrical testing requires signal integrity along with timing measurements and is performed using a digital oscilloscopel Specialized fixtures required to connect to and properly terminate the

signall Active differential probes can be used but direct connection is required

for full compliancel USBHSET software is required to place the DUT into test modes

l Automation software is available to simplify the measurement process, step through the test sequence and report test results

Page 29: USB 2.0 Compliance Testing

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For more information

l Visit http://rohde-schwarz-scopes.coml Call (888) 837-8772 to speak to a local Rohde & Schwarz

expert