N5416A Automated USB 2.0 Pre-Compliance Test ?· N5417A USB 2.0 OTG Automated Test Fixture 82357A/B…

Download N5416A Automated USB 2.0 Pre-Compliance Test ?· N5417A USB 2.0 OTG Automated Test Fixture 82357A/B…

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<ul><li><p>N5416A N5416A Automated USB 2.0Automated USB 2.0PrePre--Compliance Test SolutionsCompliance Test Solutions</p></li><li><p>Todays Schedule</p><p>USB 2.0 Overview</p><p>USB 2.0 Compliance Testing</p><p> Examples of Compliance Tests</p><p> Examples of Compliance Tests</p><p>Demo of the Agilent Solution</p><p>Q&amp;A</p></li><li><p>USB 2.0 Overview</p><p>Created by Compaq, Hewlett-Packard, Intel, Lucent, Microsoft, </p><p> The USB-IF(www.usb.org) governs the specification and use of USB, and resolves </p><p>USB Integrators Forum</p><p>Lucent, Microsoft, NEC and Philips</p><p>use of USB, and resolves any issues that arise</p></li><li><p>USB 2.0 Overview</p><p>USB Peripherals can be Host, Device or Hub The USB-IF combined all USB 1.1 and 2.0 speed </p><p>buses into the USB 2.0 specificationUSB 2.0 consists of 3 modes--</p><p>Data Rates</p><p>Data Rates Rise TimesLow-speed (LS) 1.5 Mb/s 75ns 300nsFull-speed (FS) 12 Mb/s 4ns 20ns</p><p>High-speed (HS) 480 Mb/s 500ps</p><p>USB 2.0 now offer Host/DeviceDual Role PeripheralsThis capability is referred as OTG</p></li><li><p>USB 2.0 Overview</p><p>Cables can be up to 5m long; hubs up to 5</p><p>Physical Characteristics</p><p>levels deep</p><p>Downstream data flows from PC to peripherals</p><p>Upstream data flows from peripherals to PC</p><p>USB Cable+ Shield</p><p>D+VBUS</p><p>D-Ground</p><p>Upstream data flows from peripherals to PC</p></li><li><p>USB 2.0 Overview</p><p>Signal Level TransferFull/Low Speed</p><p>3.3V, 12/1.5Mbps High Speed </p><p>400mV, 480Mbps</p><p>Signal Levels</p><p>400mV, 480Mbps</p><p>Required bandwidthBW = 0.35/Tr= ~1 GHz(Tr = ~400 ps)</p></li><li><p>Path Impedances</p><p>Characteristic measurements during mechanical test (High/Full speed cables</p><p> Characteristic ImpedanceDifferential 90 15%</p><p>USB 2.0 Overview</p><p>Differential 90 15%Common Mode 30 30%</p><p> Cable Attenuation 5.8dB @ 400MHz</p><p> Propagation Delay 26ns</p><p> D+/D- Propagation Skew 100ps</p></li><li><p>Full Speed and Low Speed modes are determined by the location of the Rpuresistor (on D+ or D-). </p><p>USB 2.0 OverviewTransmission Modes</p><p>The bus starts in full speed mode using the Rpu resistor</p><p>After Chirp Handshake, if high speed mode is available, the Rpuresistor is disconnected and bus changes to high speed mode.</p></li><li><p>Packet 1 Packet 2 Packet 3</p><p>USB 2.0 OverviewFull Speed Packet Makeup</p><p>frameSYNC SYNC SYNCPID(SOF) Frame No. CRC PID(IN) ENDP CRCADDR PID(NAK)EOP EOPEOP</p></li><li><p>Signal Amplitude400mV</p><p>SYNC:32(Minimum 12) bit </p><p>USB 2.0 OverviewHigh Speed Packet Makeup</p><p>SYNC PID(IN) ENDP CRCADDR EOP</p><p>32(Minimum 12) bit </p><p>Idle : SE0</p><p>EOP re-definition:NRZ 01111111 w/o bit stuffing(SOF EOP is 40 bit)</p></li><li><p>USB 2.0 Overview</p><p>USB 2.0 Compliance Testing</p><p> Examples of Compliance Tests</p><p>Todays Schedule</p><p> Examples of Compliance Tests</p><p>Demo of the Agilent Solution</p><p>Conclusion</p><p>Q&amp;A</p></li><li><p> Involves a set of test procedures (available from www.usb.org) performed in a specific order </p><p> The USB 2.0 HS test procedure </p><p>USB 2.0 Compliance Testing</p><p> The USB 2.0 HS test procedure (v1.0) has been available since December 2001 </p><p> The USB-IF performs the official compliance testing</p></li><li><p>Interoperability TestUSB 2.0 Compliance Testing</p></li><li><p>Electrical Tests</p><p>Full/Low speed signal quality</p><p>In-rush current</p><p>Droop/Drop</p><p>FS/LSHS </p><p>USB 2.0 Compliance Testing</p><p>Droop/Drop</p><p>Backdrive voltage</p><p>High speed test</p><p>HS </p><p>OTG Specific Tests</p></li><li><p>Required Test Software</p><p>INTELHS Electrical Test Tool</p><p>USB 2.0 Compliance Testing</p><p>In order to place your USB 2.0 Device in Test Modes you will need Intel HS Electrical Test Tool installed on a Windows based PC.Full Speed Tests requires Loop Descriptor ModeHigh Speed Test requires HS Test Packets Mode</p></li><li><p>Full/Low Speed Tests</p><p>Signal qualityIn-rush currentDroop/Drop </p><p>Backdrive voltage</p><p>USB 2.0 Compliance Testing</p><p>Droop/Drop Backdrive voltage</p></li><li><p>Full/Low Speed Signal QualityUSB 2.0 Compliance Testing</p><p>USB Test Process1. Connect Probe to Test Fixture2. Connect device to Test Fixture3. Place Device in Loop Descriptor test Mode 3. Select Proper Test in N5416A Script4. Run Test</p></li><li><p>DEVICE Upstream</p><p>Host / System</p><p>Hub</p><p>Upstream</p><p>USBSystem</p><p>(PC)Oscilloscope</p><p>HUBHUB</p><p>USB 2.0 Compliance Testing</p><p>AdjacentDevice</p><p> In FS tests, connect D+ of theadjacent device to scope ch 3</p><p>Devices</p><p>HUBHUB</p><p>HUB</p><p>HUB DUT</p><p>SQiDD5m cable</p><p> Connect D- to ch 1 Connect D+ to ch 2</p></li><li><p>Full/Low Downstream SetupUSB 2.0 Compliance Testing</p></li><li><p>Upstream Trigger Setup</p><p>The logic trigger occurs when the EOP is reached </p><p>USB 2.0 Compliance Testing</p><p>EOP is reached and the Adjacent device is idle (Trigger Setup is done automatically)</p></li><li><p>Measurement Data</p><p>AutomatedMeasurement Setup &amp; Result</p><p>USB 2.0 Compliance Testing</p></li><li><p>Signal eye:*** eye failure! (14 data points violate eye) ****** waiver granted. ***</p><p>EOP width: 170.2029ns EOP width passes</p><p>Full Speed Test Results ExampleUSB 2.0 Compliance Testing</p><p>EOP width: 170.2029ns EOP width passes</p><p>Consecutive jitter range: -1703.52ps to 2268.87ps </p><p>RMS jitter 576.53ps</p><p>Paired KJ jitter range: -584.58ps to 0.00ps, </p><p>*** jitter failure ****** waiver granted ***</p></li><li><p>Understanding Full Speed Test ResultsMeasurement Items:</p><p>D+ greenD- bluecommon mode voltage purple</p><p>USB 2.0 Compliance Testing</p><p>mode voltage purplecrossover location crossover location yellowyellow</p><p>diamonddiamondeye diagram ref.eye diagram ref. yellowyellow</p><p>circlecircleeye violation red dots</p></li><li><p>Types of Devices Tested</p><p>Bus powered devicesSelf-powered devices</p><p>Device Inrush Current TestUSB 2.0 Compliance Testing</p><p>GND</p><p>Vbus attach</p><p>&gt;120f </p></li><li><p> Bus or self-powered USB devices Protects upstream devices from damage</p><p>Device Inrush Current TestUSB 2.0 Compliance Testing</p><p>devices from damage 50.0 C limit</p><p>Required TestsOverall result: fail!Inrush at 5.000V: 503C*** inrush failure! *** (at 5.000V, maximum compliant </p><p>inrush is 50C)</p></li><li><p>The HUB/Host Test: When a adjacent device is connected, the VBUS droop voltage must be within 330mV </p><p>HOST/HUB Droop/DropUSB 2.0 Compliance Testing</p></li><li><p>DEVICE Backdrive Voltage</p><p>Voltage measured on D+, D-, and VBUS upon power-up</p><p>After enumeration, USB plug is disconnected and voltage </p><p>USB 2.0 Compliance Testing</p><p>Voltages must not exceed 0.4 V under any of these conditions</p><p>Both measured with 15 kresistor to ground</p><p>is disconnected and voltage is measured on D+, D-, and VBUS </p></li><li><p>Required Test EquipmentUSB 2.0 Compliance High Speed Testing</p><p>Scope BW &gt;=2GHz</p></li><li><p>High Speed Signal QualityTime Domain Reflectometry( TDR )Reciever Sensitivity and SquelchJ and K Voltage</p><p>High Speed TestUSB 2.0 Compliance Testing</p><p>CHIRPPacket ParametersSuspend/Resume</p></li><li><p>HS Electrical Test Tools</p><p>The test mode can be any of the following:</p><p>Test JTest K</p><p>USB 2.0 Compliance Testing</p><p>Test KTest _SE0_NAKTest PacketTest Force Enable</p></li><li><p>HS Signal Integrity</p><p>Test packet output by HS Electrical Test Tool </p><p>The signal is isolated </p><p>USB 2.0 Compliance Testing</p><p>The signal is isolated from the host by the HS Test Fixture </p><p>Waveform is measured through a 90 ohm differential termination </p><p>9090HS HS </p><p>RelayRelayHS HS </p><p>RelayRelayDeviceDevice</p><p>Differential ProbeDifferential Probe</p></li><li><p>Measuring High Speed Signal Quality</p><p>Test packet output</p><p>USB 2.0 Compliance Testing</p></li><li><p>HS Signal Quality Test Results</p><p>Required TestsOverall result: pass! Signal eye:eye passesEOP width: 7.98 bits</p><p>USB 2.0 Compliance Testing</p><p>EOP width: 7.98 bitsEOP width passesReceivers: reliable operation on tier 6receivers passMeasured signaling rate: 480.0641MHzsignal rate passes</p></li><li><p>Device HS Signal Quality USB 2.0 Compliance Testing</p><p>EL_2 Data rate specification (480 Mb/s0.05%)</p><p>EL_4 TP3 eye pattern requirement</p><p>EL_5 TP2 eye pattern requirement(device with captive cable)</p><p>(device with captive cable)</p><p>EL_6 10-90% differential rise/fall times(longer than 500ps)</p><p>EL_7 Monotonic data transitions for high speed drivers in the eye pattern template</p></li><li><p>HS Packet Parameters</p><p>The device is controlled by the Electrical Test Tool on the PC</p><p>The reply packet from the device</p><p>USB 2.0 Compliance Testing</p><p>The reply packet from the deviceis received and evaluated for: </p><p> Sync EOP Spacing between packets</p></li><li><p>Sync Field : 32 bit EOP : 8 bit</p><p>HS Packet ParametersUSB 2.0 DEVICE Compliance Testing</p></li><li><p>CHIRP, SUSPEND/RESUME/RESET TimingUSB 2.0 DEVICE Compliance Testing</p><p>DeviceDevice</p><p>9090</p><p>USB Test FixtureUSB Test FixtureProbeProbe</p><p>ProbeProbe</p></li><li><p>CHIRP Test</p><p>Reset durationCHIRP K DurationHS termination </p><p>assertion Devices Chip</p><p>USB 2.0 DEVICE Compliance Testing</p><p>assertion</p><p>CHIRP K(1ms 7ms)</p><p>Device turns onHS termination</p><p>Devices ChipLatency(2.5us 3ms)</p><p>Chirp KJKJKJ(500us)</p></li><li><p>CHIRP TestUSB 2.0 DEVICE Compliance Testing</p><p>Devices Chip Latency(2.5us 3ms)</p><p>Enable High Speed Termination After Chirp KJKJKJ (within 500us)</p></li><li><p>Suspend TimingUSB 2.0 DEVICE Compliance Testing</p><p>Suspend : 3.000ms 3.125msD+ Voltage &gt; 2.7V</p></li><li><p>Resume TimingUSB 2.0 DEVICE Compliance Testing</p><p>Resume : &lt; 2 bit time </p></li><li><p>Reset Timing</p><p>DeviceCHIRP K</p><p>USB 2.0 DEVICE Compliance Testing</p><p>Reset : 3.1ms 6ms</p></li><li><p>Reset TimingUSB 2.0 DEVICE Compliance Testing</p><p>Reset from Suspend : 2.5us 3.000ms</p></li><li><p>High Speed Receiver Sensitivity</p><p>Pulse GeneratorPulse Generator</p><p>Automated control</p><p>USB 2.0 DEVICE Compliance Testing</p><p>HS RelayHS RelayHS RelayHS Relay</p><p>DeviceDeviceDeviceDeviceSMASMA</p><p>In SE0_NAK test mode, pulse generator outputs IN token; device must not respond to tokens 150mV </p></li><li><p>High Speed Receiver Sensitivity</p><p>Data generatorPacket</p><p>Device responsePacket</p><p>USB 2.0 DEVICE Compliance Testing</p></li><li><p>High Speed Receiver Sensitivity</p><p>Note: A waiver may be granted if the receiver does not indicate squelch at </p><p>USB 2.0 DEVICE Compliance Testing</p><p>indicate squelch at +/-50mV of 150mV differential amplitude</p></li><li><p>Time Domain Reflectometry</p><p>TDRConfirm the signal is less than 10mV</p><p> Use TDR to measure impedance </p><p>USB 2.0 DEVICE Compliance Testing</p><p>HS RelayHS Relay</p><p>DEVICEDEVICESMA</p><p>measure impedance of connector, circuit board, and active termination</p></li><li><p>TDR Test Results</p><p>Differential impedance</p><p>Termination impedanceUSB Connector</p><p>80 ZHSTERM 100</p><p>70 ZHSTHRU 110</p><p>USB 2.0 DEVICE Compliance Testing</p><p>D+ odd impedanceD- odd impedance</p><p>Thruimpedance</p></li><li><p>USB 2.0 Overview</p><p>USB 2.0 Compliance Testing</p><p> Examples of Compliance Tests</p><p>Todays Schedule</p><p> Examples of Compliance Tests</p><p>Demo of the Agilent Solution</p><p>Conclusion</p><p>Q&amp;A</p></li><li><p>The effects of source and termination impedances</p><p>ZS Z0</p><p>A(w H(w) T(w)</p><p>Test Example 1: ImpedancesExamples of Compliance Tests</p><p>ZS Z0ZLR2(w)H(w)R1(w)</p><p>Unregulated output impedance of a driver could cause significant overshoot or undershoot</p></li><li><p>Test Example 2: Full Speed</p><p>*** Overall result: fail! ***Signal eye:</p><p>*** eye failure! *** (33 data points violate eye)</p><p>Examples of Compliance Tests</p></li><li><p>USB OTG Compliance TestingGet Completely Automated Certification</p><p>of USB OTG PeripheralsN5416A Software provides Automated control of:N5417A USB OTG Test Fixture to sequence testsE3631A Power Supply34401A Voltmeter.</p><p>Equipment list for complete Automation:Agilent Oscilloscope with &gt;=2GHz BWN5416A USB Compliance software2 High Impedance Passive Probes82357B USB-&gt;GPIB Adapter or equiv.Agilent E3631A Powersupply or equiv.Agilent 34401A Multimeter or equiv.GPIB Cable 10833B or equiv.</p></li><li><p>Test Example 2: A Detailed Look</p><p>Coupling between D+ and D-</p><p>Examples of Compliance Tests</p></li><li><p>Cautions with USB 2.0 Measurements</p><p>Hub quality can affect full/low speed upstreammeasurements For identical measurements to those in compliance tests, use Intels CHUB</p><p>Examples of Compliance Tests</p><p>For high speed signal quality measurements, take care in handling low level signals. Be careful of: </p><p>Adjusting the offset and performing calibrationEffects of fixturing impedance on signal qualityThe bandwidth of the probe</p></li><li><p>USB 2.0 Overview</p><p>USB 2.0 Compliance Testing</p><p> Examples of Compliance Tests</p><p>Todays Schedule</p><p> Examples of Compliance Tests</p><p>Demo of the Agilent Solution</p><p>Conclusion</p><p>Q&amp;A</p></li><li><p>Todays Schedule</p><p>USB 2.0 Overview</p><p>USB 2.0 Compliance Testing</p><p> Examples of Compliance Tests</p><p> Examples of Compliance Tests</p><p>Demo of the Agilent Solution</p><p>Conclusion</p><p>Q&amp;A</p></li><li><p>Summary</p><p>Compliance testing is a requirement </p><p>Compliance testing involves framework layer evaluation and physical layer evaluation </p><p>Conclusion</p><p>In physical layer evaluation, signal quality is influenced by components, circuit layout, and driver circuitry </p><p>An easy-to-use oscilloscope is an important factor in efficiently performing compliance testing </p></li><li><p>Reference Material</p><p>Universal Serial Bus Specification Rev 2.0 (USB-IF)</p><p>USB-IF Signal Integrity Test Description (USB-IF)</p><p>USB Design by Example </p><p>Conclusion</p><p>USB Design by Example (John Hyde, John Wiley &amp; Sons INC)</p><p>Universal Serial Bus System Architecture(Don Anderson, MINDSHARE INC)</p><p>USB 2.0 High Speed Electrical Test Procedure v1.0</p></li><li><p>Recommanded USB 2.0 Test ConfigurationsDSO90254A Agilent 2.5GHz Oscilloscope (or DSO80204A/B or 54852A)N5416A USB 2.0 Compliance test Application</p><p>High Speed Tests:5 Self Powered High Speed USB Hubs + 5m USB CablesE2649B USB 2.0 HS Test Fixtures1130A 1.5GHz Differential Probe +E2678A Socket-in Probe Head81134A Pulse Pattern Generator (optional for Squelch Test)</p><p>OTG Tests:N5417A USB 2.0 OTG Automated Test Fixture82357A/B USB to GPIB Interface (Optional)34401A Voltmeter (Optional)</p><p>34401A Voltmeter (Optional)E3631A Power Supply (Optional)10833B GPIB Cable (Optional)</p><p>Low/Full Speed Tests:1 Self Powered FULL Speed USB Hub4 Self Powered High Speed USB Hubs + 5m USB CablesE2646A LS/FS USB Test Fixture3 High Impedance Passive Probes or 3 Single Ended Active Probes</p><p>USB Powered Devices/HUBInrush Current -&gt; N2774A Current Probe +N2775A Probe PSU</p></li><li><p>Todays Schedule</p><p>USB 2.0 Overview</p><p>USB 2.0 Compliance Testing</p><p> Examples of Compliance Tests</p><p> Examples of Compliance Tests</p><p>Demo of the Agilent Solution</p><p>Conclusion</p><p>Q&amp;A</p></li></ul>


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