upfc

DESIGN, SIMULATION AND HARDWARE IMPLEMENTATION OF UPFC

1J.Veeramani, Student Member, IEEE, 1B.Vijay Anand, 2Mrs. G. Janaki, M.E.

Abstract: The real & reactive power flow in AC transmission system can be controlled by a solid state controller named as “Unified Power Flow Controller (UPFC)” which is a more versatile controller among the available FACTS controllers. This paper deals with the Design procedure and the Simulation results of UPFC using ORCAD 9.2. Also the verification between the simulation results and the Hardware Laboratory model are also presented in this paper.Keywords: UPFC, FACTS, ORCAD

1. Introduction

The continuing rapid development of high-power semi- conductor technology now makes it possible to control electrical power systems by means of power electronic devices. These devices constitute an emerging technology called FACTS (Flexible Alternating Current Transmission Systems). FACTS technology has a number of benefits, such as greater power flow control, increased secure loading of existing transmission circuits, damping of power system oscillations, less environmental impact and, potentially, less cost than most alternative techniques of transmission system reinforcement.

The UPFC is the most versatile of the FACTS devices. The usual form of this device consists of two voltage source

inverters with a common DC link, as shown in Fig. 1.

The inverter at the input end of the UPFC is connected in shunt to the AC power system, and the inverter at the output end of the UPFC is connected in series with the AC transmission circuit. The UPFC can control the transmission circuit parameters singly or simultaneously in appropriate combinations, at its series-connected output end, while independently providing reactive power support to the transmission line at its shunt-connected input end.

In this paper computer simulation using ORCAD 9.2 and experimental implementation of UPFC at laboratory level was presented. MOSFET’s were used as the switching elements in the inverters. PIC Microcontroller is used to generate the switching pulses to the inverter based on pulse width modulation (PWM) technique. Here, the

1 Final year, EEE,Sri Muthukumaran Institute of

Technology, Chikkarayapuram, Ch–[email protected]

[email protected]

2 Sr.Lecturer/EEE,Sri Muthukumaran Institute ofTechnology, Chikkarayapuram

Chennai – [email protected]

Fig. 1

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performance of UPFC was controlled by using PIC microcontroller.

2. An Overview of UPFC

The Unified Power Flow Controller (UPFC) is the most versatile of the FACTS controllers envisaged so far. It can not only perform the functions of the STATCON, TCSC, and the phase angle regulator but also provides additional flexibility by combining some of the functions of the above controllers. The main function of the UPFC is to control the flow of real and reactive power by injection of a voltage in series with the transmission line. Both the magnitude and the phase angle of the voltage can be varied independently. Real and reactive power flow control can allow for power flow in prescribed routes, loading of transmission lines closer to their thermal limits and can be utilized for improving transient and small signal stability of the power system. The schematic of the UPFC is shown in Fig.1.

The UPFC consists of 2 branches. The series branch consists of a voltage source converter which injects a voltage in series through a transformer. Since the series branch of the UPFC can inject a voltage with variable magnitude and phase angle it can exchange real power with the transmission line. However the UPFC as a whole cannot supply or absorb real power in steady state (except for the power drawn to compensate for the losses) unless it has a power source at its DC terminals. Thus the shunt branch is required to compensate (from the system) for any real power drawn/ supplied by the series branch and the losses. If the power balance is not maintained, the capacitor cannot remain at a constant voltage.

In addition to maintaining the real power balance, the shunt branch can

independently exchange reactive power with the system. The main advantage of the power electronics based FACTS controllers over mechanical controllers is their speed. Therefore the capabilities of the UPFC need to be exploited not only for steady state load flow control but also to improve stability. However it is not obvious as to how to use the series voltage and shunt current (subject to the power balance constraint) for UPFC control. It is in this context that suitable control strategies and controller design to achieve the same is of importance.

3. UPFC - Control Stratergy

Role of Reactive Power on voltage and its regulation is,

E2 = (V+ΔV)2 + δv2

= (V+RICOSφ+XISINφ)2+ (XICOSφ - RISINφ)2 --- (1)

Hence,

E2= [V + (RP/V) + (XQ/V)]2 + [(XP/V) - (RQ/V)]2 --- (2)

ΔV= (RP+QX)/VδV= (XP-RQ)/VδV<< (V+ΔV)

E2= [V+ (RP+QX)/V] 2

E-V= (RP+QX)/V=ΔVE-V= [XQ]/VΔV = [XQ]/V

Q ∞ ΔV

If , X >> RδV = XP/V

P ∞ δV

So the reactive power can be compensated either by improving the receiving voltage or by reducing the line reactance. Since the line reactance is fixed, it can be done only by increasing the voltage. Hence on injecting the




current into the distribution we can improve the voltage and compensate the reactive power.

4. Block Diagram

SOURCE LOAD

CONVERTER MODULE

SENSINGMODULE

GATINGCIRCUIT MODULE

MICROCONTROLLER

SIGNALCONDITIONER

MODULE

POWERSUPPLY

MODULE

SHUNTT/F

SERIES T/F

UPFC

Figure 3 shows the simplified and complete block diagram of an UPFC. The voltage and current is sensed and it is sent to the signal conditioner circuit which gives the sensed values to the PIC microcontroller. The microcontroller compares the sensed values with a reference value and generates pulses to drive the gates of the MOSFET.

5. Simulation Results

The converter module is nothing but a back to back converter. The inverter and rectifier have been simulated separately and then connected back to back for simulation.

5.1. Simulation of Inverter

Figure 4 shows the output of an Inverter simulated using Orcad 9.2.

V +

0

I R F 5 4 0

R 11 k

0

I R F 5 4 0

0

I R F 5 4 0

L 1

1 m H

1 2V 1

2 4 v

V -

I R F 5 4 0

0

0

5.2. Simulation of Rectifier

Figure 5 shows the output of a rectifier. The two different waveforms shows the output with and without filter.

R 1

1 k

V +

0

L 1

1 0 H

1

2

V -

C 1

. 0 1 p1

2

V +V 2

L 1

1 0 H

1 2

00

I R F 8 4 0

V -

ø

∆V

δV

V

E

I IR

IX

Fig. 2

Fig. 3

Fig. 4

Fig. 5




5. 3. Simulation of Back to Back Converter

Figure 6 is the output waveform when the above simulated rectifier and inverter are connected back to back.

0

0

1

2

1 2

0

V 2

0

0

I R F 5 4 0

R 11 k

C 1

1

2

0

0

I R F 5 4 0

6. Hardware Description

This session discusses the various hardware modules used in UPFC.

6.1. Converter Circuit

1

2

The converter circuit is shown in figure 7. The rectifier and inverter are connected by a common dc link capacitor.

The MOSFET used in the converter is IRF540N. MOSFET has been chosen because of its highest switching speed. The transformer used is 230/24V.

6.2.Sensing Circuit

The voltage is sensed through a potential transformer and current is sensed through a current transformer. The output voltages of the transformers are rectified through a diode bridge rectifier. The rippled dc is passed to the Zero Crossing Detector (ZCD) for obtaining the current and voltage pulses. The rippled dc is also filtered by a capacitor filter and this circuit is terminated with a zener diode (4.7V). The calibration procedure is as follows. First maximum load is applied and the 100K potentiometer is tuned so as to obtain 4.5 volts across the zener diode. Then the load is decreased in steps and the corresponding voltage across the zener diode is noted for writing the

Fig. 6I(V)

IpulseV

Vpulse

Fig. 7

zcd zcd

Fig. 8

LOAD

CT

10k

21

1 2 1 2

10k

21

100

21

100

21

PT




lookup table in the microcontroller. The output is limited not to exceed the voltage level of microcontroller.

6.3. Zero Crossing Detector (ZCD)

4 . 7 k21

+ 5 V

S L 1 0 0

0

1 0 k21

f r o m s e n s i n g c i r c u i t

p u l s e o / p

1 k

2

1

To calculate the real and reactive power, phase angle (i.e.) the angle between voltage and current is necessary, which cannot be directly done. So, we use Zero Crossing Detector. In the circuit shown in figure 9, when the transistor is on, the output is grounded and there will be no output. For very low values of input (i.e.) near the zero crossing points, the transistor will be off and the output is connected to +5V. Thus we get a pulse at zero crossing. The pulse width can be varied using the potentiometer. The same is done for current also. These two pulses are given to the phase angle sensor to determine the phase angle between the current and voltage.

6.4. Gating Circuit

The pulse from the microcontroller cannot be used to drive the MOSFET effectively. So, there is a need for electrical isolation between the microcontroller output and the MOSFET, for which we go for optocoupler, which gives a perfect and complete isolation. The output of the optocoupler is fed to the transistor circuit, which provides effective gating and commutation to the MOSFET.

12V

100

211000u

1

2

100

21

10k

21

1k

2

1

2.2k

2

1MCT2E

100

21

10k

2

1

6.5. PIC Microcontroller

The PIC Microcontrollers are supported with a full range of hardware and software development tools. The used PIC16F870 device comes in 28 pin package. Figure 12 shows the mother board circuit of PIC microcontroller 16F870.

7. Implemented Hardware & its Outputs

The implementation of a prototype model in the laboratory is in progress. The following snaps show the hardware of various modules involved in the unit.

Fig. 9

Fig. 10

S

From micro

controller

Figure 10

Fig. 11

G




(a)

(b)

Fig.12. Gating Circuit & its Output

(a)

(b) Fig.13. Inverter Module & its Output

(a)

(b)

Fig.14. Rectifier Module & its Output

(a)

(b)Fig.15. Sensing Circuit & its Output




Fig.16. Control Circuit Using PIC Microcontroller

Fig.17. Complete Hardware Setup of UPFC.

Fig.18. Actual Voltage to be injected through series transformer.

8. ConclusionIt is concluded that the UPFC is

advantageous over all other facts devices. The various circuits were designed in this paper, and they simulated using orcad 9.2 and the hardware implementation of a

prototype model in the laboratory was designed.

9. Reference

1. A Nabavi-Niaki and M.R. Iravani, “Steady-state and dynamic models of Unified power flow controller (UPFC) for power system studies.”, IEEE trans. on Power Systems, Vol. 11, No. 4, pp. 1937-1943, November 1996.

2. T. Makombe and N. Jenkins, “Investigation of a Unified power flow controller.”, IEE Proc. – C, vol. 146, No. 4, pp. 400-408, July 1999.

3. Yasuo Morioka, Yoshiki Nakach et al., “Implementation of unified power flow controller and verification for transmission capability improvement”, IEEE trans. on Power Systems, Vol.14, No. 2, pp. 575- 581, May 1999.

4. K.S. Smith, L.Ran, J. Penman,“Dynamic modeling of a Unified power flow controller”, IEE Proc. – C, Vol. 144, No. 1, pp. 7-12, January 1997.5. I. Papic, P. Zunko et al., “Basic control of Unified Power Flow controller.”, IEEE Trans. on Power Systems, Vol. 12, N0. 4, pp. 1734-1739, November 1997.

6. H.F. Wang, “A unified model for the analysis of FACTS devices in damping power system oscillations – Part III : Unified power flow controller.”, IEEE trans. on Power delivery, Vol. 15, No. 3, pp. 978-983, July 2000.

7. N.G. Hingorani and L. Gyugyi, "Understanding FACTS", IEEE Press, New York, 2000.




8. E.V. Larsen, Juan J, Sanchez-Gasca, J.H. Chow, "Concepts for Design of FACTS Controllers to Damp Power Swings", IEEE Transactions on Power Systems, Vol. 10, No. 2, May 1995, pp. 948-955.

9. H.F. Wang, F.J. Swift and M. Li, "Selection of installing locations and feedback signals of FACTS-based stabilizers in multi machine power systems by reduced-order modal analysis ", IEE proc.-Gener. Transn. Distrib., Vol. 144, No.3, May 1997, pp. 263-269.

10.Chen Yan, Research and Design of UPFC Controller, Dissertation for master degree, 2003

11.Yan Wei, UPFC Controller Modeling and its application in power system, Dissertation for Ph.D, 1999

12. C.D.Schauder, D.M.Hamai, A.Edris, etal. Operation of the Unified power flow controller (UPFC) under practical constraints, IEEE Trans on power delivery, 1998, Vol. 13, No. 2:630-639

13. PAPIC. I., ZUNKO, P.. POVH, D., and,WElNHOLD. M.: 'Basic control of the unified power flow controller. IEEE Tram recommended practice for ercilation system models for power

14. Horst E. Grüning, Jürgen K. Steinke, 'Design and Manufacturing of Application Specific High Power Converters', EPE 99, Lausanne, Switzerland.

15. K.Clark, B.Fardanesh, R.Adapa, "Thyristor Controlled Series Compensation Application Study - Control Interaction Consideration", Paper # 94 SM 478-8 PWRD, Presented at the IEEE/PES 1994

Summer Meeting, San Francisco, California, July 1994.

16. A. J. F. Keri, X. Lombard, A. A. Edris, “Unified Power Flow Controller (UPFC): Modelling and Analysis”, IEEE Trans. on Power Delivery, Vol. 14, No. 2, April 1999, pp. 648-654.

17. Yoke Lin Tan, Youyi Wang, “Design of series and shunt FACTS controller using adaptive non-linear co-ordinated design techniques”, IEEE Trans. On Power Systems, vol. 12, No.3, August 1997, pp. 1374-1379.

18. R. Mohan Mathur and Rajiv K. Varma, 2002, “Thyristor-Based FACTS Controllers for Electrical Transmission Systems”, IEEE Press.

19. E. Acha, V G Agelidis, O Anaya-Lara, and T J E Miller “ Power Electronic Control in Electrical Systems” ELSEVIER, 2002

20. PADIYAR.K.R., and KULKARNI.A.M., 'Control design and simulation of unified power flow controller'. IEEE Trans. Power Delivery. 1998, 13, (4), pp. 1348-1354.

21. I. Papic, P. Zunko, D. Povh and M. Weinhold, "Basic control of Unified Power Flow controller," IEEE Trans. on Power Systems, Vol. 12, N0. 4, November 1997, pp. 1734-1739.




upfc

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