unitedstatespatentandtrademarkoffice · election/restriction this office action is responsive to...

UNITED STATES PATENT AND TRADEMARK OFFICE

UNITED STATES DEPARTIVIENT OF COMlVIERCE

United States Patent and Trademark Office

Address: COMMISSIONER FOR PATENTS

PO. Box 1450

Alexandria1 Virginia 22313- 1450

wwwusptogov

APPLICATION NO. FILINGDATE FIRST NAMED INVENTOR I ATTORNEY DOCKET NO. CONFIRMATION NO. I

12/839,104 07/19/2010 Yongman Lee P9001US1 /APPL:0198 7561

73576 7590 09/30/2013 I IEXAMINER

APPLE INC.

c/o Fletcher Yoder, PC NGO, TONYN

130' BOX 692289 ARTUNIT PAPER NUMBER

Houston, TX 77269-2289 I I I

2694

I NOTIFICATION DATE I DELIVERY MODE I

09/30/2013 ELECTRONIC

Please find below and/0r attached an Office communication concerning this application or proceeding.

The time period for reply, if any, is set in the attached communication.

Notice of the Office communication was sent electronically on above—indicated "Notification Date" to the

following e—mail address(es):

[email protected]

PTOL—90A (Rev. 04/07)

Application No. Applicant(s)

12/839,104 LEE, YONGMAN

Office Action Summary Examiner Art Unit AIA (First Inventor to File)

TONY N. NGO 2694 fig“

-- The MAILING DATE of this communication appears on the cover sheet with the correspondence address --

Period for Reply

A SHORTENED STATUTORY PERIOD FOR REPLY IS SET TO EXPIRE g MONTH(S) OR THIRTY (30) DAYS,

WHICHEVER IS LONGER, FROM THE MAILING DATE OF THIS COMMUNICATION.

Extensions of time may be available under the provisions of 37 CFR 1.136(a). In no event, however, may a reply be timely filed

after SIX (6) MONTHS from the mailing date of this communication.

- If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHS from the mailing date of this communication.

- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).

Any reply received by the Office later than three months after the mailing date of this communication, even if timely filed, may reduce any

earned patent term adjustment. See 37 CFR 1 .704(b).

Status

1)IZI Responsive to communication(s) filed onm.

El A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on_.

2a)|:l This action is FINAL. 2b)|ZI This action is non-final.

3)I:I An election was made by the applicant in response to a restriction requirement set forth during the interview on

_; the restriction requirement and election have been incorporated into this action.

4)|:| Since this application is in condition for allowance except for formal matters, prosecution as to the merits is

closed in accordance with the practice under Exparte Quay/e, 1935 CD. 11, 453 O.G. 213.

Disposition of Claims

5)IZI Claim(s) 5-13 and 26-33 is/are pending in the application.

5a) Of the above claim(s) is/are withdrawn from consideration.

6)I:I Claim(s) is/are allowed.

7)|Z| Claim(s) 5-13 and 26-33 is/are rejected.

8)|:I Claim(s) is/are objected to.

9)I:I Claim(s) are subject to restriction and/or election requirement.

* If any claims have been determined allowable, you may be eligible to benefit from the Patent Prosecution Highway program at a

participating intellectual property office for the corresponding application. For more information, please see

hitsZ/I’www.usctoxtov/natents/init events/nnh/indexjsr) or send an inquiry to PPI-ifeedback{®usgtc.00v.

Application Papers

10)I:l The specification is objected to by the Examiner.

11)I:l The drawing(s) filed on is/are: a)I:I accepted or b)I:I objected to by the Examiner.

Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).

Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121 (d).

Priority under 35 U.S.C. § 119

12)I:| Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d) or (f).

Certified copies:

a)I:l All b)|:l Some * c)I:l None of the:

1.I:I Certified copies of the priority documents have been received.

all Certified copies of the priority documents have been received in Application No.

3.|:| Copies of the certified copies of the priority documents have been received in this National Stage

application from the International Bureau (PCT Rule 17.2(a)).

* See the attached detailed Office action for a list of the certified copies not received.

Attachment(s)

1) E Notice of References Cited (PTO-892) 3) D Interview Summary (PTO-413)

. . Paper No(s)/Mai| Date. .

2) E Information Disclosure Statement(s) (PTO/SB/OS) 4 D O h _

Paper No(s)/Mai| Date 07/19/2010. I 1 er- —- U.S. Patent and Trademark Office

PTOL—326 (Rev. 08-13) Office Action Summary Part of Paper No./Mai| Date 20130912

Application/Control Number: 12/839,104 Page 2

Art Unit: 2694

The present application is being examined under the pre-AlA first to invent provisions.

DETAILED ACTION

Priorities

This application, Application No. 12/839,104 filed on 07/19/2010, entitled

"Variable Bias Power Supply " by Lee et al., claims priority under §1.53(e) of a

provisional application No. 61/316,195 filed on 03/22/2010.

Election/Restriction

This office action is responsive to restriction requirement for patent

application 12/839104 filed on 07/19/2010. Applicants elect claims 6-13 with traverse.

Claims 1-5 and 14-25 are withdrawn from consideration. New Claims 26-33 have been

added as linking claims related to claims 6-13. Claims 6-13 and 26-33 are pending for

consideration.

INFORMATION DISCLOSURE STATEMENT

The information disclosure statements filed 07/19/2010, have been

acknowledged and considered by the examiner. An initialed copy of the PTO-1449 is

included in this correspondence.


Art Unit: 2694

Response to Arguments

Applicant's arguments filed 07/02/2013 have been fully considered but they are

unpersuasive.

In the Remarks, Applicant asserts that the restriction requirement is not properly

supported, citing MPEP §806.05(c), (j), and §806.02. Remarks, page 6, 112.

Examiner respectfully disagrees. According to the restriction requirement,

Applicant is required to elect between the following groups:

1-5 425/211*

*Power supply used in a display

11 6-13 425/214*

*controlling the condition of

display element

“I 14-17 425/52*

*Power supply generating

circuitry

IV 18-20 377/64-81*

*Programmable register

V 21 -25 323/277, 281*

*Power supply with current

sensor and controlled circuitry

In addition, Examiner submits that Claim 1 and Claim 6 are patentably distinct

because they claim to different species. Specifically, Claim 1 recites a power which

does not recite a method of making in Claim 6. Likewise, Claim 6 recites a method of

making a device which can be a materially different from the power supply recited in

Claim 1. Accordingly, the method of making of claim 6 can produce a power supply that


Art Unit: 2694

is materially different from that recited in claim 1. Likewise, the power supply as

claimed in claim 1 is materially different from the one produced by the method of claim

6.

Similarly, Examiner submits that Claim 1 and Claim 14 are patentably distinct

because they claim to different species which have mutually exclusive characteristics.

Specifically, Claim 14 recites an electronic device which does not recite the power

supply in Claim 1. Likewise, Claim 1 recites a power supply comprising a regulator and

a current source which are not recited in Claim 14. Accordingly, the electronic device of

claim 14 can use a power supply that is materially different from that recited in claim 1.

Likewise, the power supply as claimed in claim 1 can be used in an electronic device

that is materially different from the claimed electronic device of claim 14.

Furthermore, Examiner submits that Claim 18 and Claim 21 are patentably

distinct because they recite different species that have mutually exclusive

characteristics. Specifically, Claim 21 recites an electronic device “wherein the bias

current is configured to be a first bias current upon a rising edge of the clock signal or a

falling edge of the clock signal, or a combination thereof, and a second bias current at

another time" as recited in Claim 18. Likewise, Claim 18 recites an electronic device

which has a materially different component not recited in Claim 21, e.g., the

programmable register. Accordingly, the electronic device of claim 18 is materially

different from that of claim 21. Likewise, electronic device as claimed in claim 21 is

materially different from the claimed electronic device in claim 18.


Art Unit: 2694

Furthermore, Examiner submits that Claim 14 and Claim 18 are patentably

distinct because they recite different species that have mutually exclusive

characteristics. Specifically, Claim 14 recites an electronic device “means for supplying

a supply current, wherein the means for supplying the supply current consume a bias

current that is relatively higher at least while the supply current is changing than at other

time" which is not recited in Claim 18. Likewise, Claim 18 recites an electronic device

which has a materially different component not recited in Claim 14, e.g., the

programmable register. Accordingly, the electronic device of claim 14 is materially

different from that of claim 18. Likewise, electronic device as claimed in claim 18 is

materially different from the claimed electronic device in claim 14.

Therefore, Examiner submits that the restriction requirement was properly made

and supported. In this Office Action, Claims 6-13 and 26-33 are considered. Claims 1-5,

14-17, 18-20, and 21-25 are not considered.

Claim Interpretation — 35 us. C. §112, #6.

Regarding claims 26—33, the means plus function recitation are interpreted under

35 U.S.C.§112,116, in the following manner:

Regarding claim 26, the recitation “means for providing a supply current and a

supply voltage" qualifies as a means plus function recitation under 35 U.S.C. §112, 116.

However, the "means for providing a supply current and a supply voltage" is not


Art Unit: 2694

sufficiently supported by corresponding structure in the Specification as originally filed

together with this application on 07/29/2010. In particular, the only structure mentioned

in the specification for this element refers to a low drop out regulator (LDO) 78 in

1i[0048], 1I[oo49], 1I[0051]-1I[0054], and 1I[0059] FIG. 6, FIG. 11, and FIG. 14.

However, there are other types of circuits that are designed to provide a voltage

and a current (i.e., panel disturbance current 82 providing current ic(t) and VSUP, and

panel load 84 providing current |L(t) + II(t) and voltage Vsup, etc.). Furthermore, the

specification fails to clearly provide the link between the structure to the function of the

claim. Medical Instrumentation and Diagnostics Corporation v. Eleckta AB, Elekta

Instrument AB, Elekta Instruments, Inc., and Elekta Oncology Systems, Inc., 344 F.3d

1205, 68 USPQZd 1263 (Fed. Cir. 2003) (it is not sufficient to only describe the

structure in the specification. Rather, the specification must clearly link the structure to

the function of the claim). Additionally, note that in Default Proof Credit Card System,

Inc. v. Home Depot U.S.A, Inc., 412 F. 3d 1291 (Fed. Cir. 2005), the Federal Circuit

explained that a person of ordinary skill in the art is not relevant to a determination of a

claim’s indefiniteness.

Accordingly, Applicants' disclosure fails to particularly point out and distinctly

define what constitutes the "means for providing a current and a voltage". Therefore,

the "means for providing a current and a voltage" is improper and any element in the

prior art that performs the same function will read on this particular recitation. See

MPEP §2173 and §2185.


Art Unit: 2694

Similarly, the recitation “means for determining when the supply current to the

display panel is expected to change" qualifies as a means plus function recitation under

35 U.S.C. §112, 116. However, the "means for determining when the supply current to

the display panel is expected to change" is not sufficiently supported by corresponding

structure in the specification as originally filed together with this application on

07/29/2010. In particular, the only structure mentioned in the specification for this

element refers to a predictive bias controller 138 in 1l[0054]-1l[0056], and 1l[0061] FIG. 6,

FIG. 11, and FIG. 14.

However, there are other types of circuits that are designed to determine when

the supply current to the display panel is expected to change (i.e., the low dropout

regulator 78). Furthermore, the specification fails to clearly provide the link between the

structure to the function of the claim. See id at Medical Instrumentation and Diagnostics

Corporation v. Eleckta AB, Elekta Instrument AB, Elekta Instruments, Inc., and Elekta

Oncoloav Systems, Inc., 344 F.3d 1205. 68 USPQZd 1263 (Fed. Cir. 2003) andM

Proof Credit Card System. Inc. v. Home Depot U.S.A, Inc., 412 F. 3d 1291 (Fed. Cir.

2005), the Federal Circuit explained that a person of ordinary skill in the art is not

relevant to a determination of a claim’s indefiniteness.

Finally, the recitations “means for providing the first bias current” and “means for

providing second bias current” qualify as a means plus function recitation under 35

U.S.C. §112, 116. However, either “means for providing the first bias current” and

“means for providing second bias current” is not sufficiently supported by corresponding


Art Unit: 2694

structure in the specification as originally filed together with this application on

07/29/2010. In particular, the only structure mentioned in the specification for this

element refers to a predictive bias controller 138 in jj[0054]-1j[0056], and jj[0061] FIG. 6,

FIG. 11, and FIG. 14.

Claims 27-33 are also means plus function claims because they depend on claim

26.

Claim Rejection — 35 us. C. §1 12, #2

The following is a quotation of 35 U.S.C. §112(b):

(B) CONCLUSION. -- The specification shall conclude with one or more claims

particularly pointing out and distinctly claiming the subject matter which the inventor or a

joint inventor regards as their invention.

The following is a quotation of 35 U.S.C. §112 (pre-AIA), second

paragraph:

The specification shall conclude with one or more claims particularly pointing out and

distinctly claiming the subject matter which the applicant regards as his invention.

Claims 26-33 are rejected under 35 U.S.C. §112(b) or 35 U.S.C.§112(pre-AIA),

second paragraph, as being indefinite for failing to particularly point out and distinctly

claim the subject matter which the inventor or a joint inventor, or for pre-AIA the

applicant regards as the invention.

Regarding claim 26, the recitation “means for providing a supply current and a

supply voltage” is indefinite. While this recitation qualifies as a means plus function

recitation under 35 U.S.C. §112, 116, the "means for providing a supply current and a


Art Unit: 2694

supply voltage" is not sufficiently supported by corresponding structure in the

specification as originally filed. See id. Therefore, the specification as originally filed

fails to particularly point out and distinctly define what constitutes the "means for

providing a supply current and a supply voltage " and therefore the "means for

providing a supply current and a supply voltage " is indefinite. See MPEP §2173,

§2185.

Similarly, the recitation “means for determining when the supply current to the

display panel is expected to change" is indefinite. While this recitation qualifies as a

means plus function recitation under 35 U.S.C. §112, 116, the “means for determining

when the supply current to the display panel is expected to change" is not sufficiently

supported by corresponding structure in the specification as originally filed. See id.

Therefore, the specification as originally filed fails to particularly point out and distinctly

define what constitutes the “means for determining when the supply current to the

display panel is expected to change" and therefore the “means for determining when

the supply current to the display panel is expected to change" is indefinite. See MPEP

§2173,§2185.

Finally, the recitations “means for providing the first bias current” and “means for

providing second bias current” are indefinite. While this recitation qualifies as a means

plus function recitation under 35 U.S.C. §112, 116, the “means for providing the first bias

current” and “means for providing second bias current” are not sufficiently supported by

corresponding structure in the specification as originally filed. See id. Therefore, the

specification as originally filed fails to particularly point out and distinctly define what


Art Unit: 2694

constitutes the “means for providing the first bias current” and “means for providing

second bias current” and therefore the “means for providing the first bias current” and

“means for providing second bias current” are indefinite. See MPEP §2173, §2185.

Claims 27-33 depend on claim 26 and thus they are also indefinite for the same

reasons stated above.

Claim Rejections - 35 USC § 103

The following is a quotation of 35 U.S.C. §103(a) which forms the basis for all

obviousness rejections set forth in this Office action:

(a) A patent may not be obtained though the invention is not identically disclosed or

described as set forth in sect'on 102 of this title, if the differences between the

subject matter sought to be patented and the prior art are such that the subject

matter as a whole would have been obvious at the time the invention was made to a

person having ordinary skill in the art to which said subject matter pertains. Patentability

shall not be negatived by the manner in which the invention was made.

This application currently names joint inventors. In considering patentability of

the claims under 35 U.S.C. §103(a), the examiner presumes that the subject matter of

the various claims was commonly owned at the time any inventions covered therein

were made absent any evidence to the contrary. Applicant is advised of the obligation

under 37 CFR §1.56 to point out the inventor and invention dates of each claim that was

not commonly owned at the time a later invention was made in order for the examiner to

consider the applicability of 35 U.S.C. §103(c) and potential 35 U.S.C. §102(e), (f) or (g)

prior art under 35 U.S.C. §103(a).


Art Unit: 2694

Claims 6-13 and 26-33 Are Reiected Under 35 U.S.C. S103(a) as Being Obvious bv

Zadeh (US Patent Application Publication No. US—2002/013646) in View of Cheng US

Patent Application Publication No. US—2010/0012891).

As to claim 6, Zadeh teaches a method (providing a linear voltage regulator

with adaptive biasing" Zadeh, page 1, 1][0006]; see FIG. 1) comprising:

providing a supply current (load current, FIG. 1; see id at 1][0006]) and a supply

voltage (output voltage VOUT, FIG. 1; see id at 1][0006]) to a microprocessor (“The

LDO regulator 100 supplies power to diverse circuits, such as microprocessors,

controllers, and/or memory circuits.” Zadeh, page 2, 1I[0028]) using a low dropout

regulator (LDO regulator 1000, FIG. 1), wherein the supply current (load current) is

generated based at least in part on a first bias current (high operating current, Zadeh,

page 1,1] [0009]; FIG. 1) or a second bias current (low or normal operating current,

see id at 1][0009]) provided to the low dropout regulator;

determining, using a bias current controller (adaptive biasing circuit, see id at

1][0006]), when the supply current to the microprocessor is expected to change

(“Furthermore, the adaptive biasing circuit is configured to sense changes in the

load current and alters an operating current of the LDC regulator in response.”

Zadeh, page 1, 1][0006]; also page , 1][0038]; see FIG. 1);

providing the first bias current (high or transient operating current, see id at

1][0009]) to the low dropout regulator using the bias current controller at least while the


Art Unit: 2694

supply current to the display panel is expected to change (Zadeh teaches that when

the load current changes, the adaptive biasing circuit produces a high operating

current to maintain output voltage VOUT constant and improve transient

responses; “The method further includes increasing the operating current of the

linear voltage regulator to a relatively high level during the transients, thereby

improving transient responses of the linear voltage regulator.” Zadeh, page 1,

1][0007]) ; and

providing the second bias current (low or steady state operation current, see

id at 1][0009]) to the low dropout regulator using the bias current controller at all other

times (“The method includes biasing the linear voltage regulator at a relatively low

operating current for steady-state operation, thus improving power efficiency of

the linear voltage regulator.” See id at 1I[0007]).

However, Zadeh only teaches a method of providing current to a microprocessor

but not a display panel. Cheng is made of record to teach this limitation.

Cheng teaches a lowdrop regulator for a display panel (LCD 700 has LCD panel

710; Cheng, page 5,1][0054]; see FIG. 7).

At the time the invention was made, it would have been obvious to one of

ordinary skill in the art to modify Zadeh's microprocessor to include Cheng’s LCD

because such a modification is the result of simple substitution of one known

element for another producing a predictable result. More specifically, Zadeh’s

microprocessor and Cheng’s LCD perform the same general and predictable function,

the predictable function being regulated voltages. Since each individual element and its


Art Unit: 2694

function are shown in the prior art, albeit shown in separate references, the difference

between the claimed subject matter and the prior art rests not on any individual element

or function but in the very combination itself - that is in the substitution of Zadeh's

microprocessor by replacing it with Cheng’s LCD. Thus, the simple substitution of one

known element for another producing a predictable result renders the claim obvious.

KSR International Co. v. Te/ef/ex Inc., 127 S. Ct. 1727, 82 USPQZd 1385.; In re Kubin,

561 F.3d 1351, 1355 (Fed. Cir. 2009); see also Graham v. John Deere 00., 383 U.S. 1,

For the above reasons, claim 6 of the instant application is unpatentable as being

prima facie obvious under §103 by Zadeh in view of Cheng.

As to claim 7, Zadeh, as modified by Cheng in the same manner and for the

same reasons stated in Claim 6, teaches the method of claim 6, wherein the first bias

current is higher than the second bias current (Zadeh teaches that when the load

current increases substantially, the LDC 100 provides the increased current to

keep the output voltage stable, thus increasing the biasing current to the LDC;

biasing or operating current in the steady state condition is lower than in the

transient or surge condition "During steady-state operation, the level of the

adaptive biasing current is insignificant. The tail current is substantially the

steady-state biasing current. During a transient, the output current surges (or

spikes) to stabilize the output voltage. The sensed current surges


Art Unit: 2694

correspondingly. The adaptive biasing current becomes significant and adds to

the tail current. Increased tail current allows the single-stage op-amp 218 to

adjust the voltage at the gate terminal of the power transistor 114 faster, thereby

improving the transient response of the LDC regulator 200. Since the adaptive

biasing circuit 214 is relatively dormant during steady-state operation, the

adaptive biasing circuit 214 improves performance without degrading efficiency.

For example, the adaptive biasing circuit 214 does not increase power dissipation

significantly.” Zadeh, page 4, 1I[0053]; FIG. 1- FIG. 4).





current is provided to the low dropout regulator before and while the supply current to

the display panel is expected to change ( Zadeh teaches when the transient is quick

and large, requiring the adaptive biasing circuit 214 to react quickly, “The control

circuit 312 has a relatively high slew-rate and bandwidth to improve transient

responses of the LDC regulator 300. During a transient when a load current

increases relatively quickly (e.g., from zero milliampere to 100 milliamperes within

a few microseconds), the output voltage dips until the LDC regulator 300 reacts

to provide the new load current. In one embodiment, the operating current in a


Art Unit: 2694

control loop of the LDC regulator 300 increases during the transient to restore the

output voltage to a steady-state level relatively faster.” Zadeh, page 5, 1][0061];

see FIG. 5A).





current is provided to the low dropout regulator while and after the supply current to the

display panel is expected to change (when the transient surge in the load is slow

and small, less dramatic, this does not require the adaptive biasing circuit 214 to

react quickly, see id at 1][0061] and FIG. 5A).




same reasons stated in Claim 6, teaches the method of claim 6, wherein the supply

current is provided by the low dropout regulator in a more responsive manner when the

first bias current is provided to the low dropout regulator than when the second bias

current is provided to the low dropout regulator (“During a transient response, the

output current of the LDC regulator spikes, indicating that the pass transistor 114


Art Unit: 2694

is driven relatively hard to return the LDC regulator to steady-state conditions

after a load change. The output current in the LDC regulator with adaptive biasing

increases relatively faster in response to increased load current, reaches a higher

peak current, and advantageously settles to the new steady-state output current

level faster than the output current in the LDC regulator without adaptive biasing.

For example, the LDC regulator with adaptive biasing reaches steady state

operation in half the amount of time.” Zadeh, page 5, 1l[0067]; FIG. 5A).

For the above reasons, claim 10 of the instant application is unpatentable as

being prima facie obvious under §103 by Zadeh in view of Cheng.



current drawn by the display panel is determined to be expected to change when

capacitive coupling currents are generated in parasitic capacitors (“In one

embodiment, the error amplifier 112 adjusts gate voltage of the power transistor

114 to control the output current level. The gate voltage is adjusted by charging

or discharging the parasitic gate capacitance of the power transistor 114. In one

embodiment, adaptive biasing in the error amplifier 112 improves charging or

discharging speeds, thereby improving transient responses of the LDC regulator

100. For example, adaptive biasing temporarily increases the error amplifier‘s

operating current to facilitate faster charging or discharging of the parasitic gate


Art Unit: 2694

capacitance, thereby improving the response time of the LDO regulator 100 to

changing load conditions” Zadeh, page 3, 1l[0039]) of the display panel.





current drawn by the display panel is determined to be expected to change upon a

rising edge of a clock signal or a falling edge of the clock signal, or a combination

thereof (The LCD 700 has an LCD panel 710 having a plurality of rows of pixel

elements 711 and 712 therein and a corresponding plurality of gate lines g1, g2,

g3, g4, electrically coupled to the plurality of rows of pixel elements 711 and 712.

For the purpose of illustration of the invention, only two rows of pixel elements

711 and 712 and four gate lines g1, g2, g3, 94 are shown in this exemplary

embodiment. The LCD 700 also has a GPM circuit 720 for receiving four clock

signals CK1, CK2, CK3, CK4, and for outputting four modulated clock signals

CKH1, CKH2, CKH3, CKH4. Each modulated clock signal CKH1/CKH2/CKH3/CKH4

is corresponding to a clock signal CK1/CK2/CK3/CK4 and has a waveform having

a desired falling slope. The details of the GPM circuit 720 is same as that of the

GPM circuit 100, as shown in FIG. 1 and discussed above, except in the

embodiment, a four-phase configuration is utilized. The modulated clock signals

CKH1, CKH2, CKH3, CKH4 are input to a shift register 730 formed on a glass


Art Unit: 2694

substrate of the LCD panel 710, i.e., the gate on array (GOA). The shift register

730 responsively generates a plurality of gate signals G(1), G(2), . . . , According

to the present invention, the waveforms of the odd gate signals and of the even

gate signals are different. When the plurality of gate signals G(1), G(2), . . . , is

sequentially applied to the plurality of gate lines g1, g2, . . . , to drive the plurality

of rows of pixel elements 711 and 712, the odd gate lines and the even gate lines

have different feed-through effects, thereby minimizing the dark-bright line and

flicker phenomena associated with the HSD pixel design and improving display

performance of the LCD.; Cheng, page 1, 1][0054]; see FIG. 4 — FIG. 6) .

firntivit‘; occurs at failing edge-

l.‘l t2 t3 t1 t2 t3

VCsel.

VDTS 5

8K1 VQH V"flailing: CKZ VQH falling

0K3 VQL = ' 777777777777777777777 N

CKS E =I I I : T

VGH E

CKH1

CKHB VGL W"

CKHS

Fig. 4


Art Unit: 2694





current drawn by the display panel is determined to be expected to change when an

electronic component proximate to the display panel undertakes or is about to

undertake an operation (Zadeh describes the change in a load or load current

represented by load current; Zadeh, page 1, 1][0004]; higher operation draws large

load current and vice versa; this is described by Zadeh as “load condition”;

Zadeh, page 1, 1][0009]; see also Zadeh at 1][0028], page 2).



As to claim 26, Zadeh teaches an electronic device (LDO regulator 100, FIG. 1

— FIG. 4) comprising:

means (power transistor 114, FIG. 2; Zadeh, page, 1][0043]) for providing a

supply current (load current, FIG. 1; see id at 1][0006]) and a supply voltage (output

voltage VOUT, FIG. 1; see id at 1][0006]) to a display panel, wherein the supply current

is generated based at least in part on a first bias current (high operating current,

Zadeh, page 1,1] [0009]; FIG. 1) or a second bias current (low or normal operating

current, see id at 1][0009]);


Art Unit: 2694

means (control circuit 212 and feedback circuit 116, FIG. 2) for determining

when the supply current to the display panel is expected to change (feedback circuit

provides voltage at the load VFB and the control circuit 212 which is an op-amp

218 compares this VFB with a reference voltage VREF to detect the change in the

supply current; Zadeh, page, 1][0044]; FIG. 2- FIG. 4);

means (adaptive biasing circuit 214, FIG. 2; Zadeh, page, 1][0044]) for

providing the first bias current at least while the supply current to the microprocessor

microprocessor (“The LDO regulator 100 supplies power to diverse circuits, such

as microprocessors, controllers, and/or memory circuits.” Zadeh, page 2,

1][0028]) is expected to change (Zadeh teaches that when the load current changes,

the adaptive biasing circuit produces a high operating current to maintain output

voltage VOUT constant and improve transient responses; “The method further

includes increasing the operating current of the linear voltage regulator to a

relatively high level during the transients, thereby improving transient responses

of the linear voltage regulator.” Zadeh, page 1, 1I[0007]); and

means (current source 215, biasing transistors 250, 252; Zadeh, page,

1][0044]) for providing the second bias current at all other times (“The method includes

biasing the linear voltage regulator at a relatively low operating current for

steady-state operation, thus improving power efficiency of the linear voltage

regulator.” See id at 1l[0007]).

However, Zadeh only teaches a method of providing current to a microprocessor

but not a display panel. Cheng is made of record to teach this limitation.


Art Unit: 2694

Cheng teaches a Iowdrop regulator for a display panel (LCD 700 has LCD panel

710; Cheng, page 5,1][0054]; see FIG. 7).

At the time the invention was made, it would have been obvious to one of

ordinary skill in the art to modify Zadeh's microprocessor to include Cheng’s LCD

because such a modification is the result of simple substitution of one known

element for another producing a predictable result. More specifically, Zadeh’s

microprocessor and Cheng’s LCD perform the same general and predictable function,

the predictable function being regulated voltages. Since each individual element and its

function are shown in the prior art, albeit shown in separate references, the difference

between the claimed subject matter and the prior art rests not on any individual element

or function but in the very combination itself - that is in the substitution of Zadeh's

microprocessor by replacing it with Cheng’s LCD. Thus, the simple substitution of one

known element for another producing a predictable result renders the claim obvious.

KSR International Co. v. Te/ef/ex Inc., 127 S. Ct. 1727. 82 USPQZd 1385.: In re Kubin.

561 F.3d 1351, 1355 (Fed. Cir. 2009); see also Graham v. John Deere 00., 383 U.S. 1,




same reasons stated in Claim 26, teaches the electronic device (LDO regulator 100,


Art Unit: 2694

FIG. 1 — FIG. 4) of claim 26, wherein the first bias current is higher than the second bias

current (Zadeh teaches that when the load current increases substantially, the

LDC 100 provides the increased current to keep the output voltage stable, thus

increasing the biasing current to the LDC; biasing or operating current in the

steady state condition is lower than in the transient or surge condition "During

steady-state operation, the level of the adaptive biasing current is insignificant.

The tail current is substantially the steady-state biasing current. During a

transient, the output current surges (or spikes) to stabilize the output voltage.

The sensed current surges correspondingly. The adaptive biasing current

becomes significant and adds to the tail current. Increased tail current allows the

single-stage op-amp 218 to adjust the voltage at the gate terminal of the power

transistor 114 faster, thereby improving the transient response of the LDC

regulator 200. Since the adaptive biasing circuit 214 is relatively dormant during

steady-state operation, the adaptive biasing circuit 214 improves performance

without degrading efficiency. For example, the adaptive biasing circuit 214 does

not increase power dissipation significantly.” Zadeh, page 4, 1l[0053]; FIG. 1- FIG.

4).






Art Unit: 2694

FIG. 1 — FIG. 4) of claim 26, wherein the first bias current is provided before and while

the supply current to the display panel is expected to change ( Zadeh teaches when

the transient is quick and large, requiring the adaptive biasing circuit 214 to react

quickly, “The control circuit 312 has a relatively high slew-rate and bandwidth to

improve transient responses of the LDC regulator 300. During a transient when a

load current increases relatively quickly (e.g., from zero milliampere to 100

milliamperes within a few microseconds), the output voltage clips until the LDC

regulator 300 reacts to provide the new load current. In one embodiment, the

operating current in a control loop of the LDC regulator 300 increases during the

transient to restore the output voltage to a steady-state level relatively faster.”

Zadeh, page 5, 1][0061]; see FIG. 5A).





FIG. 1 — FIG. 4) of claim 26, wherein the first bias current is provided while and after the

supply current to the display panel is expected to change (when the transient surge in

the load is slow and small, less dramatic, this does not require the adaptive

biasing circuit 214 to react quickly, see id at 1][0061] and FIG. 5A).


Art Unit: 2694





FIG. 1 — FIG. 4) of claim 26, wherein the supply current is provided in a more

responsive manner when the first bias current is provided than when the second bias

current is provided (Zadeh teaches clue to the fast response of the first bias current

of the adaptive the system of Zadeh reaches steady state faster than the

conventional ones; however, during steady state, the second bias current is less

dramatic, “In one embodiment, the LDC regulator senses an increase in the load

current and increases the operating current of the control circuit to a relatively

high level temporarily. The relatively high operating current allows the control

signal to transition relatively quickly, thereby improving the transient response of

the LDC regulator.” Zadeh, page 1, 1][0009]; see also page 6, 1][0067]; FIG. 5A .


Art Unit: 2694

TRANSENT RESPONSE

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FIG. 1 — FIG. 4) of claim 26, wherein the supply current drawn by the display panel is

determined to be expected to change when capacitive coupling currents are generated

in parasitic capacitors of the display panel (“In one embodiment, the error amplifier

112 adjusts gate voltage of the power transistor 114 to control the output current

level. The gate voltage is adjusted by charging or discharging the parasitic gate

capacitance of the power transistor 114. In one embodiment, adaptive biasing in

the error amplifier 112 improves charging or discharging speeds, thereby

improving transient responses of the LDC regulator 100. For example, adaptive

biasing temporarily increases the error amplifier's operating current to facilitate

faster charging or discharging of the parasitic gate capacitance, thereby


Art Unit: 2694

improving the response time of the LDO regulator 100 to changing load

conditions” Zadeh, page 3, 1l[0039]).






determined to be expected to change upon a rising edge of a clock signal or a falling

edge of a clock signal, or a combination thereof (The LCD 700 has an LCD panel 710

having a plurality of rows of pixel elements 711 and 712 therein and a

corresponding plurality of gate lines 91, 92, g3, g4, electrically coupled to the

plurality of rows of pixel elements 711 and 712. For the purpose of illustration of

the invention, only two rows of pixel elements 711 and 712 and four gate lines 91,

92, g3, 94 are shown in this exemplary embodiment. The LCD 700 also has a GPM

circuit 720 for receiving four clock signals CK1, CK2, CK3, CK4, and for

outputting four modulated clock signals CKH1, CKH2, CKH3, CKH4. Each

modulated clock signal CKH1/CKH2/CKH3/CKH4 is corresponding to a clock

signal CK1/CK2/CK3/CK4 and has a waveform having a desired falling slope. The

details of the GPM circuit 720 is same as that of the GPM circuit 100, as shown in

FIG. 1 and discussed above, except in the embodiment, a four-phase

configuration is utilized. The modulated clock signals CKH1, CKH2, CKH3, CKH4


Art Unit: 2694

are input to a shift register 730 formed on a glass substrate of the LCD panel 710,

i.e., the gate on array (GOA). The shift register 730 responsively generates a

plurality of gate signals G(1), G(2), . . . , According to the present invention, the

waveforms of the odd gate signals and of the even gate signals are different.

When the plurality of gate signals G(1), G(2), . . . , is sequentially applied to the

plurality of gate lines g1, g2, . . . , to drive the plurality of rows of pixel elements

711 and 712, the odd gate lines and the even gate lines have different feed-

through effects, thereby minimizing the dark-bright line and flicker phenomena

associated with the HSD pixel design and improving display performance of the

LCD.; Cheng, page 1, 1][0054]; see FIG. 4 — FIG. 6).






determined to be expected to change when an electronic component proximate to the

display panel undertakes or is about to undertake an operation (Zadeh describes the

change in a load or load current represented by load current; Zadeh, page 1,

1][0004]; higher operation draws large load current and vice versa; this is


Art Unit: 2694

described by Zadeh as “load condition”; Zadeh, page 1, 1l[0009]; see also Zadeh

at 1][0028], page 2).



Conclusion

Any inquiry concerning this communication or earlier communications from the

examiner should be directed to TONY NGO whose telephone number is (571) 270-

7561. The examiner can normally be reached on 9-6 M-F.

If attempts to reach the examiner by telephone are unsuccessful, the examiner’s

supervisor, Alexander Beck can be reached on (571) 272-7765. The fax phone number

for the organization where this application or proceeding is assigned is 571 -273-8300.

Information regarding the status of an application may be obtained from the

Patent Application Information Retrieval (PAIR) system. Status information for

published applications may be obtained from either Private PAIR or Public PAIR.

Status information for unpublished applications is available through Private PAIR only.

For more information about the PAIR system, see http://pair-direct.uspto.gov. Should

you have questions on access to the Private PAIR system, contact the Electronic

Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a

USPTO Customer Service Representative or access to the automated information

system, call 800-786-9199 (IN USA OR CANADA) or 571-272—1000.


Art Unit: 2694

/TONY NGO/

EXAMINER, ART UNIT 2694

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