unit v fault diagnosis. syllabus logical level diagnosis – diagnosis by uut reduction – fault...
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Unit V Fault Diagnosis
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Syllabus
Logical Level Diagnosis – Diagnosis by UUT
reduction – Fault Diagnosis for Combinational
Circuits – Self-checking design – System Level
Diagnosis.
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©2005 David Lavo
What is Fault Diagnosis?
• A guess as to what’s wrong with a malfunctioning circuit
• Narrows the search for physical root cause• Makes inferences based on observed behavior• Usually based on the logical operation of the
circuit
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VLSI Fault Diagnosis (in One Slide)
TestsObservedBehavior
Defective Circuit
Diagnosis Diagnosis AlgorithmPhysical Analysis
Location or
Fault
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©2005 David Lavo
Two Types of Diagnosis
• Circuit Partitioning (“Effect-Cause” Diagnosis)– Identify fault-free or possibly-faulty portions– Identify suspect components, logic blocks,
interconnects• Model-Based Diagnosis (“Cause-Effect”
Diagnosis)– Assume one or more specific fault models– Compare behavior to fault simulations
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©2005 David Lavo
Circuit Partitioning
• Separate known-good portions of circuit from likely areas of failure
• Simplest method: identify failing flip-flops– Tester can identify failing flops or outputs– Input cone of logic is suspect– Intersection of multiple cones is highly suspect– Single clock pulse with scan can be used for
sequential/functional fails
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Back-Tracing Failures
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©2005 David Lavo
Effect-Cause Diagnosis
• Reasoning based on observed behavior and expected (good-circuit) functions
• Commonly used at system and board-levels• Tries to separate good and suspect areas• Advantage: Simple and general• Disadvantage: Not very precise, often gives no
indication of defect mechanism
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©2005 David Lavo
Cause-Effect Diagnosis
• Start from possible causes (fault models), compare to observed effects
• A simulator is used to predict behavior of the circuit in the presence of various faults
• Match prediction(s) against observed behavior• Advantage: Implicates a mechanism as well as a
location• Disadvantage: Can be fooled by unmodeled
defects
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Tests
Defective Circuit
Fault Simulator
010001010100010101010 …
Behavior Signature
010100110000101010100 …
101000100001011101100 …
010100010100011101100 …
000111000101010011110 …
Candidate Signatures
Diagnosis Algorithm
Comparison & Conclusion
Cause-Effect Diagnosis
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11©2005 David Lavo Fault Diagnosis Overview
Fault Dictionaries
• A fault dictionary is a database of the simulated responses for all faults in faultlist
• Used by some diagnosis algorithms for convenience:– Fast: no simulation at time of diagnosis– Self-contained: netlist, simulator, and test set
not needed after dictionary creation• Can be very large, however!
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Diagnosis by UUT Reduction
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Self-Checking Circuits
• Most important factors in designing a digital system: Speed, Cost and Correctness.• Some systems used in
1. medical equipment used in ICUs, 2. aircraft control systems, 3. nuclear reactor control systems, 4. military systems and 5. computing systems used in space missions.
• High reliability is of the utmost importance.• DSM technology: Signal Integrity problem
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Self-Checking Circuits:
• Def: Error An incorrect output caused by a stuck-at fault.
• Def: Single Error An error that affects only a single component value
• Def: Multiple Error An error that affects multiple component values.
• The component value affected by an error may change form 0 to 1, or vice versa.•Def: unidirectional errors When all components affected by a multiple error change their values monotonically.
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Self-Checking Circuit
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Self-checking scheme
• Self-Checking scheme:1. a self-checking functional unit.2. a self-checking checker.
Self-Checkingfunctional unit
Self-checkingchecker
... ... ...
...
InputsX
OutputsY
Error signal
X: input code spaceY: output code space
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Self-Checking Circuits
• During the fault-free operation: a normal input will produce a normal output.• If an incorrect output is produced due to a fault, the error should be detected by the self-checking checker.
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Self-checking scheme
• Totally self-checking circuit:1. no erroneous results go undetected and 2. any fault will be eventually detected.
• Partially self-checking circuits:1. This approach is to restrict the set of faults for which the circuit has to be checked. 2. They are introduced to provide low-cost error detection.3. They may be used in non-critical applications.
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Self-Checking Checkers
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• Code-disjoint:
• TSC Checker:
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and secure-fault testing,-self isit if only and if
torespect withchecker TSC a called iscircuit A
Φ
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With the code-disjoint feature, one may be able to test if the TSC checker is malfunction.
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Self-checking scheme
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Self-checking scheme
• Fault Secure(FS): code word input to a faulty circuit must not produce an incorrect code word output.• Self-testing: a fault in a circuit must be detected by some input.
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Self-checking scheme
• Fault Secure(FS):
• Self-testing:
.or ,
if only and if
torespect with called iscircuit A
) F(x, ) F(x, Y)F(x, XxΦ
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Φngself-testi
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Self-checking scheme
• Totally Self-Checking:
• Partially Self-Checking:
. torespect with and isit if only and if
torespect with (TSC) called iscircuit A
Φuresecfault-ngself-testi
Φ glf-checkintotally se
.subset afor and for isit
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XIuresecfault-Xngself-testi
Φingself-checkpartially
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Self-checking scheme
• Fault-secure-only circuits:1. No erroneous results go undetected.2. However, it is possible that some fault can never be detected.
• Self-testing-only circuit: 1. Any fault can produce undetected errors for a short time. 2. However, there is a code word input that can detect the fault.