fault diagnosis
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Fault Diagnosis. The Diagnosis Problem. General: Given the symptoms, determine the likely cause(s) Applies to many domains: Human illness, trouble-shooting of any kind - PowerPoint PPT PresentationTRANSCRIPT
Fault Diagnosis
SAT-Based Diagnosis 2
The Diagnosis ProblemGeneral: Given the symptoms, determine the likely cause(s)
Applies to many domains: Human illness, trouble-shooting of any kind
In testing: Given test results on a failing device, {<failing test, failing outputs>}, find the likely defects/faults as the causes.
Often a preprocess to failure-mode analysis (FMA), an expensive process.
SAT-Based Diagnosis 3
Model-based vs. Model-free Diagnosis?
Model Based: Assumes the error-causing defect can be modeled by one or more of the standard fault models: SAF, Bridging, Opens, ...Model-Free: Assumes the defect can excite any number of lines in any time frame, some of whom are observed in the same or later time frames according to the test results.
Both, however, must limit the multiplicity of causes for practical reasons.
SAT-Based Diagnosis 4
Cause-effect vs. Effect-cause Analysis?
Cause-effect: For the given test, pre-compute the effects of all possible causes, according to an assumed fault model, and build a dictionary with effects as index and causes as contentsDiagnosis reduces to simple dictionary lookup
Effect-causeAnalyze the circuit elements connected to the outputs for observed test results and determine likely causes at the inputs of the circuit elements.Repeat the process recursively until all possible causes are determined.
SAT-Based Diagnosis 5
Motivating ExampleConsider test results from c17:
Test Vector(A,B,C,D,E)
Failing Output(s)
V1: <1,1,1,0,0>
Z
V2: <0,1,1,0,1>
Y
We will work through the example in class.
SAT-Based Diagnosis 6
Motivating Example (Contd.)
Now consider the results of a third test vector applied to c17:
Test Vector(A,B,C,D,E)
Failing Output(s)
V1: <1,1,1,0,0>
Z
V2: <0,1,1,0,1>
Y
V3: <1,0,1,1,1>
Z
Fault Diagnosis Using Boolean Satisfiability*
* A. Smith, A. Veneris, M. F. Ali, and A. Viglas, “Fault Diagnosis and Logic Debugging Using Boolean Satisfiability,” IEEE TCAD, 24(10), Oct 2005, 1606-1621.
SAT-Based Diagnosis 8
Modeling Candidate Fault Location
SAT-Based Diagnosis 9
Counter for Multiple Faults
SAT-Based Diagnosis 10
Complete Construction
SAT-Based Diagnosis 11
Example Sequential Circuit and its ILA Representation
SAT-Based Diagnosis 12
Diagnosis in Two Cycles
SAT-Based Diagnosis 13
Sequential SAT Based Diagnosis-1
SAT-Based Diagnosis 14
Sequential SAT Based Diagnosis-2
SAT-Based Diagnosis 15
Two-Pass Diagnosis Using Structure Information
SAT-Based Diagnosis 16
Model-Based Diagnosis - SAFs
SAT-Based Diagnosis 17
Experimental Results - 1
SAT-Based Diagnosis 18
Experimental Results - 2