ultra-low-power brain-inspired devices and 3d integration ... · watson, a question answering...

© 2016 IBM CorporationMEMS Engineer Forum 2016 May 11th, 2016 1

Ultra-low-power Brain-inspired Devices and3D Integration for IoT

IBM Research Tokyo

Senior Manager of Science & Technology

Yasumitsu Orii, Ph.D

© 2016 IBM CorporationMEMS Engineer Forum 2016 May 11th, 2016

Moore’s Law is the 5th paradigm

2

What is the next paradigm

punch card

mechanical

vacuum tube

discrete

IC

The Law of Accelerating Returns by Ray Kurtzweil


Outline

1. Computer System in the era of Big Data

2. Neuromorphic Devices

3. 3D Integration


Outline



3. 3D Integration


Data volume is increasing !

5

Digital data being created in the world is equivalent to 50 billion movies. (It takes 14M years to see…incredible!)

3 44zettabytes zettabytes

2012 2020

Source: IDC Digital Universe

11 42% %

2005 2020

Ratio of the data generated by sensors


unstructuredData

Structured Data

Now

2010 2020

44Z byte

80% of all available data will be uncertain.


Watson, a question answering system developed by IBM research, challenged “Jeopardy!”, a famous quiz show in US, 14-16 Feb. 2011.

What is “Jeopardy!” A quiz show in US continueing from 1964Monday ~ Friday evening, broadcasted more than 9000 times.Questions are about history, science, sports, etc.

– Ordinary quiz requiring knowledge– Word puzzle

Three answerers competeWatson’s opponents：

• Ken Jennings: who won a record 74 consecutive "Jeopardy!" games in 2004-05)

• Brad Rutter: the biggest all-time money winner

Ken Jennings氏 Brad Rutter氏Watson

7


Watson：Question answering system was built on IBM Power 750

Each node consists of 4 POWER7 chips, and each chip consists of 8 CPU cores. →Total 2,880 cores 200kW Response in 2～3 seconds

8


Intelligent Sensor Network

Unstructured DataUnstructured Data

X X

Structured DataStructured Data

Sensor RF

Logic Battery

frequency spectrumdigital

conventional sensor intelligent sensor

intelligentsensornetwork

event-driven

X X

heavy workload light workload, cognitive analysis

WearableSensor to Human


Outline



3. 3D Integration


Watson vs. Brain Big efficiency gap calls for technology innovation

1111

Syst

em P

ower

(W

)

Year

Watson Power Scalingwith Moore’s Law > 1,000x

EfficiencyGap*

*brain does far more than scaled Watson

Human Brain


Computers and the Brain are Different

12

10 Hz, parallel, high fan-out

20W

1.2 L

106 neurons/cm2 (10K fan-out)

CPU/Memory conjugated system

3.55 GHz, sequential, linear

200kW

12,000 L

～5,000 connections/cm2

CPU-bus-Memory System


Amdahl’s Law on ParallelizationAmdahl's law states that if P is the proportion of a program that can be made parallel (i.e., benefit from paralleliza on), and (1 − P) is the proportion that cannot be parallelized (remains serial), then the maximum speedup that can be achieved by using N processors is


SyNAPSE chip SyNAPSE : Systems of Neuromorphic Adaptive Plastic Scalable Electronics

14

wikipedia

Neuron

NeuronSynapse

Axon

Dendrite

256 neurons, 256k synapses,field-programmable

Merolla et al., 2011; Arthur et al., 2012


SyNAPSE Chip2014 Aug.7th, 2014 IBM News

Compared with an optimized simulator running the exact same network on a modern general-purpose microprocessor, TrueNorth consumes 176,000 times less energy per event.

Compared with a state-of-the-art multiprocessor neuromorphic approach running a similar network, TrueNorth consumes 769 times less energy per event.


On chip Learning Brain : Plasticity vs. Chip : Fixed Circuit → SyNAPSE

On chip learning ? → Yes. “Native Device”

http://sugp.wakasato.jp/Material/Medicine/cai/text/subject07/no12/html/section1.html

Axon

Neuron

Synapse

Neuron

Wikipedia

Off chip learning Off chip learning

GPU

G. Burr, et al., IEDM 2015

Deep Learning→ Time & CostDeep Learning→ Time & Cost


Number of neurons: 256、1million、86billion？

1st gen (2011)

256 neurons 1million neurons

2nd gen (2014)

256 neuron / corex 4096core = 1 million

neuron

Wikipedia

86billion neurons

~2.5 ML~30 L

１shou of rice：64827 grains（shou: 1.8 Litters）→36000 grain / L

Backpack Olympic pool

Human brain

If 1 grain of rice is 1 neuron？

256 grains of rice

17


Packaging Technologies for Neuromorphic Device

Synapse Neuron

SyNAPSE Chip x 1 256M 1M

Bee 8.5B 0.85M

Mouse 0.7T 71M

SyNAPSE Chip x 100 25.6B 100M

Cat 1T 100M

SyNAPSE Chip x 100K 25.6T 100B

Human 1000T 100B

SyNAPSE chip has one million neurons. To mimic a cat brain, 100M neurons are required. The challenge of Packaging technology is how to connect 100 SyNAPSE chips.

Ultra fine pitch interconnectionUltra high density interposer

~200mm

TrueNorth x 100(= cat (100M neurons))

Ultra high-density interposer


Outline



3. 3D Integration


Strategy for Interconnection & Miniaturization

Horizontal Wiring Pitch

Verti

cal I

nter

conn

ectio

n P

itch

(fine line)

(fine pitch)

●smart phone

20


Trend of next generation packaging (2.5D/3DIC)

Challenge for 2.5D and 3D IC

chip

chip

Substrate

C4 bump joint Bump joint in 3DIC(IMC bonding)

< 10 µm

80 µm ～

IMC

• Microbumping and microbump bonding• Narrow gap resin molding (Underfill material and process)• CPI of second integration• Chip thinning (reliability and handling)• Countermeasure for heat• Reliability of package including TSV.• Low cost process• Test techniques• etc…

（120-150μm pitch）（<50μm pitch）

Microbump joint

• Fine pitch joint is required(In some structure, Most of solder is consumed by Wet Back)

• Most of solder in joint become IMC.= IMS, hard and fragile, may affect reliability (CPI)

Cu Ni

IMC

Enough solder to bond is necessary, and joint has to be fine pitch with high reliability

“Controlled IMC Bonding” technologyOptimization of solder composition for microbump joint is indispensable.

Upper die

TSV

IMC

Lower die

Substrate

Die

Cu

Φ5μm bump

~1/10

21


IMS (Injection Molded Solder)

Simple process Green process

• No flux, No formic acid• Reduction of solder waste

Pure solder injection• Capability of Higher solder bump• Flexible solder composition• High capability for finer pitch

One pass for multiple bump size

Solder

• C4NP (C4 New Process) for wafer bumping- Adopted in IBM’ mass production from 2007.

WaferTransfer

Solder filling

Glass mold

Solder filling + Transfer -> ” 1process ”

Wafer / Interposer

Molten solder

N2 pressure

・Polyimide film・Solder resist・Resist mask

22


Wafer IMS bumping results on 8 inch wafer

50μm

50μm diameter

50μm

75μm diameter

Wafer IMS demonstration with various opening size in 8 inch wafer !!!

solder bump solder bump

Demonstrated Wafer IMS bumping with 8 inch wafer

Opening size : 50μm ~ 200μmShape : Circle & Square

100μm,250μm pitch

75μm,125μm pitch

200μm,400μm pitch

50μm,200μm pitch

75μm,175μm pitch

150μm,300μm pitch

75μm,225μm pitch

75μm,150μm pitch

175μm,350μm pitch

IBM Research

23


• Key features• Very low cost TSV process• Solder injected TSV by IMS technology• Conformal polymer insulator

• Potential applications• Cost sensitive and low power edge devices

24

Concept of ViaS technology(ViaS: vertical integration after stacking)

One-time filled TSV by molten solder injection

Conformal polymer insulator

Adhesive

Schematic diagram of 3D chip module integrated with ViaS process

Smart sensor

SensorLogic

Memory

Brain-inspired device Healthcare device Memory

MemoryMemoryMemoryMemory

LogicSmart pill


Summary

25

BeeCat (Bee x 100)

• Edge computing become more important

• Extremely Low Power Devices inspired Brain

• Low Cost 3D Integration for Miniaturization


Thank you for your attention !

ultra-low-power brain-inspired devices and 3d integration ... · watson, a question answering...

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