two-stage led street lighting system based on a novel single-stage ac/dc converter

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Published in IET Power ElectronicsReceived on 14th July 2013Revised on 20th November 2013Accepted on 2nd December 2013doi: 10.1049/iet-pel.2013.0540

374The Institution of Engineering and Technology 2014

ISSN 1755-4535

Two-stage LED street lighting system based ona novel single-stage AC/DC converterYijie Wang, Yueshi Guan, Xinyu Liang, Wei Wang, Dianguo XuHarbin Institute of Technology, Harbin, Heilongjiang, People’s Republic of ChinaE-mail: [email protected]

Abstract: A two-stage street lighting system is presented, where the front stage is a single-stage AC/DC converter based on thesepic circuit and flyback converter. Since the sepic circuit and flyback converter share a switching device, the costs of the systemcan be reduced, and the efficiency and reliability can be improved. At the same time, the switch operates in quasi-resonant state,which reduces the switching losses and enhances the efficiency. The second stage is a light-emitting diode constant current circuit,which achieves the constant current control by adopting boost circuit in peak current control mode. A 100 W prototype ispresented, which confirms the correctness of the analysis, the front stage work in the soft-switching condition and theefficiency is up to 83% when the system is in full load condition.

1 Introduction

Since the package and coating technology are gettingincreasingly mature, the high bright lighting-emitting diodes(HB-LEDs) are used more and more widely, the luminousefficacy of HB-LED can reach 160 lm/W in the lab and theHB-LED with the luminous efficiency higher than 100 lm/W is already widely used. As the costs of HB-LEDdecrease, it will replace the high intensity discharged (HID)lamps.The traditional LED driver consists of three parts: the first

part is a power factor correction (PFC) circuit, the second partis a DC/DC converter and the third part is a constant currentcircuit [1]. Although easy to design, the three stages in seriessystem have limited efficiency and reliability. To improve theefficiency and reliability of the system, the single-stageAC/DC converter as an alternative of the PFC circuit andthe DC/DC converter [2–6] is studied for years. Reference[7] proposed an AC/DC converter based on a flyback circuitand a buck circuit, and a 70 W LED driver was proposed.But when the input voltage is higher than the outputvoltage, the input current of the buck circuit is 0. Inpractical use, the conduction angle must be higher than130° to make the total harmonic distortion (THD) satisfywith IEC 61000-3-2. If the input voltage is 220 VAC, thebus voltage must be lower than 131 V, which in turndecreases the efficiency of the system and limits the designflexibility of the flyback circuit, so the THD of thebuck-flyback converter cannot meet the IEC 61000-3-2standard easily with the consideration of the suitable busvoltage designing. Also, if the load changes, as shown in[7], the bus voltage will increase, which means that the busvoltage will increase and the conduction angle willdecrease. In [7], when the output power changes from 12.9to 55.5 W, the power factor (PF) changes from 0.932 to

0.638, and the THD changes from 35.3 to 72.7, so theinput characteristic of the converter in light load conditionis very poor. In [8], the authors proposed a single-stage AC/DC converter based on buck-boost converter and flybackconverter. Here, the integrating switch works with aconstant frequency, and the duty cycle of the switch isregulated to keep the output voltage constant, so the switchis turned on in hard switching state. Since a diode existsbetween the primary side of the transformer and the switch,the switch cannot work in quasi-resonant (QR) state, so theconverter cannot work in zero-voltage switching (ZVS) state.As is known, sepic circuit is widely used in LED lighting

system, since there are two inductors, one is in the inputside and the other is in the output side, which can reducethe value of the filter inductor, and the output voltage canbe both higher and lower than the input voltage. So, sepiccircuit is a reasonable choice for the LED lighting system[9–13].To maintain the luminous efficiency, a constant current

control is needed for the LED driver. The buck circuit, theboost circuit, the buck-boost circuit and the sepic circuit arecompatible to achieve the constant current control. Toachieve a high efficiency and to drive more LEDs in asingle string, the boost circuit becomes a very good choice.Besides, the inductor of the boost circuit is in the maincircuit, which decreases the output filter inductor; thesource pole is connected to the power ground; and the drivecircuit is very easy to design [14–18].A two-stage LED street lighting system is proposed in this

paper. The first stage is a single-stage AC/DC converter basedon sepic circuit and flyback circuit. The sepic circuit works inthe discontinuous conduction mode (DCM) state, whichaccomplished the PFC function. The flyback circuit workswith QR state, which decreases the switching losses andincreases the efficiency of the system. The second stage is

IET Power Electron., 2014, Vol. 7, Iss. 6, pp. 1374–1383doi: 10.1049/iet-pel.2013.0540

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the constant current circuit, and it is a boost circuit with peakcurrent control. Here, LT3756 by LINEAR Company isadopted to realise the constant current control.Therefore in Section 2, the single-stage AC/DC converter
based on flyback converter and sepic circuit is presented;the constant current circuit is introduced in Section 3;Section 4 presents the analysis of the proposed AC/DCconverter; the design process of the system is shown inSection 5; Section 6 shows the simulation and experimentalresults; Section 7 is the conclusion of the whole paper.

2 Proposed AC/DC converter

To decrease the switching losses of integrated switch, asingle-stage AC/DC converter is proposed. As the circuitworks in QR state which makes the switch work inapproximate ZVS condition, the cost of the system can bereduced and the efficiency and reliability can be improved.The proposed circuit is shown in Fig. 1.As shown in Fig. 1, the front stage of the sepic circuit is

composed of L1, C1, L2, D6, C3, Q, and the flyback circuit iscomposed of Q, transformer, D7, C4 and the load. Twocircuits are integrated together by sharing the switch Q; boththe sepic circuit and flyback circuit are working in DCMstate. The sepic circuit is used to achieve PFC function andthe flyback circuit can output a constant DC bus voltage.The converter has six working modes. The mode analysis

is shown in Fig. 2.Mode 1 (t0∼ t1):As shown in Fig. 2a, the mode begins at t0;

Q is turned on as the drive signal arrives; the current through L1increases linearly; C1 discharges to L2 through D5 and Q; C3

discharges to transformer primary side through Q; themagnetising current increases linearly, the mode ends at t1.At this moment, the turn-off signal arrives and Q is turned off.Mode 2 (t1∼ t2): As shown in Fig. 2b, Q is turned off at t1;

L1 freewheels through C1, D6 and charges to C3; L2discharges to C3 through D6; the secondary side of thetransformer provides energy to the load through D7. Here,the moment at which the current of D6 decreases from thepeak to zero is defined as t21 and the off moment of D7 isdefined as t22. If t21 > t22, the mode ends at t2 = t22, and theflyback circuit first reaches the discontinuous moment. Ift22 > t21, the sepic circuit first reaches the discontinuousmoment, the secondary side of the transformer will continueto provide energy to the load and the mode ends at t2 = t21.After the current of L2 reaches 0, it increases reversely.Then D6 is turned off naturally when the current of L2equals to the current of L1. During this period, secondary

Fig. 1 Proposed single-stage AC/DC converter based on sepic and flyb


transformer will continue to provide energy to load, andthis mode ends at t2 = t21.Mode 3-1 (t2∼ t3): As shown in Fig. 2c, at t22 > t21, the

mode begins at t2 and the current of D6 is 0. The secondaryside of the flyback circuit still continues to provide energyto the load, and the mode ends at t3 when the current in thesecondary side is 0.Mode 4-1 (t2∼ t3): As shown in Fig. 2d, at t21 > t22, the

current in the secondary side of the flyback circuit is 0; theprimary side inductance resonates with the primary sideequivalent capacitance C2 and the voltage across Q reducesgradually. At this time, L1 is freewheeling; L2 is clampedby the output voltage; so the current of L2 decreases to 0and then increases reversely. When the current of L1 equalsto the current of L2, this mode ends.Mode 3-2 (t3∼ t4): As shown in Fig. 2e, at t22 > t21, the

mode begins at t3; the current in the secondary side is 0; theprimary side inductance resonates with the primary sideequivalent capacitance C2; at the moment when the firstvoltage valley comes, the drive signal of Q also comes andthe mode ends.Mode 4-2 (t3∼ t4): As shown in Fig. 2f, at t21 > t22, the

primary side inductance and the primary side equivalentcapacitance C2 is still in the resonant state. When thevoltage of Q reaches the first valley, the off signal of Qcomes, the switch is turned on in approximation ZVS stateand this mode ends.Fig. 3 shows the waveforms of the main devices in the

circuit which correspond to the mode figures.

3 Constant current control circuit

The constant current control is adopted here to drive theLEDs. Since the LED arrays are connected in series, theconstant current drive unit adopts boost circuit under peakcurrent control so as to drive more LEDs in each branch.The control chip LT3756 is provided by LINEARCompany in America. A schematic diagram of the constantcurrent is shown in Fig. 4. The rated power for theprototype used in the laboratory is 100 W. Considering boththe applications and the costs, 350 mA/3.3 V LEDs byOSRAM totally in five branches are adopted.

4 Analysis of the converter

4.1 Sepic circuit analysis

Fig. 5 shows the current of L1 and L2, and the sepic circuitworks in the DCM state. As shown in Fig. 5, the current of

ack circuit

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Fig. 2 Working modes of the converter

a Model 1b Model 2c Model 3-1d Model 4-1e Model 3-2f Model 4-2

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L1 and L2 can be described as follows

iL1 = i0+ V1 sin (vt)

∣∣ ∣∣L1

t

iL2 = −i0 +V1 sin (vt)

∣∣ ∣∣L2

t

⎧⎪⎪⎪⎨⎪⎪⎪⎩

(1)

where V1 is the input peak voltage, ω is the power frequencyangular frequency, d is the duty cycle of the switch, Ts is theswitching period and i0 is the initial current of L1. When thecurrent of L1 and the current of L2 are satisfied withiL1 = −iL2 = i0, the current of D6 is 0, and the turn-on timeof D6 can be shown as follows

tdis =V1 sin (vt)

∣∣ ∣∣Vo

dTs =dTsM

sin (vt)∣∣ ∣∣ (2)

where Vo is the output voltage; M is the ratio of the outputvoltage and the peak input voltage; and the peak current of


D6 can be described as follows

I pd6 =V1 sin (vt)

∣∣ ∣∣Leq

dTs (3)

Here, Leq is the equivalent inductor of L1 and L2, Leq = (L1L2/L1 + L2), and the average current of one switching period canbe shown as follows

Iavgo =i pd6tdis2Ts

= V 21 d

2Ts sin2 (vt)

2LeqVo(4)

The average output current in half a line period can bedescribed as follows

Iavgh =1

p

∫p0iavgo dvt =

V 21 d

2Ts4LeqVo

= Vo

R(5)

Here, R = (Vo/2Lp)d2Ts is the load of sepic circuit, and it is

also the input impedance of the flyback circuit. Here, C0 inFig. 1 is the high-frequency filter capacitor, with the valuechosen here 470 nF. Since the value of C0 is very small, it


Fig. 3 Waveform diagram of the main devices

a t21 < t22b t21 > t22

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only filters the high-frequency component of the input voltageand increases the lowest input voltage after the rectifier in casethe input voltage is 0, so the equations are still validconsidering the function of C0.The average output current is shown in (4), and the output

voltage is Vo. The input voltage is V1sin(ωt), the input currentis defined to be i1, then assume the transmission efficiency ofthe system is 1, and the input power equals to the outputpower. So, the equation can be obtained as follows

V 21 d

2Ts sin2 (vt)

2LeqVoVo = V1 sin (vt)i1 ⇒ i1

= V1d2Ts

2Leqsin (vt) (6)

In this study, the displacement factor can be seen as 1. Thepower factor can be calculated as PF = I1/

��∑1n=1 I

2n

√. Here,

I1 is the fundamental component of the input current, and Inis the amplitude of each harmonic of the input current, so ifthe shape of input current is closer to the sine wave, thepower factor of the system is higher, and the input currentcan more accurately follow the input voltage.In this study, the input current is proportional to the input

voltage as shown in (6) in a high frequency period, then ina half power frequency period, the input current can follow


the input voltage accurately. Since the input voltage is asine wave, the PFC function is realised.Here to make sure that the sepic circuit works in the DCM

state, Ts > dTs + tdis, then the equation can be obtained asfollows

d 1+ 1

Msin (vt)∣∣ ∣∣( )

, 1 ⇒ d ,M

M + 1(7)

Consider the worst condition when ωt = 90°, then the equationcan be obtained as follows

d ,M

M + 1(8)

Here, we defined that Ka = 2Leq/RT, then the duty cycle can beobtained as follows

d =��2

√M

��Ka

√(9)

From (8) and (9), then d = ��2

√M

��Ka

√, (M/(M + 1)), and

in the boundary conduction mode, d = (M/M + 1), so thevalue of Ka in the boundary conduction mode can beobtained as follows

KB = 1

2(M + 1)2(10)

For the sepic circuit to work in the DCM state, Ka should behigher than KB.

4.2 Flyback circuit analysis

When the switch is turned off, the voltage of the leakageinductance reverses its direction, which imposes a quicklyrising of the voltage between the drain pole and the sourcepole of the switch. The slope of this current is Ip/C2, theleakage inductor resonates with C2 and the resonantfrequency can be shown as follows

fl =1

2p��LleakC2

√ (11)

Then the maximum voltage between the drain pole and thesource pole of the switch can be calculated by using thecharacteristic impedance of the network made of Lleak and C2.

VDS, max = Vo +1

n(Vof + VD)+ Ip

��LleakC2

√(12)

where VD is the turn-on voltage of D7, Vo is the output voltageof the sepic circuit, Ip is the current of the primary inductor,n is the turn ratio of the transformer and Vof is the outputvoltage of the flyback circuit.When the core of the transformer resets, the primary and

secondary currents of the transformer drop to zero. Lpresonates with C2, then a sinusoidal ringing takes place,which is damped by the parasitic impedance of thetransformer in the primary side. The voltage between thedrain pole and the source pole of the switch in this time can


Fig. 4 Circuit for constant current control

Fig. 5 Waveforms of the inductor current

Fig. 6 Voltage between drain pole and source pole of the switch

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be calculated as follows

VDS(t) = Vo +1

n(Vof + VD)e

−at cost��LpC2

√( )

(13)

Here, a = (Rp/2Lp), and Rp is the parasitic impedance of thetransformer in the primary side. So if the output voltagechanges, the lowest voltage changes. If the output voltagechanges, to obtain the same lowest voltage, the ratio n andthe primary side inductor Lp must be designed again. Also,it is obvious that the turn-on moments will change as the Lpor C2 changes and the voltage of VDS when the switch isturned on also varies, respectively. If the voltage is higher,then the switching losses are also higher. In realapplication, for the AC/DC converter, the output voltage isa fixed value, the working point in the steady state isalways fixed, so n and Lp can be designed according to theworking point in the steady state, and the circuit is suitableto be used in real applications.Fig. 6 shows the voltage between drain pole and source

pole of the switch. If we choose the first low voltage valleyto be the turn-on moment, the voltage between the drainpole and source pole of the switch is the lowest, and the


turn-on losses are decreased, and this is the QR workingmode.Here, we define that the turn-on time of the switch is ton; the

turn-on time of D7 is tds1 and the turn-off time is toff. Lp isinvolved in the resonance when the current of D7 decreasesto 0. To make sure that the switch is turned on in themoment when the first low voltage valley comes, toff shouldsatisfy the equation as follows

toff = Ts − (ton + tdis) = p��LpCr

√(14)

5 Design of the system

Here, the input voltage is 220 VAC, Vo = 200 V, Vof = 48 V,f = 100 kHz and the output power is 100 W. The efficiencyis defined to be 85%, then the output power of the sepiccircuit is P = (100/85%) = 117 W. Here, the ripple of theinput current is defined to be Irip = 20%I1, then KB = 0.185.Here Ka is chosen to be 0.16, with an enough marginselected. Although there is a fluctuation in the component


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values, the sepic circuit still works in DCM state, and the PFCfunction can be realised. Of course, for the proposed system,if the values of the components vary, the working point of thesepic circuit changes, then the bus voltage will change,respectively, but output voltage does not change becausethe regulation of the duty cycle, and the duty cycle isd = 0.36 here in steady state.The equivalent inductor Leq can be expressed as follows
Leq =RTsKa

2= 272mH (15)

When ωt = 90°, the input current ripple has the maximumvalue, and can be described as follows

Irip =V1dTsL1

(16)

Since the maximum ripple ratio is 20%, then L1 and L2 can beobtained as follows

L1 =V1dTsIrip

(17)

L2 =L1Leq

L1 − Leq(18)

By calculation, L1 is 7.55 mH and L2 is 282 uH. Here, thecore of L1 adopts high-frequency ferrite materials R2KDB/EE35, and its saturation flux density is 5100 Gs. To preventthe core saturation, the max magnetic flux density is set to0.7 times of the saturation magnetic flux density. Thediameter of the wire is chosen to be 0.8 mm, so the turnratio can be obtained as 176 and the air gap is 0.5 mm.Since the design is with enough margin, although the valueof L1 is very large, L1 is free from saturation effect.Here the resonant frequency of C1, L1 and L2 is defined to

be vr = 1/��L1 + L2( )

C1

√, and it should be higher than the

line frequency to avoid the oscillation. To keep the outputvoltage constant, ωr should be lower than the switchingfrequency, so ωl < ωr < ωs. ωr is about 5–10% of theswitching frequency, and the value of C1 can be calculated.The value of C3 can be calculated in (19), and Io,max is the

maximum output current; ΔVo is the ripple voltage.

C3 =Io,max(1− d)Ts

DVo(19)

The flyback circuit works in the DCM state, then thefreewheeling time should be less than (1− d )Ts, and thereciprocal of the ratio is satisfied with the equation as follows

n ,(1− d)Vof

dVo(20)

If the output power is Po, the efficiency of the system is η,then the primary inductor can be obtained as follows

Lp =hV 2

o d2Ts

2Po(21)

The primary current and the secondary inductor of the


transformer can be calculated as follows

Ip,avg =Vod

2Ts2Lp

= Po

hVo(22)

Ls =Lp

(1/n)2(23)

Here, the core of the transformer is EE-22, then the primaryturns can be obtained as follows

Np =VodTsDBAe

× 106 (24)

where ΔB is the variation of the magnetic flux density and Ae

is the core cross-sectional area.The secondary turns of the transformer can be obtained as

follows

Ns = Np × (Vof + VD)/Vo (25)

When Q is turned off, the resonant frequency can be obtainedas follows

fr =1

2p��LpC2

√ = 1

2 Ts − (ton + tdon)[ ] (26)

Then C2 can be obtained as follows

C2 =Ts − LpIp/Vo − nLpIp/ Vof + VD

( )[ ]2p2Lp

(27)

The maximum value of C4 can be obtained as follows

Cm, min =0.25Io8fsDVo

(28)

Here, the main energy elements for the PFC cell are L1 andC3. The sepic circuit and the buck-boost circuit are bothworking in DCM state. To make the circuits work in DCMstate, L1 is as high as 7.55 mH, but the inductor ofbuck-boost circuit in [8] is only 300 uH. Compared withthe bulk capacitor, since there are two inductors, both in theinput side and in the output side of the sepic circuit, thecurrent harmonic in the main circuit is very small, and C3 ischosen to be 100 uF from (19), but the bulk capacitor in [8]is as high as 330 uF. So, the values of energy elements inthe PFC cell in the proposed LED driver are relatively lowthan in [8].The maximum voltage of D6 is V1 + Vo = 511 V, and the

maximum peak current is V1dTs/Leq = 4.12 A.The maximum voltage of Q can be shown as follows, and

Uk is the voltage caused by the leakage inductor.

VDS(t) = Vo +1

n(Vof + VD)+ Uk = 556V (29)

The peak current of Q equals to the summation of input peakcurrent and the peak current of primary transformer, and it canbe obtained as follows

IQ = VodTs/Lp + V1d2Ts/Leq = 4.01A (30)


Table 1 Parameters of the AC/DC converter

Component Value Devicemodels

L1 7.55 mH —L2 282 uH —transformer ratio8:36, primary inductor is 220

uH—

C0 0.47 uF —C1 2.2 uF —C3 100 uF —C4 68 uF —D6 — F8L60D7 — F8L60Q — 7N60b

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Compared with the single-stage AC/DC converter in [8],since the design parameters of the flyback circuits arenearly the same, the maximum voltages of the switches arenearly the same for the AC/DC converter in [8] and theproposed AC/DC converter. But with the same calculatingmethod, the current in the switch in [8] is as high as 7 A,while the proposed single-stage AC/DC converter hasrelatively low current stress.The final parameters of the converter are shown in Table 1.As shown in Fig. 4, RLED is the sampling resistor for the

constant current control circuit, and its two sides areconnected to ISP side and ISN side of LT3756. The voltagebetween ISP and ISN equals the voltage of 5 kΩ resistor,then the voltage between ISP and ISN is 0.11 V. As aresult, the constant current control can be realised bydesigning the value of RLED. The current of the LED lampsis determined by the resistance between the ISP pin and theISN pin. Here, we define the voltage of CTRL pin isVCTRL. When VCTRL < 1.1 V, the output current can be

Fig. 7 Simulation results

a Voltage of switch and drive signalb Input voltage, input current and current of D6

c Output voltage of a single LED ringd Output current of a single LED ring


described as follows

ILED = VCTRL − 100mV

10RLED(31)

When VCTRL < 1.1 V, the output LED current can bedescribed as follows

ILED = 100mV

RLED(32)

Here, RLED = 0.28 Ω, then the LED output current can bedescribed as follows

ILED = 100mV

RLED= 100

0.28≃ 350 mA (33)

The design of the boost inductor should take the peak currentof the inductor, the working frequency and the input and theoutput voltages into consideration. The value of the inductorcan be calculated in (34). As shown in Fig. 4, here RSENSE isthe sampling resistance, VLED is the output voltage, since themaximum output voltage is 100 V. Here VLED is chosen to be80 V, and fOSC is the working frequency, and fOSC = 100 kHz.

LBoost =RSENSEVof (VLED − Vof )

0.02VLED fOSC(34)

Here, the equation should be satisfied as follows

RSENSE ≤ 0.07VIN

VLEDILED= 50× 0.07

80× 350× 10−3= 0.125V (35)


Fig. 8 Experimental results

a Input voltage and input currentb Input voltage and current of D6

c Drive voltage and drain to source voltage of Qd Output AC ripple

Fig. 9 Output voltage and output current

a Full load stateb Light load state

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Here, RSENSE = 0.04 Ω, and the boost inductor can becalculated from (34), and is chosen to be 375 µH in this paper.

6 Simulation and experimental results

Here Pspice is used to simulate the circuit. To realise the QRcontrol, the Pspice model of NCP1207 by On Semi isadopted. The simulation results are shown in Fig. 7. Fig. 7ashows the waveforms of the voltage of the switch and thedrive signal of Q, and we know that when the current of D7

is 0, the resonance begins, and when the voltage of theswitch reaches the first low voltage valley, the switch isturned on, and the ZVS is realised. Fig. 7b shows thewaveforms of the input voltage, input current and thecurrent of D6. It is evident that the sepic circuit works inthe DCM state, and the circuit can realise the PFC function.To simulate the constant current, the LTspice by LINEARis adopted, and the spice model of LT3756 is also usedhere. Figs. 7c and d show the output voltage and outputcurrent of the boost topology based on the peak currentcontrol. It is obvious that the system responses fast to thesteady state after powered on. The output voltage is 80 V,and the constant current is 350 mA in the steady state,which agrees to the analysis and the design process.Here, NCP1207 by On Semi is adopted to realise the QR

function. For a flyback circuit, the voltage valley can besampled from an auxiliary winding of the transformer of theflyback circuit. When the switch is turned on, the voltage isnegative. When the voltage valley comes, the voltage of theauxiliary winding is 0, so after the switch is turned off, ifthe voltage is smaller than a certain value, we think thatthe voltage valley has come. Here, the turn-on signal of theswitch is also sampled by an auxiliary. Fig. 8 showsthe experimental results of the converter. Fig. 8a shows theinput current and the input voltage of the converter. It is


evident that the input current can follow the input voltage,and it realises the PFC function. Fig. 8b shows thewaveforms of the input current and the current of D6, andwhich shows that the sepic circuit works in the DCM state.Fig. 8c shows the waveforms of the voltage between thedrain pole and the source pole of the switch and the drivesignal, and it could be seen that when the first low voltage


Fig. 10 Comparison chart of the harmonics in full load and thestandard IEC61000-3-2

Fig. 11 Efficiency comparison of the proposed LED driver withsepic circuit and LED driver in [8] with buck-boost circuit

Fig. 12 Test results of the PF and THD for the LED system

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valley comes, the switch is turned on, and the switchinglosses decrease. Fig. 8d shows the waveforms of the flybackcircuit, and it is evident that the voltage ripple is lessthan 1 V.Fig. 9 shows the output current and voltage of the constant

current circuit. Fig. 9a shows the output voltage and theoutput current in full load; the current is 350 mA; thevoltage is 80 V. Fig. 9b shows the waveforms of the outputcurrent and the output voltage in the light load state. Thecurrent keeps constant, which proves the correctness of thedesign. Fig. 10 shows the input harmonics componentscompared with IEC 61000-3-2 in full load, and they are allsatisfied with IEC 61000-3-2 standard.


Fig. 11 shows the efficiency comparison of the proposedLED driver with sepic circuit and LED driver in [8] withbuck-boost circuit. It is evident that when the load range isfrom 30% of full load to the full load, the efficiency isalways higher than 78%, and the efficiency of the proposedLED driver is always higher than the LED driver in [8].The test results of PF and THD for the proposed LEDdriver are shown in Fig. 12, in the full load state, the PF isas high as 0.992, the THD is as low as 6.9% and theefficiency is 83%. When the output power ranges from30 to 100 W, THD is within 10%, and the PF is alwayshigher than 0.99.

7 Conclusion

A novel two-stage street lighting system is proposed in thispaper. The front stage constitutes the sepic and flybackcircuit sharing a switch. Since the sharing switch works inquasi-resonant state, the switching loss of the systemdecreases and the efficiency can be improved. The secondstage is a constant current boost circuit which is working inthe peak current control mode, adopting LT3756 as thecontrol chip. In this system, both the PF and total harmonicfactor meet the IEC 61000-3-2 standard, and the overallefficiency is up to 83% in the full load condition.Considering the advantages of low cost and high reliability,the proposed system is suitable for LED lighting systems.

8 Acknowledgment

This work is supported by Research and Development ofApplied Technology Projects in Heilongjiang Provinceunder grant: GA13A403.

9 References

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www.ietdl.org
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two-stage led street lighting system based on a novel single-stage ac/dc converter

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