This content has been downloaded from IOPscience. Please scroll down to see the full text.

Download details:

IP Address: 54.39.106.173

This content was downloaded on 07/09/2020 at 23:14

Please note that terms and conditions apply.

Random Telegraph Signals inSemiconductor Devices

Random Telegraph Signals inSemiconductor Devices

Eddy SimoenImec, Leuven, Belgium

Cor ClaeysImec, Leuven, Belgium

IOP Publishing, Bristol, UK

ª IOP Publishing Ltd 2016

All rights reserved. No part of this publication may be reproduced, stored in a retrieval systemor transmitted in any form or by any means, electronic, mechanical, photocopying, recordingor otherwise, without the prior permission of the publisher, or as expressly permitted by law orunder terms agreed with the appropriate rights organization. Multiple copying is permitted inaccordance with the terms of licences issued by the Copyright Licensing Agency, the CopyrightClearance Centre and other reproduction rights organisations.

Permission to make use of IOP Publishing content other than as set out above may be soughtat permissions@iop.org.

Eddy Simoen and Cor Claeys have asserted their right to be identified as the authors of this workin accordance with sections 77 and 78 of the Copyright, Designs and Patents Act 1988.

ISBN 978-0-7503-1272-1 (ebook)ISBN 978-0-7503-1273-8 (print)ISBN 978-0-7503-1274-5 (mobi)

DOI 10.1088/978-0-7503-1272-1

Version: 20161001

IOP Expanding PhysicsISSN 2053-2563 (online)ISSN 2054-7315 (print)

British Library Cataloguing-in-Publication Data: A catalogue record for this book is availablefrom the British Library.

Published by IOP Publishing, wholly owned by The Institute of Physics, London

IOP Publishing, Temple Circus, Temple Way, Bristol, BS1 6HG, UK

US Office: IOP Publishing, Inc., 190 North Independence Mall West, Suite 601, Philadelphia,PA 19106, USA

Contents

Preface vii

Acknowledgments ix

Author biographies x

List of symbols xii

List of Greek symbols xvi

List of abbreviations xviii

1 Introduction 1-1

References 1-4

2 Random telegraph signal phenomenology 2-1

2.1 RTS time constants 2-2

2.1.1 The SRH framework 2-2

2.1.2 Trap energy, capture barrier and location from theSRH approach

2-8

2.1.3 Non-SRH behavior: Coulomb blockade effects 2-13

2.1.4 Tunneling transitions 2-18

2.2 RTS amplitude behavior 2-23

2.3 RTS in the gate current of a MOS device 2-27

2.4 RTS in the junction leakage current of a MOSFET 2-36

2.5 Multiple and complex RTS 2-39

References 2-42

3 RTS modeling, simulation and parameter extraction 3-1

3.1 Time constant modeling and simulation 3-1

3.2 Extraction trap position from RTS time constants 3-7

3.3 RTS amplitude modeling 3-16

3.4 Atomistic numerical modeling of the RTS amplitude 3-23

3.5 Novel measurement and analysis methods 3-29

3.6 Ab initio modeling of RTS in gate dielectrics 3-34

References 3-36

v

4 Impact device processing and scaling on RTS 4-1

4.1 Processing effects on RTS 4-1

4.2 RTS in fin-type architectures 4-9

4.3 Nanometric scaling aspects of RTS 4-11

4.3.1 Scaling trend RTS amplitude 4-11

4.3.2 Silicon GAA NWs 4-14

4.3.3 High-mobility channel materials 4-17

4.3.4 RTS in TFETs 4-19

4.4 RTS in ‘beyond-silicon’ devices 4-20

4.4.1 CNT FETs 4-20

4.4.2 Other advanced devices 4-25

References 4-26

5 Operational and reliability aspects of RTS 5-1

5.1 Switching AC operation of RTS 5-1

5.2 Impact of uniform and HC degradation 5-3

5.3 BTI and RTS: oxide trapping? 5-9

5.4 Statistical RTS measurement methods 5-16

5.5 Device and circuit simulation of dynamic variability 5-19

References 5-24

6 RTS in memory and imager circuits 6-1

6.1 RTS in flash and SRAM cells 6-1

6.2 RTS in DRAM and logic circuits 6-8

6.3 RTS in novel ReRAM and PCMs 6-10

6.4 RTS in CMOS imagers and CCDs 6-24

References 6-26

7 General conclusions 7-1

Random Telegraph Signals in Semiconductor Devices

vi

Preface

The fundamental importance of random telegraph signal (RTS) in submicrometer-area, scaled metal–oxide–semiconductor (MOS) transistors was realized soon aftertheir discovery and led to numerous publications in the field. This is related to thefact that RTS offers a unique opportunity to study single electrically active defects ina semiconductor device structure, enabling not only the unraveling of its properties(energy level and capture cross section), but also its physical position, with highspatial resolution. The recent efforts to explain the electrical oxide-trap propertiesfrom ab initio density functional theory calculations raise the hope that even achemical and structural identification of the responsible traps is within reach. Inaddition, as RTS is believed to be the basic component of 1/f noise, its discovery andstudy led in the early 1990s to a more refined correlated mobility number fluctuationtheory for 1/f noise in large-area MOS transistors, which is still the state-of-the-artmodel.

At the same time, the fact that the RTS phenomenon becomes more important forscaled devices and technologies raised practical concerns with respect to memoryoperation and reliability about a decade ago. This triggered the interest of themicroelectronics industry and led to a boost in publications on RTS beyond thepurely device physics community. RTS is still considered an important source ofdynamic variability in today’s complementary MOS (CMOS) technologies, andshould be accounted for in both device and circuit operation. This has led tostrategies to mitigate or suppress the phenomenon, either based on process/designoptimization or by developing optimal circuit operation schemes. In addition tobeing a root cause of 1/f noise, it has been shown in the past decade that RTS isintimately connected to the reliability of scaled CMOS transistors, namely, to theso-called bias-temperature instability. The study of RTS has also caused a paradigmshift in the concept of reliability from a purely deterministic description to astochastic one.

In more recent years, RTS has also been observed in devices beyond CMOS, suchas carbon nanotube transistors, tunnel field-effect transistors, novel metal–oxidebased resistive random access memories, etc, and it is also expected to be prominentin other future nanometric devices because of the nature of the phenomenon: scaledtransistors will become more sensitive to the presence of single defects or impurities,which are beyond today’s technological control. In fact, one may even hope tobenefit from RTS, not only for fundamental defect studies, but perhaps to developsingle-atom switches or memories.

Surprisingly, so far no textbook has been prepared on the topic of RTS insemiconductor devices—only some excellent review papers in journals. Therefore,we feel that there is a need for a more extensive and comprehensive work on thistopic. It is the intention of the book to provide a detailed description of the physicsand modeling of RTS in semiconductor devices and circuits. At the same time, it isassumed that the reader has a solid background in semiconductor device physics(MOS transistors, p–n junctions). A basic knowledge of semiconductor processing is

vii

also useful. Whenever necessary, references to relevant textbooks or review paperswill be provided. For more novel types of devices, a brief description of theunderlying physics and operation principles will be given, without becomingexhaustive, since the focus of this book is on the RTS phenomenon.

We hope that this book will contribute to a better understanding of RTS insemiconductor devices and may trigger new ideas and research in the field.

Random Telegraph Signals in Semiconductor Devices

viii

Acknowledgments

Many colleagues contributed over the years to our work on low-frequency noise andRTS studies. In particular, we would like to thank the contributions of H Achour,M Aoulaiche, B Dierickx, Carin, B Cretu, M G C de Andrade, S D dos Santos,W Fang, P Fazan, N P Garbar, W Guo, N Horiguchi, M Jurczak , B Kaczer, J WLee, J Luo, U Magnussen, J A Martino, A Mercha, M V Petrichuk, J Sikula,M Toledano Luque, G Van den Bosch, P Vasina, C Zhao.

ix

Author biographies

Eddy Simoen

Eddy Simoen obtained his bachelor’s (1976–78) and master’s degrees(1978–80) in physics engineering, and his PhD in engineering (1985)from Ghent University (Belgium). He is currently a specialist atIMEC (Leuven, Belgium), involved in the study of defect and strainengineering in high mobility and epitaxial substrates, and defectstudies in germanium and III–V compounds (AlN, GaN, InP, etc).Another current focus is the study of one-transistor memories based

on bulk FinFET and ultra-thin buried oxide silicon-on-insulators, usinglow-frequency noise. In 2013 Simoen was nominated as a part-time professor atGhent University in the field of study of the impact of defects on semiconductordevices. He is a member of IEEE and ECS, and became an ECS Fellow in 2016. Inthese fields he has (co-)authored over 1500 journal and conference papers and, inaddition, 12 book chapters and a monograph on Radiation Effects in AdvancedSemiconductor Devices and Materials (2002, Springer), the Chinese translation ofwhich was published in 2008. He was also a co-editor of the book Germanium-basedTechnologies—FromMaterials to Devices (2007, Elsevier; Chinese translation 2010).Another book, the Fundamental and Technological Aspects of Extended Defects inGermanium, was published by Springer 2009. Simoen is also the co-inventor of twopatents.

Cor Claeys

Cor Claeys received his PhD from KU Leuven in Belgium, where hehas been a professor since 1990. At IMEC he is currently Director ofAdvanced Semiconductor Technologies responsible for strategicrelations. His main interests are silicon technology, device physics,low-frequency noise phenomena, radiation effects, defectengineering and material characterization. He has co-edited thebooks Low Temperature Electronics (2001, Elsevier) andGermanium-Based Technologies—From Materials to Devices (2007,

Elsevier) and has written monographs on Radiation Effects in AdvancedSemiconductor Materials and Devices (2002, Springer) and Fundamental andTechnological Aspects of Extended Defects in Germanium (2009, Springer). He hasauthored and co-authored 14 book chapters, over 1000 conference presentations andmore than 1200 technical papers. He has also been the editor or co-editor of 60conference proceedings. Claeys is a fellow of the Electrochemical Society and ofIEEE. He was the founder of the IEEE Electron Devices Benelux Chapter, Chair ofthe IEEE Benelux Section, an elected AdCom Member of the Electron Devices

x

Society and the EDS Vice President for Chapters and Regions. He was EDSPresident in 2008–9 and the Division Director on the IEEE Board of Directors in2012–13. Claeys is a recipient of the IEEE Third Millennium Medal and in 2013 hereceived the IEEE EDS Distinguished Service Award. Within the ElectrochemicalSociety he was Chair of the Electronics & Photonics Division from 2001 to 2003,and in 2004 received the Electronics & Photonics Division Award.

Random Telegraph Signals in Semiconductor Devices

xi

List of symbols

A m2 AreaAm Vm Dynamic matching parameterARTS Normalized RTS amplitudeb m−1 Variation parameter in the electron wave-functionCD F m−2 Depletion layer capacitance per unit areaCG F m−2 Gate capacitance per unit areaCinv F m−2 Inversion layer capacitance per unit areaCox F m−2 Oxide capacitance per unit aread m Tunnel depthdCNT m Diameter of the carbon nanotube deviceDit m−2 eV−1 Density of interface trapsdNW m Diameter of the nanowireDT m−2 Trap density in de the depletion layerEa eV Activation energyEb eV Binding energy of a carrier in a trapEB eV Energy barrier for carrier captureEC eV Conduction band minimumEcap eV Activation energy for capturingECoul eV Coulomb energyECox eV Conduction band minimum in oxideECT eV Gibbs free energyEem eV Activation energy for emissionEFn eV Quasi Fermi level for electronsEFp eV Quasi Fermi level for holesEF eV Surface Fermi levelEG eV Band gap energyEGR eV Activation energy to create a hole at the interface in siliconEhop eV Energy barrier for electron hoppingErelax eV Energy related to the displacement of lattice atomsET eV Energy level in the band gapEV eV Valence band maximumEZ eV Zeeman energyE0 eV Electronic part of the energy due to a trapping eventf Hz Frequencyfmax Hz Maximum integration frequencyfmin Hz Minimum integration frequencyfT Trap occupancy by an electronF V m−1 Electric fieldFox V M−1 Oxide electric fieldFs V m−1 Surface electric fieldfT Trap occupancy by an electrong Trap degeneracy factorgm Ω−1 Transconductance

xii

G Ω−1 ConductanceGD Ω−1 Drain conductanceh Js Planck’s constantHCT eV Enthalpy of a trapHFin m Fin heightIB A Substrate currentIdir-tunn A Direct-tunneling currentIEDT A Gate edge tunnel currentId A Displacement currentID A Drain currentIDT A Direct tunnel currentIG A Gate currentIGIDL A Gate-induced drain leakage currentIloc A Local current around a trapIHRS A Current in the high resistance stateIREAD A Read current in memory cellIsat A Saturation currentISILC A Stress-induced leakage currentITE A Current top electrodek J K−1 Boltzmann constantL m Gate lengthLC m Screening length by the 2DEGLeff m Effective gate lengthLt m Trap length of a square-shaped trap areaLto m Trap length of a charge square-shaped trap aream*

e kg Electron effective massm*

h kg Hole effective massml kg Longitudinal effective massmox kg Electron effective mass in SiO2

mt kg Transversal effective massmvar A Average value of a variablen m−3 Carrier concentrationN m−3 Number of carriers in the channelNa m−3 Substrate doping concentration (nMOS)NC m−3 Density of states in the conduction bandND m−3 Doping densityNot m−2 Density of oxide trapsNRTS Number of RTSsns m−2 Surface carrier concentrationnt Number of trapsNt m−3 Density of trapsNV m−3 Density of states in the valence bandPC Capture probabilityPetun Capture probability by tunnelingPhtun Hole tunneling probabilityq C Electron charge

Random Telegraph Signals in Semiconductor Devices

xiii

q* C Effective trap charge including Coulomb repulsionQB C cm−2 Bulk charge densityQG C Image chargeQinv C m−2 Inversion charge densityQn C m−2 Channel charge densityr m Distance from a trapr0 m Distance between two trapsR m Radius of a circular deviceRc Coupling coefficientRD Ω Channel resistanceRe s−1 Capture rate of an electronRgen s−1 Carrier generation rateRh s−1 Capture rate of a holeRQ m Radial charge positionRS Ω Channel resistanceRthr s−1 Rate of thermal excitations Trap polarityS J K−1 EntropyS0 Huang Rhys factor related to the lattice couplingSIG A2 Hz−1 Gate-current noise spectral densitySS V/dec Subthreshold swingSVG V2 Hz−1 Input-referred voltage noise spectral densityt s TimeT K Temperaturetb m Barrier thicknesstdp m Thickness of polysilicon depletion layertdp m Polysilicon depletionTe K Electron temperatureth s Time in the RTS high statetHK m High-κ dielectric layer thicknesstIL m Interfacial layer thicknesstinv m Inversion layer thicknesstl s Time in the RTS low statetox m Oxide thicknesstqm m Carriers centroid offset due to inversion layer quantum effectstrelax s Relaxation timetrise s Rise timetRW s Period of random walk RTSts s Sampling timetstress s Stress timeVBS V Substrate voltageVc V Voltage difference between the quasi Fermi levelsVDS V Drain voltageVDSFmax V Drain voltage for maximum τc/τe ratio in forward operationVDSRmax V Drain voltage for maximum τc/τe ratio in reverse operationVFB V Flat-band voltage

Random Telegraph Signals in Semiconductor Devices

xiv

VGS V Gate voltageVGS-back V Gate voltage of the back transistorVGS-front V Gate voltage of the front transistorVGS0 V Gate voltage where τc = τevn m s−1 Carrier velocityVoxe V Potential barrier for an electron from Si to SiO2

Voxh V Potential barrier for a hole from Si to SiO2

Vread V Read voltageVrelax V Relaxation gate voltageVreset V Reset voltageVstress V Stress gate voltageVT V Threshold voltageVTE V Voltage top electrodevthn m s−1 Thermal velocity for electronsvthp m s−1 Thermal velocity for holesw m Width depletion layerW m Gate widthWeff m Effective gate widthWFin m Fin widthWt m Width of a trapxT m Trap depth from the interfacexT

CL m Trap depth from the interface (classical calculation)xT

QM m Trap depth from the interface (quantum mechanical calculation)yT m Lateral trap position in the channelZeff m Effective trap position in the dielectric in the HRS

Random Telegraph Signals in Semiconductor Devices

xv

List of Greek symbols

αc V-1 Coupling factor between capture time constant and gate voltageαe V-1 Coupling factor between emission time constant and gate voltageαsc Vs Scattering coefficientαt m Tunneling parameterγc s−1 Tunnel rate for captureγe s−1 Tunnel rate for emissionγ1s Percolation area coefficient in subthreshold regimeγ1 Percolation area coefficient in inversion regimeΔ Tunneling matrix elementΔID A RTS amplitudeε0 F cm−1 Permittivity of the free spaceεeff F cm−1 Effective permittivityεHK Dielectric constant of high-κ dielectricεIL Dielectric constant of interfacial layerεox Dielectric constant of SiO2

εsem Dielectric constant of the semiconductorεSi Dielectric constant of siliconηBOX V RTS voltage amplitude in buried oxideηGOX V RTS voltage amplitude in (front) gate oxideηο V RTS voltage amplitude (before electrical stress)ηstress V RTS voltage amplitude (after electrical stress)κ Dielectric constantλ m Tunnel parameterλc m Tunneling depth for capturingλe m Tunneling depth for emissionλ0 Slope of the RTS scaling trendμ m2 V−1 s−1 Mobilityμ0 m2 V−1 s−1 Low field mobilityσ Ω−1 Channel conductivityσc m2 Effective capture cross sectionσh m2 Capture cross section for holesσIR A Standard deviation in the read current of an RRAM cellσn m2 Capture cross section for electronsσno m2 Capture cross section at the interface for electronsσvar A Standard deviation of a variableσt Ω−1 Conductivity around a charged trapσ0 m2 Temperature independent cross-section pre-factorτc s Capture time constantτ BcA

s Capture time constant of trap A with trap B empty

τcAB s Capture time constant of trap A with trap B occupiedτe s Emission time constantτtc s Capture time via a tunnel processτte s Emission time via a tunnel process

xvi

τ1 s Average time constantϕe V Electron affinity difference between Si and SiO2

ϕ V Trap potentialΨs V Band bending at the semiconductor surfaceδΨs

T V Surface potential shift near a trap

ϖ s−1 Phonon frequency

Random Telegraph Signals in Semiconductor Devices

xvii

List of abbreviations

AC Alternating currentAHT As-grown hole trapBD BreakdownBOX Buried oxideBTI Bias-temperature instabilityCB Conduction bandCC Configuration coordinateCCD Charge-coupled deviceCESL Contact etch stop layerCET Capacitance equivalent thicknessCEMT Capture/emission timeCF Conducting filamentCMOS Complementary metal–oxide–semiconductorCNT Carbon nanotubeDC Direct currentDCR Dark count rateDF Duty factorDFT Density functional theoryDLTS Deep level transient spectroscopyDRAM Dynamic random access memoryEDT Edge direct tunnelingENOT Effective number of trapsEOT Equivalent oxide thicknessET Extremely thinFD Fully depletedFDSOI Fully depleted silicon-on-insulatorFET Field-effect transistorFF FinFETFG Floating gateFGA Forming gas annealingFHMM Factorial hidden Markov modelFUSI Fully silicidedGAA Gate-all-aroundGD Generated defectGIDL Gate-induced drain leakageGR Generation–recombinationHBD Hard breakdownHC Hot carrierHCI Hot carrier injectionHRS High-resistance stateHTFGA High-temperature forming gas annealingICP Inductively coupled plasmaIL Interfacial layerITRS International Technology Roadmap for SemiconductorsJL Junctionless

xviii

LER Line edge roughnessLFN Low frequency noiseLOCOS Local oxidation of siliconLRS Low resistance stateMC Monte CarloMGG Metal gate granularityMOSFET Metal–oxide–semiconductor field-effect transistorMPTAT Multi-phonon trap-assisted tunnelingNBTI Negative bias-temperature instabilityNVM Non-volatile memoryNW NanowireNWFET Nanowire FETPBTI Positive bias-temperature instabilityPCM Phase change memoryPP Percolation pathPSD Power spectral densityPV Process variabilityP/E Program/eraseRDF Random doping fluctuationReRAM Resistive random access memoryRMG Replacement metal gateRTA Rapid thermal annealingRTN Random telegraph noiseRTS Random telegraph signalRW Random walkSBD Soft breakdownS/D Source/drainSDRAM Synchronous dynamic random access memorySET Single-electron transistorSHR Shockley–Read–HallSILC Stress-induced leakage currentSNWT Silicon nanowire transistorSOI Silicon-on-insulatorSON Silicon-on-nothingSPAD Single-photon avalanche photodiodeSPICE Simulation program with integrated circuit emphasisSRAM Static random access memorySS Subthreshold swingSTI Shallow trench isolationSTID Single-trap-induced degradationSTM Scanning tunneling microscopyTAT Trap-assisted tunnelingTCAD Technology computer-aided designTDDS Time-dependent defect spectroscopyTEG Test element groupTFET Tunnel FETTLF Two-level fluctuationTLP Time-lag plot

Random Telegraph Signals in Semiconductor Devices

xix

TSS Two-state systemVB Valence bandVJL Variable junction leakageWF Work functionWID Within dieWKB Wentzel–Kramers–Brillouin2DEG Two-dimensional electron gas

Random Telegraph Signals in Semiconductor Devices

xx