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Page 1: The The 8051 8051 Microcontroller ...eeedrmcet.zohosites.com/files/III Year/SEM 5/MPMC/MPMC A/MPMC_L… · an an 8051 8051 programprogram ... debuggers, C compilers, emulator, simulator,

The The 8051 8051 Microcontroller architectureMicrocontroller architecture

Page 2: The The 8051 8051 Microcontroller ...eeedrmcet.zohosites.com/files/III Year/SEM 5/MPMC/MPMC A/MPMC_L… · an an 8051 8051 programprogram ... debuggers, C compilers, emulator, simulator,

Contents:Contents:IntroductionIntroduction

Block Diagram and Block Diagram and Pin Description of the Pin Description of the 80518051

RegistersRegisters

Some Simple InstructionsSome Simple Instructions

Structure of Assembly language and Running Structure of Assembly language and Running an an 8051 8051 programprogram

Memory mapping in Memory mapping in 8051 8051 Memory mapping in Memory mapping in 8051 8051

8051 8051 Flag bits and the PSW registerFlag bits and the PSW register

Addressing ModesAddressing Modes

1616--bit, BCD and Signed Arithmetic in bit, BCD and Signed Arithmetic in 80518051

Stack in the Stack in the 80518051

LOOP and JUMP InstructionsLOOP and JUMP Instructions

CALL InstructionsCALL Instructions

I/O Port ProgrammingI/O Port Programming

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1.1. meeting the computing needs of the task efficiently and cost meeting the computing needs of the task efficiently and cost

effectivelyeffectively

•• speed, the amount of ROM and RAM, the number of I/O ports speed, the amount of ROM and RAM, the number of I/O ports

and timers, size, packaging, power consumptionand timers, size, packaging, power consumption

•• easy to upgradeeasy to upgrade

Three criteria in Choosing a Microcontroller

•• easy to upgradeeasy to upgrade

•• cost per unitcost per unit

2.2. availability of software development toolsavailability of software development tools

•• assemblers, debuggers, C compilers, emulator, simulator, assemblers, debuggers, C compilers, emulator, simulator,

technical supporttechnical support

3.3. wide availability and reliable sources of the microcontrollers.wide availability and reliable sources of the microcontrollers.

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The 8051 microcontrollerThe 8051 microcontroller

�� a a Harvard architectureHarvard architecture (separate instruction/data (separate instruction/data memories)memories)

�� single chip single chip microcontrollermicrocontroller (µC) (µC)

�� developed by developed by IntelIntel in in 1980 1980 for use in for use in embedded embedded �� developed by developed by IntelIntel in in 1980 1980 for use in for use in embedded embedded systemssystems. .

�� today largely superseded by a vast range of faster today largely superseded by a vast range of faster and/or functionally enhanced and/or functionally enhanced 80518051--compatible compatible devices manufactured by more than devices manufactured by more than 20 20 independent manufacturers independent manufacturers

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Block DiagramBlock Diagram

On-chip

RAM

On-chip

ROM for

program

code Timer 0

Interrupt

Control

External interrupts

Timer 1

Timer/Counter

Counter

Inputs

CPU

4 I/O PortsSerial

PortOSCBus

Control

TxD RxDP0 P1 P2 P3

Address/Data

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FeatureFeature 8051 8052 80318051 8052 8031

ROM (program space in bytes) 4K 8K 0KROM (program space in bytes) 4K 8K 0K

RAM (bytes) 128 256 128RAM (bytes) 128 256 128

Timers 2 3 2Timers 2 3 2

Comparison of the 8051 Family Members

Timers 2 3 2Timers 2 3 2

I/O pins 32 32 32 I/O pins 32 32 32

Serial port 1 1 1 Serial port 1 1 1

Interrupt sources 6 8 6 Interrupt sources 6 8 6

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Page 8: The The 8051 8051 Microcontroller ...eeedrmcet.zohosites.com/files/III Year/SEM 5/MPMC/MPMC A/MPMC_L… · an an 8051 8051 programprogram ... debuggers, C compilers, emulator, simulator,

Pin Description of the 8051Pin Description of the 8051

123456789

403938373635343332

P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7RST

VccP0.0(AD0)P0.1(AD1)P0.2(AD2)P0.3(AD3)P0.4(AD4)P0.5(AD5)P0.6(AD6)P0.7(AD7)

8051

(8031)

91011121314151617181920

323130292827262524232221

RST(RXD)P3.0(TXD)P3.1

(T0)P3.4(T1)P3.5

XTAL2XTAL1

GND

(INT0)P3.2

(INT1)P3.3

(RD)P3.7(WR)P3.6

P0.7(AD7)

EA/VPPALE/PROG

PSENP2.7(A15)P2.6(A14)P2.5(A13)P2.4(A12)P2.3(A11)P2.2(A10)P2.1(A9)P2.0(A8) ⌦

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Pins of 8051Pins of 8051((1/41/4))

�� VccVcc((pin 40pin 40):):

�� Vcc provides supply voltage to the chip. Vcc provides supply voltage to the chip.

�� The voltage source is +5V.The voltage source is +5V.

�� GNDGND((pin 20pin 20):):groundground

�� XTAL1 and XTAL2XTAL1 and XTAL2((pins 19,18pins 19,18):):�� XTAL1 and XTAL2XTAL1 and XTAL2((pins 19,18pins 19,18):):

�� These 2 pins provide external clock.These 2 pins provide external clock.

�� Way 1Way 1::using a quartz crystal oscillatorusing a quartz crystal oscillator

�� Way 2Way 2::using a TTL oscillator using a TTL oscillator

�� Example 4Example 4--1 shows the relationship between XTAL 1 shows the relationship between XTAL and the machine cycle. and the machine cycle.

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Pins of Pins of 80518051((22//44))

�� RSTRST((pin 9pin 9):):resetreset

�� It is an input pin and is active highIt is an input pin and is active high((normally lownormally low))..

�� The high pulse must be high at least 2 machine cycles.The high pulse must be high at least 2 machine cycles.

�� It is a powerIt is a power--on reset.on reset.

�� Upon applying a high pulse to RST, the microcontroller will Upon applying a high pulse to RST, the microcontroller will �� Upon applying a high pulse to RST, the microcontroller will Upon applying a high pulse to RST, the microcontroller will

reset and all values in registers will be lost.reset and all values in registers will be lost.

�� Reset values of some 8051 registers Reset values of some 8051 registers

�� Way 1Way 1::PowerPower--on reset circuit on reset circuit

�� Way 2Way 2::PowerPower--on reset with debounce on reset with debounce

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Pins of 8051Pins of 8051((3/43/4))

�� /EA/EA((pin 31pin 31):):external accessexternal access

�� There is no onThere is no on--chip ROM in 8031 and 8032 .chip ROM in 8031 and 8032 .

�� The /EA pin is connected to GND to indicate the code is stored The /EA pin is connected to GND to indicate the code is stored

externally.externally.

�� /PSEN /PSEN && ALE are used for external ROM.ALE are used for external ROM.�� /PSEN /PSEN && ALE are used for external ROM.ALE are used for external ROM.

�� For 8051, /EA pin is connected to Vcc.For 8051, /EA pin is connected to Vcc.

�� “/” means active low.“/” means active low.

�� /PSEN/PSEN((pin 29pin 29):):program store enableprogram store enable

�� This is an output pin and is connected to the OE pin of the ROM.This is an output pin and is connected to the OE pin of the ROM.

�� See Chapter 14.See Chapter 14.

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Pins of 8051Pins of 8051((4/44/4))

�� ALEALE((pin pin 3030):):address latch enableaddress latch enable

�� It is an output pin and is active high.It is an output pin and is active high.

�� 8051 8051 port port 0 0 provides both address and data.provides both address and data.

�� The ALE pin is used for deThe ALE pin is used for de--multiplexing the address and data by multiplexing the address and data by

connecting to the G pin of the connecting to the G pin of the 7474LSLS373 373 latch.latch.connecting to the G pin of the connecting to the G pin of the 7474LSLS373 373 latch.latch.

�� I/O port pinsI/O port pins

�� The four ports PThe four ports P00, P, P11, P, P22, and P, and P33..

�� Each port uses Each port uses 8 8 pins.pins.

�� All I/O pins are biAll I/O pins are bi--directional.directional.

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Figure 4Figure 4--2 (a). XTAL Connection to 80512 (a). XTAL Connection to 8051

XTAL1�� Using a quartz crystal oscillatorUsing a quartz crystal oscillator

�� We can observe the frequency on the XTAL2 pin.We can observe the frequency on the XTAL2 pin.

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Figure Figure 44--2 2 (b). XTAL Connection to an External Clock (b). XTAL Connection to an External Clock

SourceSource

NC

EXTERNAL

OSCILLATOR

XTAL2

XTAL1

�� Using a TTL oscillatorUsing a TTL oscillator

�� XTAL2 is unconnected.XTAL2 is unconnected.OSCILLATOR

SIGNALXTAL1

GND

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RESET Value of Some RESET Value of Some 8051 8051 Registers:Registers:

00000000ACCACC

00000000PCPC

Reset ValueReset ValueRegisterRegister

00000000DPTRDPTR

00070007SPSP

00000000PSWPSW

00000000BB

RAM are all zero.RAM are all zero.⌦

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Figure Figure 44--3 3 (a). Power(a). Power--On RESET CircuitOn RESET Circuit

30 pF

10 uF

+

Vcc

EA/VPPX1

31

1930 pF

30 pF

8.2 K11.0592 MHz

X1

X2

RST

19

18

9

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Figure 4Figure 4--3 (b). Power3 (b). Power--On RESET with DebounceOn RESET with Debounce

EA/VPP

X1

Vcc

10 uF 30 pF

31

X2RST

10 uF

8.2 K

30 pF

9

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Pins of I/O PortPins of I/O Port

�� The The 8051 8051 has four I/O portshas four I/O ports

�� Port Port 0 0 ((pins pins 3232--3939):):PP00((PP00..00~~PP00..77))

�� Port Port 11((pins pins 11--88)) ::PP11((PP11..00~~PP11..77))

�� Port Port 22((pins pins 2121--2828):):PP22((PP22..00~~PP22..77))

�� Port Port 33((pins pins 1010--1717):):PP33((PP33..00~~PP33..77))�� Port Port 33((pins pins 1010--1717):):PP33((PP33..00~~PP33..77))

�� Each port has Each port has 8 8 pinspins..

�� Named PNamed P00.X .X ((X=X=00,,11,...,,...,77)), P, P11.X, P.X, P22.X, P.X, P33.X.X

�� ExEx::PP00..0 0 is the bit is the bit 00((LSBLSB))of Pof P0 0

�� ExEx::PP00..7 7 is the bit is the bit 77((MSBMSB))of Pof P00

�� These These 8 8 bits form a byte.bits form a byte.

�� Each port can be used as input or output (biEach port can be used as input or output (bi--direction).direction).⌦

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Registers

A

B

R0

R1

R2

DPH DPL

PC

DPTR

PC

R3

R4

R2

R5

R7

R6

PCPC

Some 8051 16-bit Register

Some 8-bitt Registers of

the 8051

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Memory Map (RAM)Memory Map (RAM)

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CPU timingCPU timing

� Most 8051 instructions are executed in one cycle.

� MUL (multiply) and DIV (divide) are the only

� instructions that take more than two cycles to complete (four cycles)

� Normally two code bytes are fetched from the program memory � Normally two code bytes are fetched from the program memory during every machine cycle.

� The only exception to this is when a MOVX instruction is executed. MOVX is a one-byte, 2-cycle instruction that accessesexternal data memory.

� During a MOVX, the two fetches in the second cycle are skipped while the external data memory is being addressed and strobed.

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8051 machine cycle8051 machine cycle

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Example :Example :

Find the machine cycle forFind the machine cycle for

(a) XTAL = 11.0592 MHz (a) XTAL = 11.0592 MHz

(b) XTAL = 16 MHz.(b) XTAL = 16 MHz.

Solution:Solution:

Solution:Solution:

(a) 11.0592 MHz / 12 = 921.6 kHz;(a) 11.0592 MHz / 12 = 921.6 kHz;

machine cycle = 1 / 921.6 kHz = 1.085 machine cycle = 1 / 921.6 kHz = 1.085 µµss

(b) 16 MHz / 12 = 1.333 MHz;(b) 16 MHz / 12 = 1.333 MHz;

machine cycle = 1 / 1.333 MHz = 0.75 machine cycle = 1 / 1.333 MHz = 0.75 µµss

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Edsim51 emulator diagramEdsim51 emulator diagram

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KitCONKitCON--515 schematic515 schematic

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TimersTimers

�� 8051 has two 8051 has two 1616--bit bit onon--chip timers that can be chip timers that can be used for timing durations or for counting used for timing durations or for counting external eventsexternal events

�� The high byte for timer 1 (TH1) is at address The high byte for timer 1 (TH1) is at address �� The high byte for timer 1 (TH1) is at address The high byte for timer 1 (TH1) is at address 8DH while the low byte (TL1) is at 8BH8DH while the low byte (TL1) is at 8BH

�� The high byte for timer 0 (TH0) is at 8CH while The high byte for timer 0 (TH0) is at 8CH while the low byte (TL0) is at 8AH.the low byte (TL0) is at 8AH.

�� Timer Mode Register (TMOD) is at address Timer Mode Register (TMOD) is at address 88H 88H

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Timer Mode RegisterTimer Mode Register

�� Bit Bit 77: : Gate bit; when set, timer only runs while Gate bit; when set, timer only runs while \\INT high. INT high. (T(T00))

�� Bit Bit 66: : Counter/timer select bit; when set timer is an event Counter/timer select bit; when set timer is an event ccounter when cleared timer is an interval ounter when cleared timer is an interval ttimerimer (T(T00))

�� Bit Bit 55: Mode bit : Mode bit 1 1 (T(T00))�� Bit Bit 55: Mode bit : Mode bit 1 1 (T(T00))

�� Bit Bit 44: Mode bit : Mode bit 0 0 (T(T00))

�� Bit Bit 33: : Gate bit; when set, timer only runs while Gate bit; when set, timer only runs while \\INT high. INT high. (T(T11))

�� Bit Bit 22: : Counter/timer select bit; when set timer is an event Counter/timer select bit; when set timer is an event ccounter when cleared timer is an interval ounter when cleared timer is an interval ttimerimer (T(T11))

�� Bit Bit 11: Mode bit : Mode bit 1 1 (T(T11))

�� Bit Bit 00: Mode bit : Mode bit 0 0 (T(T11))

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Timer ModesTimer Modes

�� M1M1--M0: 00 (Mode 0) M0: 00 (Mode 0) –– 1313--bit mode (not bit mode (not

commonly used)commonly used)

�� M1M1--M0: 01 (Mode 1) M0: 01 (Mode 1) -- 1616--bit timer mode bit timer mode

�� M1M1--M0: 10 (Mode 2) M0: 10 (Mode 2) -- 88--bit autobit auto--reload modereload mode�� M1M1--M0: 10 (Mode 2) M0: 10 (Mode 2) -- 88--bit autobit auto--reload modereload mode

�� M1M1--M0: 11 (Mode 3) M0: 11 (Mode 3) –– Split timer modeSplit timer mode

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8051 Interrupt Vector Table8051 Interrupt Vector Table

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The Stack and Stack PointerThe Stack and Stack Pointer

�� The Stack Pointer, like all registers except DPTR and PC, may hold an The Stack Pointer, like all registers except DPTR and PC, may hold an 88--bit (bit (11--byte) byte) value. value.

�� The Stack Pointer is used to indicate where the next value to be removed from the The Stack Pointer is used to indicate where the next value to be removed from the stack should be taken from.stack should be taken from.

�� When you push a value onto the stack, the When you push a value onto the stack, the 8051 8051 first increments the value of SP and first increments the value of SP and then stores the value at the resulting memory location.then stores the value at the resulting memory location.

�� When you pop a value off the stack, the When you pop a value off the stack, the 8051 8051 returns the value from the memory returns the value from the memory location indicated by SP, and then decrements the value of SP.location indicated by SP, and then decrements the value of SP.location indicated by SP, and then decrements the value of SP.location indicated by SP, and then decrements the value of SP.

�� This order of operation is important. When the This order of operation is important. When the 8051 8051 is initialized SP will be initialized is initialized SP will be initialized to to 0707h. If you immediately push a value onto the stack, the value will be stored in h. If you immediately push a value onto the stack, the value will be stored in Internal RAM address Internal RAM address 0808h. This makes sense taking into account what was mentioned h. This makes sense taking into account what was mentioned two paragraphs above: First the two paragraphs above: First the 8051 8051 will increment the value of SP (from will increment the value of SP (from 0707h to h to 0808h) h) and then will store the pushed value at that memory address (and then will store the pushed value at that memory address (0808h).h).

�� SP is modified directly by the SP is modified directly by the 8051 8051 by six instructions: PUSH, POP, ACALL, LCALL, by six instructions: PUSH, POP, ACALL, LCALL, RET, and RETI. It is also used intrinsically whenever an interrupt is triggeredRET, and RETI. It is also used intrinsically whenever an interrupt is triggered