text book: silicon vlsi technology fundamentals, practice...
TRANSCRIPT
Crystal Growth, Si Wafers- Chapter 3
Text Book:Silicon VLSI Technology
Fundamentals, Practice and Modelingg
Authors: J. D. Plummer, M. D. Deal, and P. B. Griffina d G
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
Crystal Growth, Si Wafers- Chapter 3
Crystal Growth, Wafer Fab and PropertiesProperties
• High Quality Single Crystal Wafers
• Diameter• Thickness• Thickness• Flatness• Mechanical defects (scratches)( )• Crystallographic Defects (dislocation density)• Crystal Orientation • Impurity Level• Dopant Type and Density-Resistivity
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
2
Crystal Growth, Si Wafers- Chapter 3
Silicon Structure Classification
• Single Crystal – periodic arrangement of atomsP l t lli ll t l f bit li t• Polycrystalline – small crystals of arbitrary alignment
• Amorphous Silicon – no significant ordering of atoms
• Simple Crystal Unit Cells– Cubic– Body-Centered Cubic (extra atom in the body)– Face-Centered Cubic (extra atoms centered on faces)
za
z z
y
a
y
a
y
aB
C
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
3x x x
A
Cubic BCC FCC
Crystal Growth, Si Wafers- Chapter 3
Crystal Planes• Planes and directions are defined using an x, y, z
coordinate system.– [111] direction is defined by a vector having components of 1
unit in x, y and z.
• Planes are defined by Miller indicesy– Defined as the reciprocals of the intercepts of the plane with
the x, y and z axes.
z z
y
za
za
y
za [111](100) plane (110) plane
y y y
[110] (111) plane
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
4
x x x[100][ ] (111) plane
Crystal Growth, Si Wafers- Chapter 3
Silicon Lattice
• Diamond cubic latticeT o merged FCC– Two merged FCC lattices with the origin of the second offset from the first by a/4 infrom the first by a/4 in all three directions
– Covalent bonding to four nearestfour nearest neighbors
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
5
Crystal Growth, Si Wafers- Chapter 3
Semiconductor Lattices
• 3D Model of unit cells for semiconductorshttp://jas eng buffalo edu/education/solid/unitCell/home htmlhttp://jas.eng.buffalo.edu/education/solid/unitCell/home.html– from: http://jas.eng.buffalo.edu/index.html
multiple semiconductor applets
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
6
Crystal Growth, Si Wafers- Chapter 3
Silicon Surface Plane Differences
• Bulk properties are generally isotropic with the symmetric latticesymmetric lattice
• Dopant diffusion is independent as long as surfaces play no rile in the process.p y p– However, real devices are built near surfaces.– The plane that the surface terminates on can then make a
difference.difference.– [111] has the highest number of atoms per cm2
– [100] has the lowest (dominant type used)Concerns– Concerns:
• Oxidation rates, surface defect density, “near” surface diffusion
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
7
Crystal Growth, Si Wafers- Chapter 3
Defects in Crystals
• Various types of defects can exist in crystal (or can be created by processing steps In general these arebe created by processing steps. In general these are detrimental to device performance.
Linear Defects:Di l ti d t
Volume Defects:Agglomeration of point
V Stacking Fault
Dislocation due to high stress or rapid thermal gradients
defectsPrecipitate of dopants
Point Defects:V missing/vacancyI extra atom/interstitialcy
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
8
I Dislocation Precipitate
Crystal Growth, Si Wafers- Chapter 3
Stacking Fault
• Form along the {111} planeThe insertion or remo al of an e tra {111} plane– The insertion or removal of an extra {111} plane
– Normally referred to as ABCABC…– Extrinsic adds a plane ABCACBC… (excess interstitials)
• Dominant type• Oxidation Induced Stacking Faults
– Intrinsic if a plane is missing ABCABABC…
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
9
Crystal Growth, Si Wafers- Chapter 3
Raw Material and Purification
• Raw Material – Quartzite SiO2
C t Q t it i t t ll i l d ili• Convert Quartzite into metallurgical grade silicon or (MGS) – Furnace with quartzite and carbon (coal or coke) @ 2000 ºCq ( ) @– ~ 98% pure
d l i d ili ( )• MFGS converted to electronics grade silicon (EGS)– MGS powder combined with gaseous HCl– Produce SiH4 (silane), SiH3Cl (chlorosilane), SiH2Cl24 ( ), 3 ( ), 2 2
(dichlorosilane), SiHCl3 (trichlorosilane), or SiCl4 (silicon tetrachloride)
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
10
Crystal Growth, Si Wafers- Chapter 3
Raw Material and Purification (2)
• SiHCl3 (trichlorosilane) processingRoom temperat re liq id that can be p rified sing fractional– Room temperature liquid that can be purified using fractional distillation. Boiled and condensed back into a liquid.
• Chemical vapor deposition – SiHCl3 (gas) and hydrogen (gas) with Si rod
– Deposition of polysilicon (parts per billion purity)Deposition of polysilicon (parts per billion purity)1013 to 1014 cm-3 impurities
• Polysilicon used for either:C h l ki (CZ) t l th– Czocharalski (CZ) crystal growth
– Float-Zone (FZ) crystal growth
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
11
Crystal Growth, Si Wafers- Chapter 3
Crystal Growth• The raw material contains < 1 ppb impurities. Pulled crystals contain O
(≈ 1018 cm-3) and C (≈ 1016 cm-3), plus any added dopants placed in the melt.
Seed
Single Crystal Silicon
Q t C ibl
• Essentially all Si wafers used for ICs today come from Czochralski(cho HRAL skee) grown crystalsQuartz Crucible
Water Cooled Chamber
Heat Shield
(cho-HRAL-skee) grown crystals.
• Polysilicon material is melted, held at close to 1417 ˚C, and a single
Carbon Heater
Graphite Crucible
Crucible Support
crystal seed is used to start the growth.
• Pull rate melt temperature andSpill Tray
Electrode
Pull rate, melt temperature and rotation rate are all important control parameters.
$
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
12
• Approximately $50 per 8 in. wafer when text writtenArgon Ambient
Crystal Growth, Si Wafers- Chapter 3
Crystal Growth (2)
(More information on crystal growth at http://www.memc.com)
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
13
(Photo courtesy of Ruth Carranza.))
Crystal Growth, Si Wafers- Chapter 3
Float Zone Crystal Growth
Polysilicon Ingot
• An alternative process is the float zone process which can be used for refining or single crystal growth
RF Coil
or single crystal growth.• Localized I2R heating via RF Coil
• Nitrogen or dopant ambient• Wafers < 150 mm
Single Crystal Si • Detectors and power• Doping is a challenge• Reduced C and O impurities
• Bottom in contact with single crystalBottom in contact with single crystal seed
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
14
Crystal Growth, Si Wafers- Chapter 3
Silicon Wafer Diameter
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
15
Martin L. Hammond, TMX International, Cupertino, Calif. -- Semiconductor International, 6/1/2004http://www.semiconductor.net/article/205503-The_Next_Wafer_Diameter_Change.php
Crystal Growth, Si Wafers- Chapter 3
Ingot Cutting into Wafers
After crystal pulling, the boule is shaped and cut into wafers which are then polished on one side.
(S f // )
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
16
(See animations of crystal polishing etc. at http://www.memc.com)
Crystal Growth, Si Wafers- Chapter 3
Wafer Preparation and Specification• Grind crystal to a diameter
(200mm⇔750µm) 850µm thickMark wafer earlier (laser process) (200mm⇔750µm) … 850µm thick• Grind flats (the primary and
secondary)• Saw of the boule into wafers
to track their process flow
• Lapping, etching (batch process in acids etching Si) 20 µm, polishing (chemical-mechanical) 25µm removes damage and improves flatness ±2µmdamage and improves flatness ±2µm
Suspension Al2O3
SiO2 10nm in NaOH/DI
CMP
3Si +4HNO3+18HF 3H2SiF6+4NO+8H2O
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
Crystal Growth, Si Wafers- Chapter 3
MEMC Process Animation
• Crystal PullingR d G i di• Rod Grinding– Achieving the correct diameter– Grinding flats for crystal orientationg y
• Wire Cutting– 100 mm, 150 mm, 200 mm, 300 mm, 450 mm
Ed P fili• Edge Profiling• Lapping
– Improve wafer flatnessImprove wafer flatness
• Etching and Polishing• Laser Inspection
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
18
Crystal Growth, Si Wafers- Chapter 3
Measurement Methods
• Sheet ResistanceCo linear fo r point probe– Co-linear four-point probe
– Van der Pauw
• Hot Point Probe• Hall Effect
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
19
Crystal Growth, Si Wafers- Chapter 3
Measurements of the Grown Crystal
Resistivity ρ =
1qμnn + qμpp
[Ωcm ]
rxj<<t
Φ>>s
Sheet resistance
Average resistivity
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
Sheet resistance
Crystal Growth, Si Wafers- Chapter 3
Measurements of the Grown Crystal
Conductivity Typey yp
Seebeck voltage
25-100°C hotter
Electrons move - Donors ⊕ stay Jn = qnμ nPn
dTdxElectron current
Sign of the voltage V tells what is the conductivity type
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
Crystal Growth, Si Wafers- Chapter 3
Hall Effect Measurement
Measurements of majority carrier concentrations (and type) and their wt Vx / fi ldmobility
ρ =wts
Vx
Ixw/o B field
Test structure
Electrons at the bottom
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
Crystal Growth, Si Wafers- Chapter 3
Measuring ImpuritiesFourier Transport Infrared Spectroscopy (FTIR)
For Interstitial Oxygen incorporated during CZ growth and SubstitutionalC b (d i li i O 2 1015 3Carbon (detection limit O- 2x1015cm-3, C- 5x1015cm-3 )
Fourier transformFourier transform Sweep the wavelength of incident energy look for absorption
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
Crystal Growth, Si Wafers- Chapter 3
SEM and TEM
• Scanning Electron MicroscopeMicroscope– Large depth of focus– Magnification 300,000x– Resolution below 5 nm
• Transmission Electron• Transmission Electron Microscope– Prepared samples
(1 um thickness)– Resolution is about 0.2 nm
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
8
Crystal Growth, Si Wafers- Chapter 3
Models and Simulation
• Czochralski Crystal GrowthD t I ti i CZ• Dopant Incorporation in CZ
• Zone Refining and FZ Growth• Point Defects• Point Defects• Oxygen in Silicon• Carbon in Silicon
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
9
Crystal Growth, Si Wafers- Chapter 3
Modeling Crystal GrowthSeed • We wish to find a relationship between
pull rate and crystal diameter.• Freezing occurs between isotherms X1
Solid Si
dxC
B Isotherm X 2
and X2.• Heat balance:
• latent heat of crystallization + heat conducted from melt to crystal
Liquid Si
A
Isotherm X 1
= heat conducted away.
fusion ofheat latent =dmL
liquid ofty conductivi thermal
unit timeper freezing ofamount
=
=
dTkdtdm
L
22
11
AdxdTkA
dxdTk
dtdmL SL =+ 1
1
solid ofty conductivi thermal
isothermat gradient thermal
=
=
dTk
xdxdT
S
(1)
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
10
22
at xgradient thermal=dxdT
Crystal Growth, Si Wafers- Chapter 3
Model Crystal Growth (2)• The rate of growth of the crystal is
where vP is the pull rate and N is the density and A the cross sectional area.
NAvdtdm
P ⋅⋅=(2)
density and A the cross sectional area.
• Neglecting the middle term in Eqn. (1) we have: 2
2
AdxdTk
dtdmL S≤
Seed
dxC
22
AdxdTkLNAv SP ≤⋅⋅⋅
2dxdT
NLkv S
PMAX ⋅= (3)
Solid Si
dx
B
A
Isotherm X 2
Liquid Si Isotherm X 1
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
11
Crystal Growth, Si Wafers- Chapter 3
Model Crystal Growth (3)• In order to replace dT/dx2, we need to consider the heat transfer processes.• Latent heat of crystallization (A) transfers up the crystal (B) and is lost by
di ti (C)radiation (C).
Seed
• Heat radiation from the crystal (C) is given by the Stefan-Boltzmann law
dxC ( ) ( )42 TrdxdQ σεπ ⋅= (4)
• Heat conduction up the crystal is given by
Solid Si
i i Si
B
A
Isotherm X 2
Isotherm X 1
given by
( )dxdTrkQ S ⋅⋅= 2π (5)
• Differentiating (5), we haveLiquid Si Isotherm X 1
( ) ( ) ( ) 2
222
2
22
dxTdrk
dxdk
dxdTr
dxTdrk
dxdQ
SS
S πππ ≅+=
(6)
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
12
(6)
Crystal Growth, Si Wafers- Chapter 3
Model Crystal Growth (4)
• Substituting (6) into (4), we have 02 42
2
=− Trkdx
Td σε (7)rkdx S
• kS varies roughly as 1/T, so if kM is the thermal conductivity at the melting point, T
Tkk MMS = (8)
y g p ,
02 52
2
=−∴ TrTkdx
Td
MM
σε(9)
• Solving this differential equation, evaluating it at x = 0 and substituting the result into (3), we obtain
Tk21 5σε (10)2
12
14
133
−
⎟⎞
⎜⎛
⎟⎞
⎜⎛⎞⎛ rkrTk
rTk
LNv MM
PMAX 321 σε
= (10)
• Using the example on p. 124, this gives a max pull rate of ≈ 24 cm hr-1 for 6” t l (A t l l 2X l th thi )
383
83
⎟⎟⎟
⎠⎜⎜⎜
⎝⎟⎟⎠
⎞⎜⎜⎝
⎛+⋅⎟
⎠⎞
⎜⎝⎛=
M
MMM
TrkxrTkT
σεσε
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
13
a 6” crystal (Actual values are ≈ 2X less than this).
Crystal Growth, Si Wafers- Chapter 3
Monitoring Ingot Growth
Seed • Automation of the process incorporates numerousSingle Crystal Silicon
Quartz Crucible
Water Cooled Chamber
incorporates numerous sensors and feedback– Optical monitoring of resulting
Heat Shield
Carbon Heater
Graphite Crucible
crystal diameter– Infrared sensing of
temperatureCrucible Support
Spill Tray
Electrode
– Thermocouples for specific temperatures within chamber
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
14
Crystal Growth, Si Wafers- Chapter 3
Modeling Dopant Behavior During Crystal GrowthCrystal Growth
• Dopants are added to the melt to provide a controlled N or P doping level in the ingot and resulting wafersN or P doping level in the ingot and resulting wafers.
– The dopant incorporation process is complicated by dopant p p p p y psegregation, a difference in the impurity concentration between the liquid and solid.
– Segregation occurs between the liquid and solid phase of g g q pmaterial when they are in intimate contact. An experimentally measured segregation coefficient defines the difference between the two.
L
SO C
Ck =
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
15
Crystal Growth, Si Wafers- Chapter 3
Segregation CoefficientDopant kO
As 0.3 Bi 7 x 10-4
k O = CS
CL
Bi 7 x 10C 0.07 Li 10-2 O 0.5 P 0 35P 0.35
Sb 0.023 Al 2.8 x 10-3 Ga 8 x 10-3
0 8B 0.8Au 2.5 x 10-5
• Most k values are <1; therefore the impurity prefers to stay in the liquid• Most k0 values are <1; therefore, the impurity prefers to stay in the liquid.• Thus as the crystal is pulled CL increases.• As the melt concentration increases, the silicon crystal doping, NS,
will also increase.
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
16
Crystal Growth, Si Wafers- Chapter 3
Dopant Model• If during growth, an additional volume dV freezes, the impurities (I)
incorporated into the volume dV are given by
dIkdkd L (12)dVVV
IkdVCkdISO
LOLO −
−=−= (12)
∫∫ =SL VI dVkdI (13)
VS, CS
IL, CLVO, IO, CO
∫∫ −−=
O SOO
I L VVk
I 0
( 3)
⎟⎟⎞
⎜⎜⎛
⋅−=⎟⎟⎞
⎜⎜⎛ O
OL VkI loglog
Ok
SVII ⎟⎟⎞
⎜⎜⎛−= 1 (14)
⎟⎟⎠
⎜⎜⎝ −⎟⎟
⎠⎜⎜⎝ SO
OO VV
kI
loglog
OOL V
II ⎟⎟⎠
⎜⎜⎝−= 1 (14)
• This equations defines the number of impurities in the melt as a function of how much of the melt has solidified
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
17
of how much of the melt has solidified.
Crystal Growth, Si Wafers- Chapter 3
Dopant Model (2)• Knowing the number of impurities in the melt as a function of how much
of the melt has solidified. We define the fraction of melt “frozen” as f .
• The impurities in the crystal (C )
0VVf S= ( ) Ok
OL fII −= 1
VS, CS
• The impurities in the crystal (CS) can then be computed usingt
LdIC ∝ (15)IL, CLVO, IO, CO S
LS dV
C −∝ (15)
( ) 1k( ) 11 −−= OkOOS fkCC (16)
• This equations defines expected impurity concentration in the resulting wafers based on their location in the crystal This is directly related to the
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
18
wafers based on their location in the crystal. This is directly related to the amount of melt solidified in the ingot pulling process, f=0 to f=1.
Crystal Growth, Si Wafers- Chapter 3
Doping Concentration vs. Position
10
1Boron
CO
• Plot of Eq. (16).
f f
0.1
Phosphorus, Arsenic
CS/
C • Note the relatively flat profileproduced by boron with a kSclose to 1.
0 01
Antimony • Dopants with kS << 1 produce much more variation in dopingconcentration along the crystal.
0.010 0.2 0.4 0.6 0.8 1
Fraction of Melt Solidified
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
19
Crystal Growth, Si Wafers- Chapter 3
Float Zone Growth and RefiningRF -> melt zone moving
Poly-SiL
Zone
C0 original concentration in the rod
COCS(x)
I - impuritiesin the liquid dI=(C0-k0CL)dx
the rod
dx
• In the float zone process, dopants and other impurities tend to stay in the liquid; therefore, refining can be accomplished, especially with multiple passes
• See the text for models of this process.
( ) ( ) ⎬⎫
⎨⎧ ⋅
−L
xkO
kCC 11
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
20
( ) ( )⎭⎬
⎩⎨ ⋅−−⋅= L
OOS ekCxC 11
Crystal Growth, Si Wafers- Chapter 3
FZ Impurity Behavior
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
21
Crystal Growth, Si Wafers- Chapter 3
Modeling Point Defects
• Vacancies (V) and Interstitials (I)Th i t f d f t i i i th t t l f• The existence of defects minimizes the total free energy of the crystal. Therefore, they will exist for all temperatures above absolute zero.p– The concentrations can be related as
⎟⎟⎞
⎜⎜⎛ −
⎟⎟⎞
⎜⎜⎛
=HSN
ff
expexpCC **
– Sf is the formation entropy of the defectf
⎟⎟⎠
⎜⎜⎝
⎟⎟⎠
⎜⎜⎝
=kTk
NS expexpC,C VI 00
– Hf is the enthalpy of formation of the defect– NS is the number density of lattice sites– * denotes equilibrium
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
22
Crystal Growth, Si Wafers- Chapter 3
Point Defect Equilibrium
• The Frenkel process: moving a silicon atom off from a lattice site inside a crystal. It creates equal number of V and I.inside a crystal. It creates equal number of V and I.
• I created if silicon atom moves from the surface into the bulk.• V and I can be recombined removing one of each
Stacking fault can capture either V or I by growing or shrinking• Stacking fault can capture either V or I by growing or shrinking but one lattice site
• In general, there is an assumption that the equilibrium population rate of change is due to kinematics and is assumedpopulation rate of change is due to kinematics and is assumed to change “immediately” with respect to temperature.– With the exception of ion implantation and CZ growth
⎞⎛ V83• Estimated values for Silicon
⎟⎠⎞
⎜⎝⎛ −≅
kTeVxC
I
8.3exp101 27*0
⎟⎞
⎜⎛ − eVC 6.2109 23*
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
23
⎟⎠⎞
⎜⎝⎛≅
kTeVxC
V
6.2exp109 23*0
Crystal Growth, Si Wafers- Chapter 3
Concentration Example
• At 1000 ºC3-510 × 343 8.617 −≅ cmk
312* 1010−≅ cmxCI
312* 105 −≅ cmxC
3181014.7 −≅ cmxni
32015 1010, −≅ cmtoNN AD1050 ≅ cmxCV
, AD
Defects are present but a concentrations significantly less than carriers and difficult to detect.
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
24
Crystal Growth, Si Wafers- Chapter 3
Point Defect Diffusivities
• Point defects are extremely mobile. Cr stal kinematics– Crystal kinematics.
– Not directly measured, but has been inferred from dopant diffusivity.
12 sec8.1exp51 −⋅⎟⎠⎞
⎜⎝⎛ −≅ cm
kTeVdI p
⎠⎝ kTI
124 sec58.1exp10653 −− ⋅⎟⎞
⎜⎛ −⋅×≅ cmeVdV secexp1065.3 ⎟
⎠⎜⎝
×≅ cmkT
dV
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
25
Crystal Growth, Si Wafers- Chapter 3
Modeling Point Defects in Silicon
• Point defects (V and I) will turn out to play fundamental roles in many process technologies.
• The total free energy of the crystal is minimized when finite concentrations of these defects exist.
Stacking FaultV Stacking Fault
• In general and both are strong functions of temperature.
CI0* ≠ C
V0*
• Kinetics may determine the concentration in a wafer rather than thermodynamics.
I Dislocation Precipitate
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
26
Crystal Growth, Si Wafers- Chapter 3
Charged Point Defects
• Shockley and Last (1957) first described these charged defect concentrationscharged defect concentrations
• V and I also exist in charged states with discrete energies in the Si bandgap.g g p– In N type Si, V= and V- will dominate– In P type, V+ and V++ will dominate.
EC
V=
V-
EF EF for an N type
t i l V
V++
Ei material
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
27
EVV+ V++
Crystal Growth, Si Wafers- Chapter 3
Charged Point Defects
• For intrinsic silicon, no change in charge occupationF t i i N t Si V d V ill d i t th• For extrinsic N type Si, V= and V- will dominate as the Fermi energy rises– The dominant vacancy charge state becomes V- acting like y g g
an acceptor
• For extrinsic P type Si, V+ and V++ will dominate. As the Fermi energy fallsthe Fermi energy falls– The dominant vacancy charge state becomes V-+acting like
an donor EC
V=V
V-
Ei
EF
EF for an N type material
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
28 EVV+ V++
yp
Crystal Growth, Si Wafers- Chapter 3
Charge Defect Concentrations
• Shockley and Last (1957) first described these
⎟⎟⎠
⎞⎜⎜⎝
⎛ −=
+
+
kTEE
CC FVVV
exp**0
• Shockley and Last (1957) first described these charged defect concentrations (see text).
Note: • The defect concentrations are always ⎠⎝ kT
⎟⎟⎞
⎜⎜⎛ −
=−
−
EECC VF
VVexp**
0
<< ni. ( doping EF point defect concentrations)
• As doping changes, the neutral point defect concentrations are constant.⎟⎟
⎠⎜⎜⎝
−
kTCC
VVe p0 defect concentrations are constant.
• However, the charged defect concentrations change with doping. ∴ the total point defect concentrations
h ith d ichange with doping.
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
29
Crystal Growth, Si Wafers- Chapter 3
Point Defect Example
N 5 x 1019 cm-3 • At 1000 ˚C, the P region will be intrinsic, the N region is extrinsic.E 0 7778 V
P 1015 cm-3
• Eg ~ 0.7778 eV• Compute ni and check ND and NA• Construct energy band diagram
Intrinsic:Fermi
Extrinsic: Fermi L lLevel in
middleLevel shifted
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
30
Crystal Growth, Si Wafers- Chapter 3
Point Defect ExampleN 5 x 1019 cm-3
• Compute V0 and I0
P 1015 cm-3
P R i N R i
p• Compute P-type V and I
P Region N RegionDoping 1 x 1015 cm-3 5 x 1019 cm-3
ni 7.14 x 1018 cm-3 7.14 x 1018 cm-3 V0 4.6 x 1013 cm-3 4.6 x 1013 cm-3
Note:• ni relative to doping in the
two regions.V- 2.37 x 1014 cm-3 1.61 x 1015 cm-3 V= 1.85 x 1013 cm-3 8.50 x 1014 cm-3 V+ 2.08 x 1012 cm-3 3.06 x 1011 cm-3 V++ 1 94 x 1011 cm-3 4 23 x 109 cm-3
two regions.• V0 is the same in the two
regions.• Different charge states
d i t i th diff tV 1.94 x 1011 cm 3 4.23 x 109 cm 3
I0 9.13 x 1011 cm-3 9.13 x 1011 cm-3 I- 4.02 x 1011 cm-3 2.73 x 1012 cm-3 I 8 32 1010 3 1 48 1011 3
dominate in the different regions.
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
31
I+ 8.32 x 1010 cm-3 1.48 x 1011 cm-3
Crystal Growth, Si Wafers- Chapter 3
Oxygen and Carbon in CZ SiliconTh CZ th i h tl i t d O d C• The CZ growth process inherently introduces O and C.
• Typically, CO ≈ 1018 cm-3 and CC ≈ 1016 cm-3.
• The O in CZ silicon often forms small SiO2 precipitates in the Si crystal under normal processing conditions.
StackingFault
V I
OI
OI
OI SiO • O and these precipitates can
[OI]
OIOI
OI SiO2O and these precipitates can actually be very useful.• Provide mechanical strength.• Internal gettering (described
l t i Ch t 4)OI Diffusion
I
SiO2
later in Chapter 4).
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
32
Crystal Growth, Si Wafers- Chapter 3
Summary of Key Ideas
• Raw materials (SiO2) are refined to produce electronic grade silicon with a purity unmatched by any other commonly available material on earth.p y y y y
• CZ crystal growth produces structurally perfect Si single crystals which can then be cut into wafers and polished as the starting material for IC manufacturing.
• Starting wafers contain only dopants, O, and C in measurable quantities. • Dopant incorporation during crystal growth is straightforward except for
segregation effects which cause spatial variations in the dopant t ticoncentrations.
• Point, line, and volume (1D, 2D, and 3D) defects can be present in crystals, particularly after high temperature processing.P i t d f t "f d t l" d th i t ti d d• Point defects are "fundamental" and their concentration depends on temperature (exponentially), on doping level and on other processes like ion implantation which can create non-equilibrium transient concentrations of these defects.
SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin
© 2000 by Prentice HallUpper Saddle River NJ
33