Technologies for Realizing Carbon Nano-

Tube (CNT) Vias

Clarissa Cyrilla Prawoto26 November 2014

Outline

• Challenges in via interconnect for next generation ICs• Carbon Nano-Tube (CNT) via as one of the solutions• Fabrication techniques to realize CNT vias• Issues in CNT vias• Conclusion

Challenges in Via Interconnect for Next Generation ICs• In current technology: Cu and W

• Down scaling : Via cross-section area ↓ • Current density ↑• Electromigration limits current density

• High aspect ratio is hard to achieve• Need sidewall barrier layer → complexity

Open circuit

Current technology limit

CNT as Future Via Interconnect MaterialCarbon Nano-Tube (CNT) :

• Carbon based – rolled graphene

Properties:• High current carrying capability (10X Cu)

→ no electromigration • Ballistic transport → Low resistance• High via aspect ratio

graphene Single Wall CNT Multi Wall CNT

CNT via

metal

metal

CNT Via Fabrication Steps

Standard via opening

− TiN and Ta Thin film deposition

− Nanoparticles deposition by sputtering

Nanoparticles: Fe, Co, NiAs catalyst for CNT growth

Conductivity α CNT density α-1 nanoparticle thickness

− Bottom-up growth− Final structure: Nanoparticles on top

of the grown CNT− Growth Temperature = 350oC – 800oC

− Higher → lower R− Multiwall structure (MWNT) for

metallic type

Issues: Resistance

To achieve low resistivity comparable to Cu

• Need high CNT density

• Reduce catalyst thickness

→ reduce CNT diameter

→ increase density

Limitation:

Density can’t be increased indefinitely

Issues: Metal to CNT Contact• High Resistance

• Interaction between Metal – CNT is not well understood• End contact (a) vs Side contact (b)

• No resistance model yet• Hard to measure and characterize

Issues: Compatibility to Silicon Technology• Growth temperature of CNT > 400oC

• To achieve low resistance

• growth rate proportional to temperature

• Need innovative integration techniques

Conclusion

• CNT could be the next generation via interconnect material • Ballistic transport – Low resistance • Able to handle high current density• High aspect ratio achievable – bottom-up growth• Carbon-based electronics

• Challenges:• CNT density limitation – high resistance• CNT-Metal contact• High temperature process

References

[1] International Technology Roadmap for Semiconductors—Interconnect, available at http://www.itrs.net/Links/2013ITRS/Home2013.htm.

[2] Awano, et al., “Carbon Nanotubes for VLSI: Interconnect and Transistor Applications”, IEEE Proc., Vol. 98, No. 12, December 2010

[3] Whilhite, et al., “Metal–nanocarbon contacts”, Semicond. Sci. Technol., Vol. 29, 2014

[4] Christianzen, et al., “Via-depletion Electromigration In Copper Interconnects”, IEEE Trans. On Device And Materials Reliability, Vol. 6, No. 2, June 2006

[5] S. Vollebregt, et al., “Carbon nanotube vertical interconnects fabricated at temperatures as low as 350 C”, Carbon 71, 249 (2014).

[6] A.P. Graham, et al., “How do carbon nanotubes fit into the semiconductor roadmap?”, Appl. Phys. A, Vol. 80, pp. 1141, 2005.

[7] J. Dijon, et al., “Ultra-high density Carbon Nanotubes on Al-Cu for advanced Vias”, IEDM 2010.