synchronization analysis of space-vector pwm converters with distributed control

3026 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 12, DECEMBER 2010

Synchronization Analysis of Space-Vector PWMConverters With Distributed Control

Mingyao Ma, Xiangning He, Fellow, IEEE, and Barry W. Williams

Abstract—Synchronization effects and performance degrada-tion of a distributed inverter built with several phase-leg powerelectronics building block (PEBB) modules controlled with a space-vector pulsewidth modulation (SVPWM) strategy are presented inthis paper. Under the control of the distributed SVPWM strategy,the inverter PEBB modules generate their target output voltagevectors separately, operating simultaneously with the command ofthe synchronization signal sent by the master module or the upperlevel controller. When a synchronization error exists, the line-to-line output voltage will contain some noncharacteristic harmoniccomponents. This paper systemically analyzes the impact of syn-chronization error on the system performance. Conclusions arederived from the double Fourier analysis, MATLAB simulation,and experimental results.

Index Terms—Distributed space-vector pulsewidth modulation(SVPWM) strategy, power electronics building block (PEBB) mod-ules, synchronization error.

I. INTRODUCTION

R ECENTLY, power electronics building block (PEBB)based design methodologies have attracted increased in-

terest due to the improvements in scalability, modularity, andflexibility for the overall system design. Generally, PEBB mod-ules have some advanced characteristics, such as standardiza-tion electrical and mechanical interfaces, appropriate integratedintelligence, interoperability, and easy to use [1]–[5]. Further-more, by interconnecting these modules through a distributednetworked system, it will be possible to adapt appropriate con-trol algorithms without affecting the hardware implementationand incorporate some desirable system properties, such as sys-tem surveillance, fault tolerant operation, and system dynamicreconfiguration.

The merits of the power converters built with PEBB modulesand their system performance have been reported [1]–[3], [5],

Manuscript received August 31, 2009; revised December 11, 2009 and May 5,2010; accepted June 18, 2010. Date of current version December 27, 2010. Thepaper was presented at IEEE Power Electronics Specialists Conference, Rhodes,Greece, Jun. 15–19, 2008. This work was supported by the National Nature Sci-ence Foundations of China under Grant 50777055 and Grant 50737002 and bythe Fundamental Research Funds for the Central Universities. Recommendedfor publication by Associate Editor P. Rodriguez.

M. Ma and X. He are with the National Laboratory of Power Electronics, Col-lege of Electrical Engineering, Zhejiang University, Hangzhou 310027, China(e-mail: [email protected]; [email protected]).

B. W. Williams is with the University of Strathclyde, G1 1XW Glasgow, U.K.(e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2010.2054835

[6]. The general solutions are that the converters built withPEBB modules will offer superior characteristics compared totraditional converters, in terms of multifunctionality, simplifiedconnectivity, reduced circuit complexity, and optimized cost.

Most PEBB research topics are mainly concerned with thestandardization and interoperability of PEBB modules [1]–[10].In [1], the overview of the PEBB concept and some of the is-sues, such as packaging approaches and thermal managementare presented. A flexible loss-minimizing and stress-sharing ba-sic switch cell for high-power converters is proposed in [3]. Theswitch cell is composed of two split bridge cells with identicalpower ratings, two small resonant inductors for zero-voltage-switching (ZVS) operation, and an external snubber capacitorfor further turn-OFF loss reduction of all switches. A differenttopology is proposed in [5], which is suitable for low-voltage fedpower converters. The major research effort focuses on investi-gating PEBB-based power converter arrangements devoted to anumber of applications. However, for more complex power con-verters built with PEBBs, high efficiency of the overall assemblysystem is the key technical difficulty due to the larger currentpaths and more coupling paths for conducted electromagneticinterference (EMI). Therefore, the possible efficiency improve-ments, related to packaging, thermal management, isolation,and interconnections are all issues that need to be addressedcarefully.

Preferably, these PEBB modules should be linked througha dynamic and reliable network with algorithms designed forflexible real-time control. The distributed control architectureis considered as more suitable one for the PEBB-based powerelectronics systems, since each PEBB module is independentof the converter topology, power level, and type of applications[11]–[16].

Although the distributed control architecture can enhancePEBB-based power electronics systems performance, as men-tioned in [13]–[15], a new problem is that these independentPEBB modules under the distributed control have different timebases and target processes. In fact, the synchronization charac-teristic of the PEBB modules is particularly important to thedistributed control architecture, since their theoretical harmoniccancellations of the system output can only be achieved in prac-tice with proper synchronization. Various synchronization tech-niques have already been developed and reported [17]–[20].However, disturbances, harmonics, and other types of pollu-tions that exist in the grid signals can potentially influence theaccuracy of the synchronization methods. In addition, somesignal-filtering process introduces delays that can also impairthe system synchronization performance. Unfortunately, only afew techniques have been proposed to discuss the mechanism

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MA et al.: SYNCHRONIZATION ANALYSIS OF SPACE-VECTOR PWM CONVERTERS WITH DISTRIBUTED CONTROL 3027

Fig. 1. Topology of a three-phase voltage source inverter built with integratedPEBB modules.

Fig. 2. Block diagram of the integrated PEBB module.

for synchronizing each module with distributed computationsand estimate the system performance degradations caused bythe synchronization errors. In [21], the details on implementa-tion and operation to synchronize PWM carriers, fundamentalreferences, and sampling instances of modules, are systemat-ically presented. The study in [21] considers the single-phasemodular power bridge as the basic power circuit of the PEBB.This modular structure limits its application range.

In this paper, phase-leg-based PEBB modules are adapt, andthe detailed synchronization of each module and performancedegradation of the whole distributed converter system with aspace-vector pulsewidth modulation (SVPWM) strategy are ad-dressed through the design of an experimental modular three-phase voltage source inverter.

II. IMPLEMENTATION OF A DISTRIBUTED

SVPWM CONTROL SCHEME

A three-phase voltage source inverter built with three in-tegrated modules operated under a SVPWM strategy is con-structed in this paper. As illustrated in Fig. 1, each block withthe dash line represents an integrated PEBB module. The inter-nal structure of the integrated module is shown in Fig. 2, whereeach module contains two power switches (Sn and Sp ), eachwith an antiparallel diode. Its integrated controller can performmany tasks, such as the generation of gate signals for Sn and Sp ,the generation of dead band, fault detection, and data exchang-

Fig. 3. Creation of an arbitrary output target vector by the geometrical sum-mation of the two nearest space vectors.

ing with other module controllers or upper level controllers. Thedrive for two power switches is realized by a special integratedchip. In addition, protection and isolation functions can be alsoimplemented in the module [22]. With a basement processor inthe control system, the module should self-organize all its tasks,guarantee its own target, and maintain accurate synchronizationwith other modules. This phase-leg PEBB structure can be ap-plied to many topologies, especially multilevel or multiphaseconverters.

To achieve appropriate output performance, synchronizationof digital controllers is necessary. When the distributed space-vector modulation strategy is applied, each module controllermust generate its own target output voltage vector, and coin-cided processes with other modules by the synchronization sig-nal sent by the upper controller or the master controller, in orderto achieve the theoretical output harmonic performance. To im-prove the computational efficiency, the target output voltagevectors produced by different modules are synchronized onceeach fundamental period. First, one controller acts as a mastercontroller and transmits a common synchronization signal tothe slave controllers, whenever its fundamental period begins.Second, the slaves capture the synchronization signal and adjusttheir own vector phase by adding or reducing appropriate offsetsto keep in phase with the master controller. This common signalis the synchronization time base for the target output voltagevector of all modules.

III. PERFORMANCE DEGRADATIONS CAUSED BY

SYNCHRONIZATION ERRORS

A. Synchronization Analysis for SVM

The traditional space-vector modulation strategy is describedin [23]. At any point in time, an arbitrary target output voltagevector can be formed by the summation of a number of thespace vectors within one switching period, as shown in Fig. 3.The double Fourier analytical solution for SVPWM is complex.


Considering the intrinsic relationship between SVPWM andSPWM, an equivalent phase-leg reference waveform can begenerated that is made up of six segments across a completefundamental cycle. Therefore, the double Fourier analytical so-lution for SVPWM can be developed by extending the tech-niques that are applied to three-phase SPWM inverters withcontinuous reference waveforms. The related harmonic anal-ysis method for the SVPWM strategy was addressed in [23]and [24]. According to double Fourier transform theory, phaseleg A voltage vaz (t) can be expressed in terms of its harmoniccomponents as follows:

vaz (t) =MVdc

2cos ωr t

+∞∑

n=3,9,15...

3MVdc√

32π(n2 − 1)

sin(n

π

6

)sin

(n

π

2

)cos nωr t

+∞∑

m=1

∞∑n=−∞

Amn cos(mωct + nωr t) (1)

where (2), as shown at the bottom of this page.Here, ωr and ωc are the equivalent angular frequencies of the

reference and the carrier, respectively, and M is the modulationindex. The phase voltage is referred to the midpoint of the dcbus. The solutions for phase leg B can be found by replacingωr t with (ωr t − 2π/3) in (1), and the line-to-line output volt-age harmonic solution is, therefore, found by subtracting thephase leg B solution from the phase leg A solution, as defined in(3). The first term of (3) and its middle summation term, wherem = 0, define the output fundamental components and theirbaseband harmonics. It can be readily verified from this ex-pression that these triplen baseband harmonics are zero, thusthe middle summation term equals to zero when no synchro-nization errors exist. The final summation term, where m >0, corresponds to all possible carrier harmonics and their as-sociated sideband harmonics, which exist as groups around the

carrier harmonic frequencies.

vab(t) =√

3MVdc

2cos

(ωr t +

π

6

)

+∞∑

n=3,9,15...

3MVdc√

3π(n2 − 1)

sin(n

π

6

)sin

(n

π

2

)

× sin(n

π

3

)cos

[n

(ωr t −

π

3

)+

π

2

]

+∞∑

m=1

∞∑n=−∞

2Amn sin(n

π

3

)

× cos[mωct + n

(ωr t −

π

3

)+

π

2

]. (3)

The simulated full-scale harmonic components of the line-to-line output voltage with M = 0.9, fc = 10 kHz and fr = 50 Hzare shown in Fig. 4(a), and the first carrier group harmoniccomponents and its baseband low-order harmonics are shownin Fig. 4(b) and (c), respectively. All harmonic componentsare normalized with respect to the fundamental component. Asillustrated in Fig. 4, the effect of SVPWM is to transfer theharmonic energy into the outer sideband harmonics within eachcarrier group and to some extent to the outer even carrier groupsas a consequence. Also, the baseband components created by thesampling process and MATLAB calculation can be clearly seenas 5th, 13th, and 17th fundamental harmonics in the line-to-linevoltage shown in Fig. 4(c).

To further illustrate this effect, the total harmonic distortion(THD) is given in Table I to provide a quantitative indication.The THD function is defined as follows:

THD =

√√√√(V0

V1,rms

)2

+∑

n=2,3,...

(Vn,rms

V1,rms

)2

(4)

where V1,rms and Vn,rms denote the rms values of the funda-mental voltage and the ith harmonic voltage, respectively, andthe V0 is the dc-link voltage. Table I lists the relative magnitudes

Amn =4Vdc

mπ2

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

π

6sin

([m + n]

π

2

){Jn

(m

3π

4M

)+ 2 cos n

π

6Jn

(m

√3π

4M

)}

+1n

sin mπ

2cos n

π

2sin n

π

6

{J0

(m

3π

4M

)− J0

(m

√3π

4M

)}∣∣∣∣∣n �=0

+∞∑

k = 1(k �= −n )

⎡⎢⎢⎢⎢⎢⎣

1[n + k]

sin([m + k]

π

2

)cos

([n + k]

π

2

)sin

([n + k]

π

6

)

×{

Jk

(m

3π

4M

)+ 2 cos

([2n + 3k]

π

6

)Jk

(m

√3π

4M

)}⎤⎥⎥⎥⎥⎥⎦

+∞∑

k=1(k �=n)

⎡⎢⎢⎢⎢⎣

1[n − k]

sin([m + k]

π

2

)cos

([n − k]

π

2

)sin

([n − k]

π

6

)

×{

Jk

(m

3π

4M

)+ 2 cos

([2n − 3k]

π

6

)Jk

(m

√3π

4M

)}⎤⎥⎥⎥⎥⎦

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

. (2)


Fig. 4. Simulation results: harmonic spectra of the l–l output voltage wave-form in synchronization mode. (a) Full-scale harmonic spectra. (b) First carriergroup harmonics. (c) Low-order harmonics.

TABLE INORMALIZED MAGNITUDE OF l–l HARMONICS FOR SVM

of the significant harmonics for SVPWM, and also includes anestimate of the harmonic distortion produced by the major side-band harmonic groups. The table clearly shows the same trendas the simulation results, and confirms the previous conclusions.Note that the asymmetry of the sidebands is mainly caused bythe discrete arithmetic of the MATLAB simulation. The detailedanalysis and deduction introduced in [23] is a useful reference.

When no synchronization errors exist among the integratedmodules, the resulting harmonic profiles of the output voltageare identical with the previous results.

B. Impact of Synchronization Error of Target Output VoltageVectors Under SVM Strategy

As illustrated in Fig. 1, each phase leg contains an indepen-dent integrated module. The modules generate their target out-put voltage vectors separately, and operate simultaneously withthe command of the synchronization signal sent by the mastermodule. If the different modules work in a nonsynchronizationmode, angle differences among the target output voltage vectorswill exist. Fig. 5 shows the case when synchronization error be-tween the nonsynchronization target output voltage vector andthe normal ones at time t in the first sextant.

On the assumption that the synchronization error only existsin phase leg A, the harmonic solutions for phase leg A canbe formed by replacing ωr t with (ωr t + θerror) and ωct with(ωct + θerror) in (1). The expression then becomes as follows:

vaz (t) =MVdc

2cos(ωr t + θerror) +

∞∑n=3,9,15...

3MVdc√

32π(n2 − 1)

× sin(n

π

6

)sin

(n

π

2

)cos[n(ωr t + θerror)]

+∞∑

m=1

∞∑n=−∞

Amn cos[m(ωct + θerror)

+ n(ωr t + θerror)]. (5)


Fig. 5. Synchronization error between the nonsynchronization modules and the normal ones at time t in the first sextant.

The harmonic solutions for phase leg B are unchanged, i.e.,

vbz (t) =MVdc

2cos

(ωr t −

2π

3

)+

∞∑n=3,9,15...

3MVdc√

32π(n2 − 1)

× sin(n

π

6

)sin

(n

π

2

)cos

[n

(ωr t −

2π

3

)]

+∞∑

m=1

∞∑n=−∞

Amn cos[mωct + n

(ωr t −

2π

3

)].

(6)

Then the expressions for the double Fourier series of theline-to-line output voltage vab(t) can be deduced by subtractingthe results of (6) from (5). The detailed expression is not pre-sented, however, it can be easily deduced that the middle sum-mation term is no longer zero, which defines the triplen basebandharmonics.

When a synchronization error exists, the output phase voltageof each module will not be influenced, but the line-to-line outputvoltage will contain some noncharacteristic harmonic compo-nents. Figs. 6 and 7 show the impact of synchronization error onthe line-to-line output voltage, where terror = 5 μs in Fig. 6 andterror = 20 μs in Fig. 7. As shown in Figs. 5 and 6, incompletecancellation of carrier sideband harmonics is observed. This oc-curs because the carrier sideband harmonics of the two-phasemodules are now not exactly 120◦ out of phase and cannot fullycompensate each other. Furthermore, with the synchronizationerror increased, harmonic energy trends to move from the outersideband toward the inner sideband, meanwhile the odd multi-plies of the carrier harmonic components are increased. Besides,

it can also be seen that the triplen baseband harmonics shownin Figs. 6(c) and 7(c) are increased slightly compared to thosecomponents shown in Fig. 4(c). The intrinsic benefit of SVM asintroduced earlier is now not retained.

Tables II and III show the relative magnitudes of the signifi-cant harmonics and the harmonic distortion of the partial carriergroups. It can also be seen that the odd multiplies of carrier har-monic components (as ωc and 3ωc ) are increased significantly.Additional odd sideband harmonic components located aroundeven multiplies of the carrier fundamental (as 3ωc ± 6ωr ) andeven sideband harmonic components located around odd multi-plies of the carrier fundamental (as 4ωc ± 3ωr and 4ωc ± 7ωr )appear and increase gradually. This trend is progressively moreobvious as the synchronization error increase. The harmonicenergy distributes more dispersively as the noncharacteristicharmonic components increase. These results leads to a THDincrease of the odd carrier groups and a THD reduction ofthe even carrier groups. But the THD of the line-to-line out-put voltage continues to increase as the synchronization errorincreases.

Generally, for a q-phase converter (q ≥ 3), if both modulesA and B have synchronization errors, the line-to-line outputvoltage will contain more harmonic components. The harmonicsolutions for module A are assumptive, as defined in (5), andthen, the harmonic solutions for module B can be given bysubstituting (ωr t − 2π/q + θerrb ) for (ωr t − 2π/3) and (ωct +θerrb ) for ωct in (6) when module B is in a different phase tomodule A. When module B is in the same phase as module A,as in a multilevel converter, the harmonic solutions for moduleB can be given by substituting (ωr t + θerrb ) for ωr t and (ωct +θerrb ) for ωct in (5). Detailed development of the solutions for


Fig. 6. Harmonic spectra of the l–l output voltage waveform with the syn-chronization terror = 5 μs. (a) Full-scale harmonic spectra. (b) First carriergroup harmonics. (c) Low-order harmonics.

Fig. 7. Harmonic spectra of the l–l output voltage waveform with the syn-chronization terror = 20 μs. (a) Full-scale harmonic spectra. (b) First carriergroup harmonics. (c) Low-order harmonics.


TABLE IINORMALIZED MAGNITUDE OF l–l HARMONICS WITH Terror = 5 μs

TABLE IIINORMALIZED MAGNITUDE OF l–l HARMONICS WITH Terror = 20 μs

the line-to-line output voltage vab(t) are not presented due tosimilarity.

C. Impact of Nonsynchronization Startup Among ModulesUnder SVM Strategy

Similarly to the solutions of the line-to-line output voltagewith the synchronization error, the line-to-line output voltage isimpacted and contains some noncharacteristic harmonic compo-nents when these modules cannot startup simultaneously. Whenonly a nonsynchronization startup delay exists in phase leg B,it is assumed that phase leg B starts up at tdelay . Before tdelay ,there is no output waveform of phase leg B, so the line-to-lineoutput voltage between phase leg A and phase leg B is equalto the output of phase leg A. Its line-to-line output voltage har-monic components, therefore, consists of two parts: one is thephase A harmonic components before phase B starts up; and theother part is the line-to-line output voltage harmonic energy dueto the nonsynchronization of the two-phase legs after tdelay .

Figs. 8 and 9 show the impact of nonsynchronized startup onthe line-to-line output voltage, where tdelay = 20 μs in Fig. 8and tdelay = 520 μs in Fig. 9, respectively. As illustrated, thefundamental harmonic component decreases as the nonsynchro-nization startup errors tdelay increased, hence the THD of eachcarrier group increases gradually, although the magnitude ofeach harmonic component is not obviously changed. The sametrend of the carrier harmonic energy transfer can be seen bycomparing these figures with Figs. 6 and 7, so the similar an-alytical computations are not presented here. The differencesare that as the nonsynchronized startup error increased, the car-rier harmonic components are increased with a relatively slightrate. In contrast, the triplen baseband harmonics are increasedgreatly with increased nonsynchronized startup error, as shownin Figs. 8(c) and 9(c).

Some conclusions can be derived from the double Fourieranalysis and MATLAB simulations. First, the synchronizationerror leads to baseband low-order harmonics, additional carriersideband harmonics, and odd multiplies of carrier harmonics inthe line-to-line output voltage. But when the errors are tiny, theeffects of synchronization can be ignored. Second, the harmonicdistortion of the odd carrier groups including the odd multiplecarrier harmonic components and their even carrier sidebandharmonic components is increased greatly with increased syn-chronization error. In contrast, the harmonic distortion of evencarrier groups is reduced despite of the slight increase of theiradditional odd carrier sideband harmonics components. Other-wise, the amplitudes of the baseband low-order harmonics areincreased greatly with increased nonsynchronized startup er-ror, and these lead to serious output voltage distortions. Third,incomplete elimination of the intrinsic common-mode voltageoccurs in the line-to-line output voltage when one phase-legmodule has the synchronization error.

IV. EXPERIMENTAL RESULTS

To validate the presented analysis, a three-phase voltagesource inverter under SVPWM modulation with three mod-ules is laboratory tested. The prototype is composed of discrete


Fig. 8. Harmonic spectra of the l–l output voltage waveform when tdelay =20 μs. (a) Full-scale harmonic spectra. (b) First carrier group harmonics.(c) Low-order harmonics.

Fig. 9. Harmonic spectra of the l–l output voltage waveform when tdelay =520 μs. (a) Full-scale harmonic spectra. (b) First carrier group harmonics.(c) Low-order harmonics.


Fig. 10. Synchronization results of two adjacent modules.

Fig. 11. Experimental results of l–l output voltage waveform and its FFTspectrum in synchronization mode.

Fig. 12. Synchronization signal error (terror = 5 μs) of two adjacent modules.

components. Each inverter phase leg consists of one indepen-dent module. The gate signals are generated by a Texas Instru-ments TMS320LF2407 DSP chip embedded in the module. Inthis experiment, the switching frequency is 10 kHz, the sinu-soidal reference frequency is 50 Hz, and the modulation indexis 0.9. Fig. 10 shows the synchronization performance of twomodules using the aforementioned synchronization method. The

Fig. 13. Experimental results of l–l output voltage waveform and its FFTspectrum with synchronization error = 5 μs.

Fig. 14. Synchronization signal error (terror = 20 μs) of two adjacentmodules.

Fig. 15. Experimental results of l–l output voltage waveform and its FFTspectrum with synchronization error = 20 μs.

line-to-line output voltage waveform and its fast Fourier trans-form (FFT) spectrum in a synchronized mode are illustrated inFig. 11. It can be seen that more harmonic energy is distributedin the odd carrier groups than in the even carrier groups.

Figs. 12 and 13 show the synchronization performance whenthe synchronization error is 5 μs. Note that the harmonic energybegins to move from the outer even carrier groups toward theinner odd carrier groups. Similarly, Figs. 14 and 15 show thecase when the synchronization error is 20 μs. The harmonicenergy transfer trend becomes more obvious. These experimen-tal results closely match the simulation results of Figs. 6 and


Fig. 16. l–l output voltage waveform with different startup delay values. (a) tdelay = 0 μs. (b) tdelay = 20 μs. (c) tdelay = 520 μs. (d) tdelay = 1020 μs.

TABLE IVMAXIMUM HARMONIC MAGNITUDE COMPARISONS OF CARRIER GROUPS

7. The line-to-line output voltage waveforms with the differentnonsynchronization startup delays are shown in Fig. 16. Theline-to-line voltages are filtered by an L–C output filter. Hence,the voltage waveform distortions shown in Fig. 16 are mainlycaused by low-order harmonics. It clearly shows that low-orderharmonic distortions become more obvious as the startup delayincreases.

Table IV quantitatively summarizes the maximum harmonicmagnitudes of each carrier group in all synchronization andnonsynchronization modes. Because of measurement noise andnonideal experimental conditions, the experimental values varyfrom the simulation results, but the same trend can be seenby comparison. This confirms the correctness of the theoreticalanalysis, MATLAB simulation investigation, and the practicaldesign of the inverter’s hardware structure and its network con-trol system.

V. CONCLUSION

This paper has presented the synchronization effects and theperformance degradation of a distributed inverter built with sev-eral integrated PEBB modules using a SVPWM strategy. Thetransfer of the total harmonic energy of the line-to-line out-put voltage was explicitly analyzed using Fourier analysis andMATLAB simulation, when a synchronization error or startupdelay exists between two different modules. The analysis andmatching experimental results show that accurate synchronized


communications is necessary for PEBB-based power convertersto achieve the expected high performance. The derived conclu-sions are valuable for practical applications of SVPWM in-verters built with integrated PEBB modules using a distributedcontrol scheme.

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Mingyao Ma received the B.Sc. and Ph.D. degrees inapplied power electronics and electrical engineeringfrom Zhejiang University, Hangzhou, China, in 2004and 2010, respectively.

From October 2008 to October 2009, she wasa Visiting Ph.D. Postgraduate Research Student inthe Department of Electronic and Electrical Engi-neering, University of Strathclyde, Glasgow, U.K. In2010, she joined Zhejiang University as a Postdoc-toral Research Fellow. Her current research interestsinclude multilevel converters, distributed control of

power electronics building block-based converters, and software design usingfield programmable gate array and DSP.

Xiangning He (M’95–SM’96–F’10) received theB.Sc. and M.Sc. degrees from Nanjing Universityof Aeronautical and Astronautical, Nanjing, China,in 1982 and 1985, respectively, and the Ph.D. degreefrom Zhejiang University, Hangzhou, China, in 1989.

From 1985 to 1986, he was an Assistant Engineerat the 608 Institute of Aeronautical Industrial Gen-eral Company, Zhuzhou, China. From 1989 to 1991,he was a Lecturer at Zhejiang University. In 1991,he was a Fellow at the Royal Society, U.K., wherehe was involved for the research in the Department

of Computing and Electrical Engineering, Heriot-Watt University, Edinburgh,as a Postdoctoral Research Fellow for two years. In 1994, he joined ZhejiangUniversity as an Associate Professor, where he has been a Full Professor withthe College of Electrical Engineering, since 1996. He was the Director of thePower Electronics Research Institute and the Head of the Department of Ap-plied Electronics. He is currently the Vice-Dean of the College of ElectricalEngineering, Zhejiang University. He is the author or coauthor of more than200 papers and one book Theory and Applications of Multi-level Converters.He holds 12 patents. His research interests include power electronics and theirindustrial applications.

Dr. He was the recipient of the 1989 Excellent Ph.D. Graduate Award, the1995 Elite Prize Excellence Award, the 1996 Outstanding Young Staff MemberAward, and the 2006 Excellent Staff Award from Zhejiang University for histeaching and research contributions. He was also the recipient of five Scientificand Technological Progress Awards from Zhejiang Provincial Government andthe State Educational Ministry of China in 1998, 2002, and 2009, respectively,and five Excellent Paper Awards. He is a Fellow of the Institution of Engineeringand Technology (formerly IEE), U.K.

Barry W. Williams received the B.E. degree (withhonors) from Adelaide University, Adelaide, Aus-tralia, in 1976 and the Ph.D. degree from CambridgeUniversity, Cambridge, U.K., in 1980.

In 1980, he was a Lecturer at Imperial College,London, U.K., and as a Professor at Heriot-Watt Uni-versity, Edinburgh, U.K., in 1986. In July 2005, hejoined University of Strathclyde, Glasgow, U.K. Hehas authored or coauthored in more than 200 journaland conference publications. He was involved withmore than 65 Ph.D. graduates. His current research

interests include the area of power electronics, electric drives, and electricalenergy conversion.

synchronization analysis of space-vector pwm converters with distributed control

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