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ELEC 5200-001/6200-001ELEC 5200-001/6200-001Computer Architecture and DesignComputer Architecture and Design

Spring 2007Spring 2007IntroductionIntroduction

Vishwani D. AgrawalVishwani D. AgrawalJames J. Danaher ProfessorJames J. Danaher Professor

Department of Electrical and Computer EngineeringDepartment of Electrical and Computer EngineeringAuburn University, Auburn, AL 36849Auburn University, Auburn, AL 36849http://www.eng.auburn.edu/~vagrawalhttp://www.eng.auburn.edu/~vagrawal

vagrawal@eng.auburn.eduvagrawal@eng.auburn.edu

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Course OrganizationCourse OrganizationText book: D. A. Patterson and J. L. Hennessy, Text book: D. A. Patterson and J. L. Hennessy, Computer Organization & Design, the Computer Organization & Design, the Hardware/Software InterfaceHardware/Software Interface, San Francisco, , San Francisco, California: Morgan Kaufman Publishers, Inc., 2005 California: Morgan Kaufman Publishers, Inc., 2005 (Third Edition).(Third Edition).Instructor: Vishwani D. Agrawal, Broun 323, x41853, Instructor: Vishwani D. Agrawal, Broun 323, x41853, vagrawal@eng.auburn.eduvagrawal@eng.auburn.edu. . Graduate Assistants:Graduate Assistants:

Nitin Yogi, MWF 12:00-1:00PM, Broun 362, 334-444-9713, Nitin Yogi, MWF 12:00-1:00PM, Broun 362, 334-444-9713, yoginit@auburn.eduyoginit@auburn.edu.. Khushboo Sheth, Broun 359, x41865, Khushboo Sheth, Broun 359, x41865, shethkh@auburn.edushethkh@auburn.edu..

Classroom: Broun 306, MWF 11:00-11:50AM.Classroom: Broun 306, MWF 11:00-11:50AM.Lab: Broun 320.Lab: Broun 320.

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Author of theAuthor of the Text Book Text Book

Communications of the ACM,Volume 49, No. 4, April 2006,Page 31

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Author of the Text BookAuthor of the Text Book

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Student Performance EvaluationStudent Performance EvaluationHomeworks (30%): 1 per week, most Homeworks (30%): 1 per week, most weeks.weeks.Two Class Tests (24%): to be announced.Two Class Tests (24%): to be announced.CPU Design Project (21%).CPU Design Project (21%).Final Exam (25%): Tuesday, May 2, 2008, Final Exam (25%): Tuesday, May 2, 2008, 9-11:30AM, Broun 306.9-11:30AM, Broun 306.Term Paper and Class Presentation by Term Paper and Class Presentation by ELEC6200 Students: “Satisfactory” grade ELEC6200 Students: “Satisfactory” grade necessary; attendance necessary for necessary; attendance necessary for ELEC5200 students. ELEC5200 students.

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Course ObjectiveCourse Objective

Learn Learn whatwhat a digital computer contains a digital computer contains and and howhow it works. it works.

Learn Learn design conceptsdesign concepts of a modern of a modern computer.computer.

Gain design experience (through project).Gain design experience (through project).

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The Concept of a ComputerThe Concept of a Computer

Application software

Programs userwrites and runs

Hardware

Systems software

Operating systemcompiler

assembler

User

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SoftwareSoftware

Application software,a program in C:

swap (int v[ ], int k){int temp;

temp = v[k];v[k] = v[k+1];v[k+1] = temp;

}

MIPS compiler output,assembly language program:

swap;muli $2, $5, 4add $2, $4, $2lw $15, 0 ($2)lw $16, 4 ($2)sw $16, 0 ($2)sw $15, 4 ($2)jr $31

MIPS binary machine code:

00000000101000010000000000011000000000000001100000011000001000011000110001100010000000000000000010001100111100100000000000000100101011001111001000000000000000001010110001100010000000000000010000000011111000000000000000001000

Compiler Assembler

Application software

Hardware

Systems software

See pages 122-123

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The Hardware of a ComputerThe Hardware of a Computer

Control

Datapath MemoryCentral Processing

Unit (CPU)or “processor”

Input

Output

FIVE EASY PIECES

Application software

Hardware

Systems software

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Instruction Set Architecture (ISA)Instruction Set Architecture (ISA)A set of assembly language instructions (ISA) A set of assembly language instructions (ISA) provides a link between software and hardware.provides a link between software and hardware.Given an instruction set, software programmers Given an instruction set, software programmers and hardware engineers work more or less and hardware engineers work more or less independently.independently.ISA is designed to extract the most performance ISA is designed to extract the most performance out of the available hardware technology.out of the available hardware technology.

Inst

ruc

tio

ns

etSoftware Hardware

Application software

Hardware

Systems software

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ISAISA

Defines registersDefines registersDefines data transfer modes between registers, Defines data transfer modes between registers, memory and I/Omemory and I/OTypes of ISA: RISC, CISC, VLIW, SuperscalarTypes of ISA: RISC, CISC, VLIW, SuperscalarExamples:Examples:– IBM370/X86/Pentium/K6 (CISC)IBM370/X86/Pentium/K6 (CISC)– PowerPC (Superscalar)PowerPC (Superscalar)– Alpha (Superscalar)Alpha (Superscalar)– MIPS (RISC and Superscalar)MIPS (RISC and Superscalar)– Sparc (RISC), UltraSparc (Superscalar)Sparc (RISC), UltraSparc (Superscalar)

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Computer Computer ArchitectureArchitecture

Architecture: System attributes that have a Architecture: System attributes that have a direct impact on the logical execution of a direct impact on the logical execution of a programprogram

Architecture is visible to a programmer:Architecture is visible to a programmer:– Instruction setInstruction set– Data representationData representation– I/O mechanismsI/O mechanisms– Memory addressingMemory addressing

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Computer Computer OrganizationOrganization

Organization: Physical details that are Organization: Physical details that are transparent to a programmer, such astransparent to a programmer, such as– Hardware implementation of an instructionHardware implementation of an instruction– Control signalsControl signals– Memory technology usedMemory technology used

Example: System/370 architecture has Example: System/370 architecture has been used in many IBM computers, which been used in many IBM computers, which widely differ in their organization.widely differ in their organization.

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Architecture and OrganizationArchitecture and Organization

SoftwareProgrammers

HardwareEngineers

ISA

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CPU Design ProjectCPU Design Project

Design and implementation of a Design and implementation of a processor:processor:– Define instruction setDefine instruction set– Design datapath and control hardwareDesign datapath and control hardware– Implement hardware in FPGAImplement hardware in FPGA– VerifyVerify

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Research and DevelopmentResearch and Development

Instruction level parallelism (ILP)Instruction level parallelism (ILP)

Chip multi-processing (CMP)Chip multi-processing (CMP)

Energy efficiency and low power designEnergy efficiency and low power design

Embedded systemsEmbedded systems

Network processingNetwork processing

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SummarySummary

A computer processes digital data.A computer processes digital data.A user solves a problem by writing and/or running A user solves a problem by writing and/or running a program written in a a program written in a high-level programming high-level programming languagelanguage like C. like C.Inside computer, Inside computer, system programssystem programs called called compilercompiler and and assemblerassembler break the user program break the user program down into assembly code (down into assembly code ( instruction setinstruction set) and ) and then into binary machine code.then into binary machine code.The machine code is processed by the 5-piece The machine code is processed by the 5-piece hardware (control unit, datapath, memory, input hardware (control unit, datapath, memory, input and output) to obtain the desired result.and output) to obtain the desired result.