sleep mode pcb - hitachi rail · sw2 sw3 sw4 sw5 sw6. e30 c30 a30 e28 c28 a28. address a26 select...

SM 1D1.0032 1000 Technology Drive, Pittsburgh, PA 15219 645 Russell Street, Batesburg, SC 29006

Sleep Mode PCB

Notice This module is one of a series of modules that describe the

components of the MICROLOK II system.

Sleep Mode PCB

Copyright 2019 1D1.0032 Rev. 2, March 2019 1-2

Proprietary Notice This document and its contents are the property of Hitachi Rail STS USA, Inc. (formerly known as Union Switch & Signal Inc., and hereinafter referred to as "STS USA"). This document is furnished to you on the following conditions: 1.) That no proprietary or intellectual property right or interest of STS USA is given or waived in supplying this document and its contents to you; and, 2.) That this document and its contents are not to be used or treated in any manner inconsistent with the rights of STS USA, or to its detriment, and are not to be copied, reproduced, disclosed or transferred to others, or improperly disposed of without the prior written consent of STS USA.

Copyright © 2019, Hitachi Rail STS USA 1000 Technology Drive, Pittsburgh, PA USA 15219-3120

645 Russell Street, Batesburg, SC 29006 sts.hitachirail.com

All rights reserved.

Revision History rev. ISSUE DATE REVISION DESCRIPTION

0 November 2009 Revised SM 6800H to make first issue. 0.a November 2009 Revised after Steve Bodnar review. 0.b November 2009 Revised after Bernard Clement review. 0.c November 2009 Revised after engineering technical review. 0.d December 2009 Revised after FTR review. 1 March 2019 Hitachi Rail STS Branding

Sleep Mode PCB


1. SLEEP MODE DESCRIPTION The Sleep Mode PCB (N17064901) allows a MICROLOK II unit to enter low power mode and draw very little battery power. The MICROLOK II unit can be awakened to a fully functional mode by a wake-up radio signal or through the rails in response to a Microtrax track message. Under normal circumstances, when a train is not in the area, all of the MICROLOK II units will be in a low power mode awaiting instructions to verify the integrity of the track circuit. When requested, the MICROLOK II Sleep Mode Unit will monitor the integrity of the rails using MICROTRAX Track PCBs and report any broken rail condition.

Wake-up can also be accomplished by pressing the East and West pushbuttons on the front panel of the Sleep Mode PCB

1.1. Operation

1.1.1. Power Requirement Nominal Input: 12 VDC (9.8 VDC minimum to 16.2 VDC maximum)

Nominal Current

Operation Mode: 1 Ampere (not including radio current)

In Sleep Mode: 0.1 Ampere (not including radio current

Minimum Startup: 11.5 VDC

Maximum Battery Ripple: 0.5 VP-P

1.1.2. East and West Radio Wake-Up Inputs Nominal Input: 12 VDC (9.8 VDC minimum to 16.2 VDC maximum)

Nominal Wake-Up Response Time (from initial radio reception to activation of Track Clear or Track Not Clear): Up to 60 seconds

1.1.3. System to Radio Outputs Load Voltage Output Range: 60 volts maximum

Load Current Output Range: 3 amps maximum at 70°C and 6 amps maximum at 25°C

1.1.4. Auxiliary East Input and Auxiliary West Input Minimum Input Voltage to ensure an ON State: 9.5 VDC

Maximum Sustained Input Voltage: 34 VDC

Input Voltage to Ensure an OFF State: 7.0 VDC or less

Sleep Mode PCB


1.1.5. Radio System Contacts to Request a Wake-Up The radio system contacts must be isolated dry contacts and able to handle 0.100 amp. Two are required for the system; one for the East Wake-Up Input and one for the West Wake-Up Input.

1.1.6. Restore to Sleep Mode Operation

Response Time Wake-up time is one minute. The MICROLOK II Sleep Mode unit will wake-up in response to a single contact closure (East Radio Wake UP, West Radio Wake Up, East track Wake UP, or West Track Wake Up) of one second or longer.

The MICROLOK II Sleep Mode unit will return to Sleep mode after the loss of two consecutive inputs (East Clear, East Not Clear, West Clear, West Not Clear, East, or West) within 30 seconds.

When awakened by use of the front panel pushbuttons, the MICROLOK II Sleep Mode unit will remain in operation for one hour.

1.2. System PCBs

The following printed circuit boards are used in the examples given in this manual for the MICROLOK II Sleep Mode system:

• MICROTRAX Track PCB (N451910-0701)

• MICROTRAX Track Panels PCB (N451835-0101)

• Sleep Mode PCB (N17064901)

• CPU PCB (N17061301)

• 8In/8Out PCB (N17061601)

• Power Supply PCB (N16661203)

The MICROTRAX Track PCB, MICROTRAX Track Panels PCB, and Sleep Mode PCB must be used in the system. Other CPU PCBs, In/Out PCBs, and Power Supply PCBs than those listed above, may be used.

Sleep Mode PCB


2. SLEEP MODE PCB Sleep Mode PCB – N17064901

2.1. User Interface

The front panel contains six LEDs and two pushbutton switches. See Figure 2–1.

Table 2-1. MICROLOK IIPCB Front Panel LEDs and Switches

Ref Figure 2–1 Label Device Purpose

1 SLEEP LED LED (Yellow) Flashes every 3 to 4 seconds when the system is in Sleep Mode.

2 EAST TRACK WAKE-UP LED (Yellow) Lights when the Wake-Up signal is received from the East End track circuit.

3 WEST TRACK WAKE-UP LED (Yellow) Lights when the Wake-Up signal is received from the West End track circuit.

4 EAST RADIO WAKE-UP LED (Yellow) Lights when the Wake-Up signal is received from the East End radio

5 WEST RADIO WAKE-UP LED (Yellow) Lights when the Wake-Up signal is received from the West End radio

6 TEST LED (Yellow) Lights when either the East Track or the West Track PUSH TO TEST pushbutton is pressed

7 EAST TRACK PUSH TO TEST Pushbutton Switch

Puts the Sleep Mode PCB into Test Mode in the East direction allowing a technician to troubleshoot the system for a period of time that is specified in the application by the user. The switch must be held down for a minimum of 0.5 second to activate the test.

8 WEST TRACK PUSH TO TEST Pushbutton Switch

Puts the Sleep Mode PCB into Test Mode in the West direction allowing a technician to troubleshoot the system for a period of time that is specified in the application by the user. The switch must be held down for a minimum of 0.5 second to activate the test.

Sleep Mode PCB


Figure 2–1. Sleep Mode PCB Front Panel Detail

SLEEP MODE

TES T

SLEE P ( WHEN FLASHING )

EAST TRACK PUSH TO TEST

WEST TRACK PUSH TO TEST

EAST TRACK WEST TRACK EAST RADIO WEST RADIO

WAKE - UP WAKE - UP WAKE - UP WAKE - UP

1

2 3 4 5 6

7

8

Sleep Mode PCB


2.2. I/O Interface

Figure 2–2 shows a typical interface wiring diagram.

E2

E4

C2

A2

C4

A4

E6

E8

C6

A6

C8

A8

E12

E14

C12

C14

48-pin Connector Pin No.

SLEEP MODE PCBN17064901

E16

E24

E10

C10

A10

E20

E28

E30

E32

C32

To BoardAddressingCircuits

E32SEL+

GND

SW1

SW2

SW3

SW4

SW5

SW6

E30

C30A30E28C28A28A26AddressSelect

PCB

White

Brown

Red

Orange

Yellow

Green

Blue

Black

1D1.

0032

.320

2.00

WEST NOT CLEAR

EAST NOT CLEAR

EAST NOT CLEAR

WEST NOT CLEAR

WEST CLEAR

EAST CLEAR

EAST CLEAR

WEST CLEAR

WTWU

SLEEP

ETWU

RSETORE

B12

N12

WRWU

ERWU

TEST

EAST

WEST

WAKE A

WAKE B

STAY AWAKE

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(INPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

(OUTPUT)

Figure 2–2. Sleep Mode PCB Typical Interface Wiring

Sleep Mode PCB


2.3. PCB Keying

Each type of STS USA PCB has a different combination of six keying fingers.

Keying fingers are designated by STS USA. Their purpose is to ensure that the PCB is being inserted into its proper cardfile slot. Therefore, keying tabs must not be removed or altered by the user. Table 2–2 lists the keying for the MICROLOK II Sleep Mode PCB.

Table 2–2. PCB Keying

PRINTED CIRCUIT BOARD PART NO.

KEYING PLUG LOCATION

1 2 3 4 5 6 7 8 9 10 11 12

Sleep Mode PCB N17064901

The "" in Table 2–2 indicates a keying tab removed on the PCB connector and a keying plug installed on the motherboard connector. Correspondingly, no entry in the table indicates a keying tab not removed on the PCB connector and no keying plug installed on the motherboard connector. See Figure 2-3.

96-pin (Female)Connector on

CardfileMotherboard

AdjacentKeying PlugConnector(Female)

KeyingPlugNo.

1

2

3

4

5

6

7

8

9

10

11

12

PrintedCircuitBoard

96-pin (Male)Connector on PCB

AdjacentKeying PlugConnector

(Male)

PCB KeyingTabs Set at

Factory

Insert Keying PlugJ709146-0473

n n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n nn n n

n n nn n nn n n

n n n

Figure 2-3. Typical Keying Tab and Pin Arrangement 2.4. System Cardfiles

The systems that support the use the Synchronization PCB listed in Table 2-3.

Sleep Mode PCB


Table 2-3. Synchronization PCB System Applications

US&S PCB PART NO.

APPLICABLE CARDFILES

MICROLOK II MICROLOK II HB END POINT LED12

INTERMEDIATE I-LOK GENISYS II

N17064901

2.5. Software Compatibility

Refer to the MICROLOK II Application Programming Guide to verify that this PCB is compatible with the MICROLOK II executive software.

Sleep Mode PCB


Sleep Mode PCB


3. INSTALLATION Figure 3-1 is a typical example of a terminal strip wiring for a Sleep mode PCB in a MICROLOK II system. Figure 3-1 illustrates the terminal block layout for terminating the input/output and power wiring used for a typical Sleep Mode installation. The terminating strip is not included with the Sleep Mode PCB and must be ordered separately.

3.1. Power Hookup

1. Apply B12 (+12 VDC) to the On/Off Switch located on the left side of the terminal block.

2. Apply N12 (- 12 VDC) to position 10A on the terminal block.

NOTE

Use #14 AWG wire for the B12 and N12 power input lines. Strip a 0.37” length of the end of the wires before attaching them to the terminal block. Use a WAGO screwdriver to access the On/Off Switch screws and the connections to the WAGO “C” Rail terminal blocks. WAGO screwdriver Part Numbers are either #210-119 or 210-257 not included.

3.2. Radio Inputs to the Sleep Mode System

1. Apply the West Radio Wake-up signal wires (normally open isolated dry contacts, Section 1.1.5) to the Sleep Mode System at positions 40B and 41A of the terminal block.

2. Apply the East Radio Wake-up signal wires (normally open isolated dry contacts, Section 1.1.5) to the Sleep Mode System at positions 39A and 40A of the terminal block.

3.3. Radio Outputs from the Sleep Mode System

1. Apply the East Clear Output contact closures to the radio interface inputs. They are located on the Sleep Mode System terminal block at positions 23A and 24A.

2. Apply the East Not Clear Output contact closures to the radio interface inputs. They are located on the Sleep Mode System terminal block at positions 25A and 26A.

3. Apply the West Clear Output contact closures to the radio interface inputs. They are located on the Sleep Mode System terminal block at positions 27A and 28A.

4. Apply the West Not Clear Output contact closures to the radio interface inputs. They are located on the Sleep Mode System terminal Block at positions 29A and 30A.

Sleep Mode PCB


3.4. MICROTRAX Input Wiring from the MICROLOK II Sleep Mode Unit to the Track Interface Panel Wiring

1. Attach a 14 AWG wire from the Sleep Mode System East Side of the Insulated Joint (+Input of the Track Interface Panel) to the terminal block at position 15A; attach a 14 AWG wire from the Sleep Mode System East Side of the Insulated Joint (-Input of the Track Interface Unit) to the terminal block at position 16A.

2. In a similar manner attach 14 AWG wires from the Sleep Mode System West Side of the Insulated Joint (+Input of the Track Interface Panel) to the terminal block at positions 15A and from the West Side of the Insulated Joint (-Input of the Track Interface Panel) to the terminal block at position 18A.

3. Connect the MICROTRAX Output wiring from the Track Interface Panel to the track by attaching two 6 AWG to 9 AWG wires from the Track Interface Panel output AREMA terminals (+T and –T) to the track.

3.5. East and West Auxiliary Inputs

East and West Auxiliary Inputs (EAUX and WAUX) can be used with a slide fence, a high water detector, or switch machine correspondence contact to block transmission of a Track Clear message when the contact is open. Rewiring of the WAGO terminal strip is required to activate these functions. The required rewiring consists of:

1. Remove jumpers 48A to 54A and 54B to 56B.

2. Add connection over a front contact from 48A to 54A (EAUX) and a connection over a front contact from 56A to 48C (WAUX).

The completed wiring is shown in Figure 3-1.

Sleep Mode PCB


5 64321 11 1210987 13 1817161514 19 20 21 22 23 24 25 2726 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 6362

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-

L+ L-T+ T

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East sideof IJ

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Contacts of Radio System to Request Wake-Up

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B12

Power Supply Board

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250

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CPU Board

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C26

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A6

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List of Wire Jumpers

6B 48B 14B 47B 54B 56B 7B 40C 39B 61B 55B 57B 9B 21B 41B 62B 57A 59A11B 50B 48A 54A 58B 60B 13C 22B 50A 55A fdadsadsaaa

MLKII - 8IN.8OUT

Inputs

Outputs1. Test

East Clear2. ETWU East Not Clear3. WTWU West Clear4. ERWU West Not Clear 5. WRWU Restore6. EAUX Stay Awake7. WAUX Spare8. E or W Radio Spare

Sleep Board

Row “A”

Row “B”

Row “C”

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List of Hard Jumpers

6 7 8

10 11 12

50 51 52

7 8 9

11 12 13

51 52 53

A B C

Figure 3-1. Terminal Block Layout

Sleep Mode PCB


Sleep Mode PCB


4. OPERATION 4.1. Theory Of Operation for the Sleep Mode Printed Circuit Board

See Figure 4-1 for the following Sleep Mode Printed Circuit Board (PCB) Operation.

A1 and A2 are identical in operation - the only difference is that A1 is associated with the MICROTRAX East Track signal and A2 is associated with the MICROTRAX West Track signal. The input to each section is first bandpass-filtered (center frequency = 2.2 Hz) and then level-detected. If the signal exceeds the level detector threshold continuously for more than 1.5 seconds, its latching output will set a flip-flop that in turn enables the Power Supply Shutdown pin, which allows the MICROLOK II unit to turn on (as described in A7).

A3 receives the Radio East Wake-up, Radio West Wake-up, East Test Switch, and West Test Switch inputs. The Radio East Wake-up and Radio West Wake-up inputs are each optically isolated from the radio by 2500 V rms via solid state relays, which in turn drive two separate one-shots (one for the East and one for the West). The input to each one-shot must be present continuously for more than 470 milliseconds, in which case the one-shot will set a flip-flop and drive enable the Power Supply Shutdown pin, which allows the MICROLOK II unit to turn on (as described in A7).

The East and West Test Switch inputs are controlled by two separate momentary pushbutton switches located on the front panel of the Sleep Mode PCB. The contacts of these switches are essentially "ORed" with the appropriate Radio Wake-up inputs, which means that a test switch must be pressed for at least 470 milliseconds to be recognized.

There are four outputs associated with A3: the East and West Wake-up signals (which result from either Radio or Test Switch activation), the Test output (which responds to either Test Switch), and a "diode-ORed" East/West Radio Wake-up signal (which responds to either Radio contact).

A4 contains the 5-volt analog voltage references for the two level detectors in A1 and A2. It also contains the Master Reset circuitry for initial power-up to the Sleep Mode PCB. Through some additional gating circuitry, the Master Reset can also be controlled by a MICROLOK II output bit (Restore Request) to reset the entire Sleep Mode PCB. The Stay Awake is also controlled by a MICROLOK II output bit. The Stay Awake is used to override the Master Reset by preventing the unit from entering Sleep mode, but still allowing the flip-flops on the Sleep Mode PCB to be cleared.

Sleep Mode PCB


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Figure 4-1. Sleep Mode Block Diagram

Sleep Mode PCB


A5 provides optical isolation of the four signals that may be sent to the Radio through four solid state relays. The relays are controlled by the output section of the IN8.OUT8 PCB for the four signals which are:

East Clear

East Not Clear

West Clear

West Not Clear

Two outputs may be sent to the Radio simultaneously (one East and one West).

A6 shows the interface between the Sleep Mode PCB and the MICROLOK II IN8.OUT8 PCB. Five Inputs to the IN8.OUT8 PCB (labeled A, B, C, D, and E) were previously described in A1, A2, and A3. The East/West Radio Wake-up is an input from A3. The East and West Auxiliary inputs may be wired as shown in Figure 3-1 or to slide fence detectors, high water detectors, etc... These Auxiliary inputs must be "ON" in order to allow East Clear or West Clear signals to be sent to the radio. The Restore Request Output and the Stay Awake Output is processed in A4, and the four Radio Outputs are handled in A5.

The input signals to A7 consist of the Stay Awake signal and the four wake-up signals - East Track, West Track, East Radio/Test, and West Radio/Test. A7 contains the logic gating necessary to “OR” any of the four main flip-flops (the four wake-up signals) to the Power Supply Shutdown pin; the presence of any one of these signals will allow the MICROLOK II unit to turn on. The presence of the Stay Awake signal will keep the MICROLOK II unit up and running, even if the Master Reset signal is present, which would normally put the MICROLOK II unit in Sleep mode. Also in A7 is the Sleep astable oscillator circuit which turns ON and OFF a front panel Sleep LED every three seconds, as long as none of the four main flip-flops are set.

Five LED’s are located on the PCB front panel. These LED's are driven by the four wake-up signals and the Test signal.

4.2. Typical MICROLOK II Vital Sleep Mode Unit Operation

4.2.1. General Overview The information contained in this manual pertains to a typical MICROLOK II Vital Sleep Mode unit. For instance, the radios used in this description do not have to be used. The radios are external to the MICROLOK II unit, as long as the Sleep Mode PCB sees a physical input, it will work the same as it does in the following description. Remember that the following description is not a mandatory setup of the MICROLOK II Vital Sleep Mode; it’s just a "typical example".

The MICROLOK II Vital Sleep Mode is a user programmable broken rail detection system that is intended for dark territory as an aid for improving operational movement in these areas. MICROLOK II units are placed at each end of a track circuit. For a Sleep Mode application, MICROLOK II units at each location normally operate in the power down or sleep mode, drawing very little battery power. MICROLOK II units can be awakened to a functional state in one of two ways: either by a transmitted wake-up radio signal or through the rails in response to

Sleep Mode PCB


a MICROTRAX track message. As a train approaches a track circuit that is equipped with MICROLOK II Sleep Mode units, the locomotive will awaken the MICROLOK II unit via radio signal (refer to Figure 4-2, MLK II A). After this unit has come out of reset, it will send a signal down the track to wake up the unit on the other end of the track circuit (refer to Figure 4-2, MLK II B). After a valid signal has been sent back and forth between these two units, the unit that was woken by the radio will return a signal back to the radio signifying the integrity of the rail. The radio that is connected to the MICROLOK II unit will then transmit this same message back to the locomotive. If rail integrity cannot be established, as would be the case with a broken rail, shunted track, or from auxiliary input status, means are provided to transmit a NOT CLEAR status. The Vital Sleep Mode system is designed for bi-directional train traffic.

Figure 4-2. System Block Diagram Wake-up can also be initiated via East and West push buttons on the Sleep Mode board. When awakened via the push buttons, operation is sustained for a time that is specified in the application program to allow time for trouble shooting. The Sleep operation can be restored to the MICROLOK II unit by cycling power OFF to ON.

Components for a typical Sleep Application will consist of radios on locomotives and at wayside locations in conjunction with a MICROLOK II unit. The MICROLOK II unit includes:

• A standard MICROLOK II CPU board, which holds the application logic

• A Power Supply board with CPS, and a VCOR Relay

• A MICROTRAX Track board

• MICROTRAX Track Panels

• An IN8.OUT8 board – an interface for the user to see how the MICROLOK II unit was awakened and to see which signals are sent back to the radio

• A Sleep Mode board – controls the power for the cardfile, interfaces with the radio and MICROTRAX Track board.

W E

Radio #1

TK #3TK #1 TK #2

MLKIIA

Radio #2

M

TK #4

MLKIIB

Radio #3

S

Wake-UpSignal

Wake-UpSignal

Wake-UpSignal

Track Integrity

Track Integrity Track Integrity

Sleep Mode PCB


Additionally, the exact operation of the entire Sleep Mode controlled territory is user programmable. Based on the application logic, the units can be customized to wake-up each track circuit based on a radio request at each circuit; or once an end-unit is activated, it can begin the wake-up process for the entire territory. Either one status can be reported for the entire territory, or each circuit can report the status via a radio at each location. The MICROLOK II unit can transmit CLEAR and/or NOT CLEAR track integrity signals to the wayside radio, which will be transmitted back to the locomotive. These features are all specified within the application logic.

The MICROLOK II Sleep Mode unit can operate with trains traveling in areas without a passing side, in areas with a passing side, and in a user test mode (for troubleshooting purposes).

4.2.2. Activation Example

Figure 4-3. System Block Diagram – Traveling West to East Under normal circumstances, when a train is not in the area, all of the MICROLOK II units will be in a low power mode waiting instructions to verify the integrity of the track circuit. Assuming the train is approaching from the West (see Figure 4-3), as it approaches TK#1, a radio message from the train is sent to Radio #1 instructing MLK II A to check the status of TK#1. The radio message needs to be at least a one-second pulse in order for the MICROLOK II unit to wake up. MLK II A begins checking TK#1, which in turns activates MLK II B to also verify TK#1. When the status of TK#1 is determined by MLK II A, an output is delivered to Radio #1. After this indication is delivered to the radio, MLK II A and MLK II B will remain awake until MLK II A

RADIO #1 RADIO #3RADIO #2 RADIO #5RADIO #4

MLK IIA

S

MLK IIB

SM

MLK IIC

SM

MLK IID

SM

MLK IIE

M

W E

TK #1 TK #2 TK #3 TK #4

Sleep Mode PCB


has not received an input from Radio #1 within a period of time that is defined in the application by the user.

As the train approaches TK#2, a radio message is sent from the train to Radio #2 instructing MLK II B to check the status of TK#2. MLK II B begins checking TK#2 and sends a message to MLK II C, activating MLK II C to also verify TK#2. MLK II C will receive a wake signal from the track circuit, and MLK II C will respond to MLK II B saying that it verified the integrity of TK#2.When the status of TK#2 is determined by MLK II B, an output is delivered to Radio #2. This process will continue for each section of track.

While MLK II C is still awake, it can also receive a radio signal to verify the integrity of TK#2 for the opposite direction. MLK II C will remain awake and send a response to Radio #3, clarifying the integrity of TK#2.

The same rules apply, as in the previous paragraphs. As the train approaches TK#3, a radio message is sent from Radio #4 instructing MLK II D to check the status of TK#3. MLK II D begins checking TK#3, which in turn sends a message along the track to MLK II C while MLK II C is still awake. MLK II C will respond and send a return message to MLK II D, clarifying the integrity of TK#3.

The basic system will provide two Auxiliary inputs. One Auxiliary input will be for the East direction, and the second Auxiliary input will be for the West direction. For a unit to properly check the integrity of the track circuit, the Auxiliary input must be in a high state (in the ON position). If the Auxiliary input is in a low state, and the Wake Request is from the radio, the MLK II unit will respond to the radio with a NOT CLEAR output. If one of the Auxiliary inputs drops, the output to the radio will be a NOT CLEAR signal. If the MICROLOK II unit is sending a CLEAR signal to the radio, and the Auxiliary input drops, then the output to the radio will be a NOT CLEAR signal. If the MICROLOK II unit is sending a NOT CLEAR signal and the Auxiliary input is picked, then the output to the radio will be a CLEAR signal as long as the rail integrity can be established.

4.2.3. Travel with a Passing Siding – West to East Under normal circumstances, when a train is not in the area, all of the MICROLOK II units will be in a low power mode awaiting instructions to verify the integrity of the track circuit. Assuming the train is approaching from the West, as it approaches TK#1 (Figure 4-4), a radio message from the train is sent to Radio #1 instructing MLK II A to check the status of TK#1. The radio message will need to be at least a one-second pulse in order for the MICROLOK II unit to wake up. MLK II A begins checking TK#1, which in turns activates MLK II B to also verify TK#1. When the status of TK#1 is determined by MLK II A, an output is delivered to Radio #1. After this indication is delivered to the radio, MLK II A and MLK II B will remain awake until MLK II A has not received an input from Radio #1 within a period of time that is defined in the application by the user.

As the train approaches TK#2, a radio message is sent from the train to Radio #2 instructing MLK II B to check the status of TK#2. MLK II B begins checking TK#2, which in turns

Sleep Mode PCB


W E

RADIO #1

MLK IIA

S

RADIO #2

MLK IIB

SM

RADIO #3

MLK IIC

SM

RADIO #4

MLK IID

M

TK #1 TK #2 TK #4

activates MLK II C to also verify TK#2. When the status of TK#2 is determined by MLK II B, an output is delivered to Radio #2. This process will continue for each section of track.

Figure 4-4. System Block Diagram with a Passing Siding - West to East The basic system will provide two Auxiliary inputs. One Auxiliary input will be for the East direction, and the second Auxiliary input will be for the West direction. For a unit to properly check the integrity of the track circuit, the Auxiliary input must be in a high state (in the ON position). If the Auxiliary input is in a low state, and the Wake Request is from the radio, the MLK II unit will respond to the radio with a NOT CLEAR output. If one of the Auxiliary inputs drops, the output to the radio will be a NOT CLEAR signal. If the MICROLOK II unit is sending a CLEAR signal to the radio, and the Auxiliary input drops, then the output to the radio will be a NOT CLEAR signal. If the MICROLOK II unit is sending a NOT CLEAR signal and the Auxiliary input is picked, then the output to the radio will be a CLEAR signal as long as the rail integrity can be established.

When MLK II B receives a radio signal to wake up and verify the integrity of TK#2, MLK II B will send a message to MLK II C. MLK II C will receive a wake signal from the track circuit, and MLK II C will respond to MLK II B saying that it verified the integrity of TK#2. While

Sleep Mode PCB


MLK II C is still awake, it can also receive a radio signal to verify the integrity of TK#2 for the opposite direction. MLK II C will remain awake and send a response to Radio #3, clarifying the integrity of TK#2.

The same rules apply, as in the previous paragraph. As the train approaches TK#3, a radio message is sent from Radio #4 instructing MLK II D to check the status of TK#3. MLK II D begins checking TK#3, which in turn sends a message along the track to MLK II C while MLK II C is still awake. MLK II C will respond and send a return message to MLK II D, clarifying the integrity of TK#3.

4.2.4. Sleep Test Mode Enter TEST Mode by pressing a pushbutton on the SLEEP Board for the direction to be tested. The unit at the other end will wake-up automatically if everything is OK. The units will stay awake for a period of time that is defined in the application by the user.

If testing is complete, the operator can either let the units time out or turn the unit OFF and then back ON. This will remove the signal to the other units and they will go to sleep.

If the units are turned OFF, the operator must be aware of the following considerations:

1. If the MASTER (EAST) side is turned OFF, the SLAVE (WEST) end will stay awake for a period of time that is defined in the application by the user, after the SLAVE detects the loss of the signal on the track. There is a slight possibility of the SLAVE unit re-awakening the MASTER end if the MASTER side is turned off immediately after a message was transmitted, and then the MASTER was immediately turned back on. If this occurs, both units will be in TRACK WAKE-UP Mode. The application should be set up so that both units will remain awake until they determine that they are both in TRACK WAKE-UP mode, then they will go back to sleep.

2. If the SLAVE (WEST) side is turned OFF, the MASTER (EAST) end will stay awake for a period of time that is defined in the application by the user, after the MASTER detects the loss of the signal on the track. There is a higher possibility of the MASTER unit re-awakening the SLAVE end because, once the MASTER is awake, the MASTER unit will transmit every 6 seconds, unless the MASTER’s transmitter has been properly disabled in the application. If this occurs, both units will be in TRACK WAKE-UP Mode. The application should be set up so that both units will remain awake until they determine that they are both in TRACK WAKE-UP mode, then they will go back to sleep.

To prevent either unit from accidentally waking up the other unit after turning the power OFF then ON, leave the unit OFF for a period of time that will allow bits to change state which will put the MICROLOK II unit into Sleep mode; again this is dependent upon how the application is setup. This will allow the other end to go back to sleep after loss of communication.

Sleep Mode PCB


Sleep Mode PCB


5. RAIL TEAM AND TECHNICAL SUPPORT

The Rapid Action Information Link Team (RAIL Team) is a group of experienced product and application engineers ready to assist you to resolve any technical issues concerning this product. Contact the RAIL Team in the United States at 1-800-652-7276 or by e-mail at [email protected].

Sleep Mode PCB


End of Manual

1. Sleep Mode Description1.1. Operation1.1.1. Power Requirement1.1.2. East and West Radio Wake-Up Inputs1.1.3. System to Radio Outputs1.1.4. Auxiliary East Input and Auxiliary West Input1.1.5. Radio System Contacts to Request a Wake-Up1.1.6. Restore to Sleep Mode Operation

1.2. System PCBs

2. Sleep Mode PCB2.1. User Interface2.2. I/O Interface2.3. PCB Keying2.4. System Cardfiles2.5. Software Compatibility

3. Installation3.1. Power Hookup3.2. Radio Inputs to the Sleep Mode System3.3. Radio Outputs from the Sleep Mode System3.4. MICROTRAX Input Wiring from the MICROLOK II Sleep Mode Unit to the Track Interface Panel Wiring3.5. East and West Auxiliary Inputs

4. OPERATION4.1. Theory Of Operation for the Sleep Mode Printed Circuit Board4.2. Typical MICROLOK II Vital Sleep Mode Unit Operation4.2.1. General Overview4.2.2. Activation Example4.2.3. Travel with a Passing Siding – West to East4.2.4. Sleep Test Mode

5. RAIL Team and Technical Support

sleep mode pcb - hitachi rail · sw2 sw3 sw4 sw5 sw6. e30 c30 a30 e28 c28 a28. address a26 select...

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